From 9c3e35760fb160177d709f6ffb63bd17f15d41f8 Mon Sep 17 00:00:00 2001 From: marcel Date: Thu, 22 Mar 2007 23:45:25 +0000 Subject: Pass the RID from the bus frontends to the core probe function. Currently all RIDs are 0, but for PCI devices this typically isn't the case. This change is made with future PCI support in mind. --- sys/dev/scc/scc_bfe.h | 2 +- sys/dev/scc/scc_bfe_ebus.c | 2 +- sys/dev/scc/scc_bfe_macio.c | 2 +- sys/dev/scc/scc_bfe_sbus.c | 2 +- sys/dev/scc/scc_core.c | 6 +++--- 5 files changed, 7 insertions(+), 7 deletions(-) (limited to 'sys/dev') diff --git a/sys/dev/scc/scc_bfe.h b/sys/dev/scc/scc_bfe.h index 5e7cc83..2db24f3 100644 --- a/sys/dev/scc/scc_bfe.h +++ b/sys/dev/scc/scc_bfe.h @@ -138,7 +138,7 @@ extern char scc_driver_name[]; int scc_bfe_attach(device_t dev); int scc_bfe_detach(device_t dev); -int scc_bfe_probe(device_t dev, u_int, u_int); +int scc_bfe_probe(device_t dev, u_int regshft, u_int rclk, u_int rid); struct resource *scc_bus_alloc_resource(device_t, device_t, int, int *, u_long, u_long, u_long, u_int); diff --git a/sys/dev/scc/scc_bfe_ebus.c b/sys/dev/scc/scc_bfe_ebus.c index 5d67143..2d4a9d8 100644 --- a/sys/dev/scc/scc_bfe_ebus.c +++ b/sys/dev/scc/scc_bfe_ebus.c @@ -59,7 +59,7 @@ scc_ebus_probe(device_t dev) if (!strcmp(nm, "se") || !strcmp(cmpt, "sab82532")) { device_set_desc(dev, "Siemens SAB 82532 dual channel SCC"); sc->sc_class = &scc_sab82532_class; - return (scc_bfe_probe(dev, EBUS_REGSHFT, EBUS_RCLK)); + return (scc_bfe_probe(dev, EBUS_REGSHFT, EBUS_RCLK, 0)); } return (ENXIO); } diff --git a/sys/dev/scc/scc_bfe_macio.c b/sys/dev/scc/scc_bfe_macio.c index e0e7318..c098595 100644 --- a/sys/dev/scc/scc_bfe_macio.c +++ b/sys/dev/scc/scc_bfe_macio.c @@ -56,7 +56,7 @@ scc_macio_probe(device_t dev) if (!strcmp(nm, "escc")) { device_set_desc(dev, "Zilog Z8530 dual channel SCC"); sc->sc_class = &scc_z8530_class; - return (scc_bfe_probe(dev, MACIO_REGSHFT, MACIO_RCLK)); + return (scc_bfe_probe(dev, MACIO_REGSHFT, MACIO_RCLK, 0)); } return (ENXIO); } diff --git a/sys/dev/scc/scc_bfe_sbus.c b/sys/dev/scc/scc_bfe_sbus.c index dc39d7c..2ce1e1e 100644 --- a/sys/dev/scc/scc_bfe_sbus.c +++ b/sys/dev/scc/scc_bfe_sbus.c @@ -56,7 +56,7 @@ scc_sbus_probe(device_t dev) if (!strcmp(nm, "zs")) { device_set_desc(dev, "Zilog Z8530 dual channel SCC"); sc->sc_class = &scc_z8530_class; - return (scc_bfe_probe(dev, SBUS_REGSHFT, SBUS_RCLK)); + return (scc_bfe_probe(dev, SBUS_REGSHFT, SBUS_RCLK, 0)); } return (ENXIO); } diff --git a/sys/dev/scc/scc_core.c b/sys/dev/scc/scc_core.c index 1aa7549..3432dc3 100644 --- a/sys/dev/scc/scc_core.c +++ b/sys/dev/scc/scc_core.c @@ -332,7 +332,7 @@ scc_bfe_detach(device_t dev) } int -scc_bfe_probe(device_t dev, u_int regshft, u_int rclk) +scc_bfe_probe(device_t dev, u_int regshft, u_int rclk, u_int rid) { struct scc_softc *sc; struct scc_class *cl; @@ -361,12 +361,12 @@ scc_bfe_probe(device_t dev, u_int regshft, u_int rclk) * I/O space. Any SCC that needs multiple windows will consequently * not be supported by this driver as-is. */ - sc->sc_rrid = 0; + sc->sc_rrid = rid; sc->sc_rtype = SYS_RES_MEMORY; sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, cl->cl_channels * size, RF_ACTIVE); if (sc->sc_rres == NULL) { - sc->sc_rrid = 0; + sc->sc_rrid = rid; sc->sc_rtype = SYS_RES_IOPORT; sc->sc_rres = bus_alloc_resource(dev, sc->sc_rtype, &sc->sc_rrid, 0, ~0, cl->cl_channels * size, RF_ACTIVE); -- cgit v1.1