From 3cfec8ce1d2c56d207b68b0ed307b268501d12dd Mon Sep 17 00:00:00 2001 From: msmith Date: Fri, 1 Sep 2000 07:51:25 +0000 Subject: Add the 'asr' driver, supplied by Mark Salyzyn of Adaptec (nee DPT). This provides support for the Adaptec SCSI RAID controller family, as well as the DPT SmartRAID V and VI families. The driver will be maintained by Mark and Adaptec, and any changes should be referred to the MAINTAINER. --- sys/dev/asr/asr.c | 4373 ++++++++++++++++++++++++++++++++++++++++++++++++ sys/dev/asr/dptalign.h | 385 +++++ sys/dev/asr/dptsig.h | 412 +++++ sys/dev/asr/i2oadptr.h | 402 +++++ sys/dev/asr/i2obscsi.h | 495 ++++++ sys/dev/asr/i2odep.h | 1296 ++++++++++++++ sys/dev/asr/i2odpt.h | 195 +++ sys/dev/asr/i2oexec.h | 1265 ++++++++++++++ sys/dev/asr/i2omsg.h | 1290 ++++++++++++++ sys/dev/asr/i2otypes.h | 134 ++ sys/dev/asr/i2outil.h | 418 +++++ sys/dev/asr/osd_defs.h | 80 + sys/dev/asr/osd_unix.h | 590 +++++++ sys/dev/asr/osd_util.h | 367 ++++ sys/dev/asr/sys_info.h | 484 ++++++ 15 files changed, 12186 insertions(+) create mode 100644 sys/dev/asr/asr.c create mode 100644 sys/dev/asr/dptalign.h create mode 100644 sys/dev/asr/dptsig.h create mode 100644 sys/dev/asr/i2oadptr.h create mode 100644 sys/dev/asr/i2obscsi.h create mode 100644 sys/dev/asr/i2odep.h create mode 100644 sys/dev/asr/i2odpt.h create mode 100644 sys/dev/asr/i2oexec.h create mode 100644 sys/dev/asr/i2omsg.h create mode 100644 sys/dev/asr/i2otypes.h create mode 100644 sys/dev/asr/i2outil.h create mode 100644 sys/dev/asr/osd_defs.h create mode 100644 sys/dev/asr/osd_unix.h create mode 100644 sys/dev/asr/osd_util.h create mode 100644 sys/dev/asr/sys_info.h (limited to 'sys/dev') diff --git a/sys/dev/asr/asr.c b/sys/dev/asr/asr.c new file mode 100644 index 0000000..e3493b8 --- /dev/null +++ b/sys/dev/asr/asr.c @@ -0,0 +1,4373 @@ +/* $FreeBSD$ */ +/* + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation + * All rights reserved. + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Adaptec and any express or implied + * warranties, including, but not limited to, the implied warranties of + * merchantability and fitness for a particular purpose, are disclaimed. In no + * event shall Adaptec be liable for any direct, indirect, incidental, special, + * exemplary or consequential damages (including, but not limited to, + * procurement of substitute goods or services; loss of use, data, or profits; + * or business interruptions) however caused and on any theory of liability, + * whether in contract, strict liability, or tort (including negligence or + * otherwise) arising in any way out of the use of this driver software, even + * if advised of the possibility of such damage. + * + * SCSI I2O host adapter driver + * + * V1.03 2000/07/12 Mark_Salyzyn@adaptec.com + * - The controller is not actually an ASR (Adaptec SCSI RAID) + * series that is visible, it's more of an internal code name. + * remove any visible references within reason for now. + * - bus_ptr->LUN was not correctly zeroed when initially + * allocated causing a possible panic of the operating system + * during boot. + * V1.02 2000/06/26 Mark_Salyzyn@adaptec.com + * - Code always fails for ASR_getTid affecting performance. + * - initiated a set of changes that resulted from a formal + * code inspection by Mark_Salyzyn@adaptec.com, + * George_Dake@adaptec.com, Jeff_Zeak@adaptec.com, + * Martin_Wilson@adaptec.com and Vincent_Trandoan@adaptec.com. + * Their findings were focussed on the LCT & TID handler, and + * all resulting changes were to improve code readability, + * consistency or have a positive effect on performance. + * V1.01 2000/06/14 Mark_Salyzyn@adaptec.com + * - Passthrough returned an incorrect error. + * - Passthrough did not migrate the intrinsic scsi layer wakeup + * on command completion. + * - generate control device nodes using make_dev and delete_dev. + * - Performance affected by TID caching reallocing. + * - Made suggested changes by Justin_Gibbs@adaptec.com + * - use splcam instead of splbio. + * - use cam_imask instead of bio_imask. + * - use u_int8_t instead of u_char. + * - use u_int16_t instead of u_short. + * - use u_int32_t instead of u_long where appropriate. + * - use 64 bit context handler instead of 32 bit. + * - create_ccb should only allocate the worst case + * requirements for the driver since CAM may evolve + * making union ccb much larger than needed here. + * renamed create_ccb to asr_alloc_ccb. + * - go nutz justifying all debug prints as macros + * defined at the top and remove unsightly ifdefs. + * - INLINE STATIC viewed as confusing. Historically + * utilized to affect code performance and debug + * issues in OS, Compiler or OEM specific situations. + * V1.00 2000/05/31 Mark_Salyzyn@adaptec.com + * - Ported from FreeBSD 2.2.X DPT I2O driver. + * changed struct scsi_xfer to union ccb/struct ccb_hdr + * changed variable name xs to ccb + * changed struct scsi_link to struct cam_path + * changed struct scsibus_data to struct cam_sim + * stopped using fordriver for holding on to the TID + * use proprietary packet creation instead of scsi_inquire + * CAM layer sends synchronize commands. + */ + +#define ASR_VERSION 1 +#define ASR_REVISION '0' +#define ASR_SUBREVISION '3' +#define ASR_MONTH 7 +#define ASR_DAY 12 +#define ASR_YEAR 2000 - 1980 + +/* + * Debug macros to resude the unsightly ifdefs + */ +#if (defined(DEBUG_ASR) || defined(DEBUG_ASR_USR_CMD) || defined(DEBUG_ASR_CMD)) +# define debug_asr_message(message) \ + { \ + u_int32_t * pointer = (u_int32_t *)message; \ + u_int32_t length = I2O_MESSAGE_FRAME_getMessageSize(message);\ + u_int32_t counter = 0; \ + \ + while (length--) { \ + printf ("%08lx%c", (u_long)*(pointer++), \ + (((++counter & 7) == 0) || (length == 0)) \ + ? '\n' \ + : ' '); \ + } \ + } +#endif /* DEBUG_ASR || DEBUG_ASR_USR_CMD || DEBUG_ASR_CMD */ + +#if (defined(DEBUG_ASR)) + /* Breaks on none STDC based compilers :-( */ +# define debug_asr_printf(fmt,args...) printf(fmt, ##args) +# define debug_asr_dump_message(message) debug_asr_message(message) +# define debug_asr_print_path(ccb) xpt_print_path(ccb->ccb_h.path); + /* None fatal version of the ASSERT macro */ +# if (defined(__STDC__)) +# define ASSERT(phrase) if(!(phrase))printf(#phrase " at line %d file %s\n",__LINE__,__FILE__) +# else +# define ASSERT(phrase) if(!(phrase))printf("phrase" " at line %d file %s\n",__LINE__,__FILE__) +# endif +#else /* DEBUG_ASR */ +# define debug_asr_printf(fmt,args...) +# define debug_asr_dump_message(message) +# define debug_asr_print_path(ccb) +# define ASSERT(x) +#endif /* DEBUG_ASR */ + +/* + * If DEBUG_ASR_CMD is defined: + * 0 - Display incoming SCSI commands + * 1 - add in a quick character before queueing. + * 2 - add in outgoing message frames. + */ +#if (defined(DEBUG_ASR_CMD)) +# define debug_asr_cmd_printf(fmt,args...) printf(fmt,##args) +# define debug_asr_dump_ccb(ccb) \ + { \ + u_int8_t * cp = (unsigned char *)&(ccb->csio.cdb_io); \ + int len = ccb->csio.cdb_len; \ + \ + while (len) { \ + debug_asr_cmd_printf (" %02x", *(cp++)); \ + --len; \ + } \ + } +# if (DEBUG_ASR_CMD > 0) +# define debug_asr_cmd1_printf debug_asr_cmd_printf +# else +# define debug_asr_cmd1_printf(fmt,args...) +# endif +# if (DEBUG_ASR_CMD > 1) +# define debug_asr_cmd2_printf debug_asr_cmd_printf +# define debug_asr_cmd2_dump_message(message) debug_asr_message(message) +# else +# define debug_asr_cmd2_printf(fmt,args...) +# define debug_asr_cmd2_dump_message(message) +# endif +#else /* DEBUG_ASR_CMD */ +# define debug_asr_cmd_printf(fmt,args...) +# define debug_asr_cmd_dump_ccb(ccb) +# define debug_asr_cmd1_printf(fmt,args...) +# define debug_asr_cmd2_printf(fmt,args...) +# define debug_asr_cmd2_dump_message(message) +#endif /* DEBUG_ASR_CMD */ + +#if (defined(DEBUG_ASR_USR_CMD)) +# define debug_usr_cmd_printf(fmt,args...) printf(fmt,##args) +# define debug_usr_cmd_dump_message(message) debug_usr_message(message) +#else /* DEBUG_ASR_USR_CMD */ +# define debug_usr_cmd_printf(fmt,args...) +# define debug_usr_cmd_dump_message(message) +#endif /* DEBUG_ASR_USR_CMD */ + +#define dsDescription_size 46 /* Snug as a bug in a rug */ +#include "dev/asr/dptsig.h" + +static dpt_sig_S ASR_sig = { + { 'd', 'P', 't', 'S', 'i', 'G'}, SIG_VERSION, PROC_INTEL, + PROC_386 | PROC_486 | PROC_PENTIUM | PROC_SEXIUM, FT_HBADRVR, 0, + OEM_DPT, OS_FREE_BSD, CAP_ABOVE16MB, DEV_ALL, + ADF_ALL_SC5, + 0, 0, ASR_VERSION, ASR_REVISION, ASR_SUBREVISION, + ASR_MONTH, ASR_DAY, ASR_YEAR, +/* 01234567890123456789012345678901234567890123456789 < 50 chars */ + "Adaptec FreeBSD 4.0.0 Unix SCSI I2O HBA Driver" + /* ^^^^^ asr_attach alters these to match OS */ +}; + +#include /* TRUE=1 and FALSE=0 defined here */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include + +#include +#include + +#define STATIC static +#define INLINE + +#if (defined(DEBUG_ASR) && (DEBUG_ASR > 0)) +# undef STATIC +# define STATIC +# undef INLINE +# define INLINE +#endif +#define IN +#define OUT +#define INOUT + +#define osdSwap4(x) ((u_long)ntohl((u_long)(x))) +#define KVTOPHYS(x) vtophys(x) +#include "dev/asr/dptalign.h" +#include "dev/asr/i2oexec.h" +#include "dev/asr/i2obscsi.h" +#include "dev/asr/i2odpt.h" +#include "dev/asr/i2oadptr.h" +#include "opt_asr.h" + +#include "dev/asr/sys_info.h" + +/* Configuration Definitions */ + +#define SG_SIZE 58 /* Scatter Gather list Size */ +#define MAX_TARGET_ID 126 /* Maximum Target ID supported */ +#define MAX_LUN 255 /* Maximum LUN Supported */ +#define MAX_CHANNEL 7 /* Maximum Channel # Supported by driver */ +#define MAX_INBOUND 2000 /* Max CCBs, Also Max Queue Size */ +#define MAX_OUTBOUND 256 /* Maximum outbound frames/adapter */ +#define MAX_INBOUND_SIZE 512 /* Maximum inbound frame size */ +#define MAX_MAP 4194304L /* Maximum mapping size of IOP */ + +/************************************************************************** +** ASR Host Adapter structure - One Structure For Each Host Adapter That ** +** Is Configured Into The System. The Structure Supplies Configuration ** +** Information, Status Info, Queue Info And An Active CCB List Pointer. ** +***************************************************************************/ + +/* I2O register set */ +typedef struct { + U8 Address[0x30]; + volatile U32 Status; + volatile U32 Mask; +# define Mask_InterruptsDisabled 0x08 + U32 x[2]; + volatile U32 ToFIFO; /* In Bound FIFO */ + volatile U32 FromFIFO; /* Out Bound FIFO */ +} i2oRegs_t; + +/* + * A MIX of performance and space considerations for TID lookups + */ +typedef u_int16_t tid_t; + +typedef struct { + u_int32_t size; /* up to MAX_LUN */ + tid_t TID[1]; +} lun2tid_t; + +typedef struct { + u_int32_t size; /* up to MAX_TARGET */ + lun2tid_t * LUN[1]; +} target2lun_t; + +/* + * To ensure that we only allocate and use the worst case ccb here, lets + * make our own local ccb union. If asr_alloc_ccb is utilized for another + * ccb type, ensure that you add the additional structures into our local + * ccb union. To ensure strict type checking, we will utilize the local + * ccb definition wherever possible. + */ +union asr_ccb { + struct ccb_hdr ccb_h; /* For convenience */ + struct ccb_scsiio csio; + struct ccb_setasync csa; +}; + +typedef struct Asr_softc { + u_int16_t ha_irq; + void * ha_Base; /* base port for each board */ + u_int8_t * volatile ha_blinkLED; + i2oRegs_t * ha_Virt; /* Base address of adapter */ + I2O_IOP_ENTRY ha_SystemTable; + LIST_HEAD(,ccb_hdr) ha_ccb; /* ccbs in use */ + struct cam_path * ha_path[MAX_CHANNEL+1]; + struct cam_sim * ha_sim[MAX_CHANNEL+1]; +#if __FreeBSD_version >= 400000 + struct resource * ha_mem_res; + struct resource * ha_irq_res; + void * ha_intr; +#endif + u_int8_t ha_adapter_target[MAX_CHANNEL+1]; + PI2O_LCT ha_LCT; /* Complete list of devices */ +# define le_type IdentityTag[0] +# define I2O_BSA 0x20 +# define I2O_FCA 0x40 +# define I2O_SCSI 0x00 +# define I2O_PORT 0x80 +# define I2O_UNKNOWN 0x7F +# define le_bus IdentityTag[1] +# define le_target IdentityTag[2] +# define le_lun IdentityTag[3] + target2lun_t * ha_targets[MAX_CHANNEL+1]; + PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME ha_Msgs; + u_long ha_Msgs_Phys; + u_int16_t ha_Msgs_Count; + + /* Configuration information */ + /* The target id maximums we take */ + u_int8_t ha_MaxBus; /* Maximum bus */ + u_int8_t ha_MaxId; /* Maximum target ID */ + u_int8_t ha_MaxLun; /* Maximum target LUN */ + u_int8_t ha_SgSize; /* Max SG elements */ + u_int8_t ha_pciBusNum; + u_int8_t ha_pciDeviceNum; + u_int16_t ha_QueueSize; /* Max outstanding commands */ + + /* Links into other parents and HBAs */ + struct Asr_softc * ha_next; /* HBA list */ + +#ifdef ASR_MEASURE_PERFORMANCE +#define MAX_TIMEQ_SIZE 256 // assumes MAX 256 scsi commands sent + asr_perf_t ha_performance; + u_int32_t ha_submitted_ccbs_count; + + // Queueing macros for a circular queue +#define TIMEQ_FREE_LIST_EMPTY(head, tail) (-1 == (head) && -1 == (tail)) +#define TIMEQ_FREE_LIST_FULL(head, tail) ((((tail) + 1) % MAX_TIMEQ_SIZE) == (head)) +#define ENQ_TIMEQ_FREE_LIST(item, Q, head, tail) \ + if (!TIMEQ_FREE_LIST_FULL((head), (tail))) { \ + if TIMEQ_FREE_LIST_EMPTY((head),(tail)) { \ + (head) = (tail) = 0; \ + } \ + else (tail) = ((tail) + 1) % MAX_TIMEQ_SIZE; \ + Q[(tail)] = (item); \ + } \ + else { \ + debug_asr_printf("asr: Enqueueing when TimeQ Free List is full... This should not happen!\n"); \ + } +#define DEQ_TIMEQ_FREE_LIST(item, Q, head, tail) \ + if (!TIMEQ_FREE_LIST_EMPTY((head), (tail))) { \ + item = Q[(head)]; \ + if ((head) == (tail)) { (head) = (tail) = -1; } \ + else (head) = ((head) + 1) % MAX_TIMEQ_SIZE; \ + } \ + else { \ + (item) = -1; \ + debug_asr_printf("asr: Dequeueing when TimeQ Free List is empty... This should not happen!\n"); \ + } + + // Circular queue of time stamps + struct timeval ha_timeQ[MAX_TIMEQ_SIZE]; + u_int32_t ha_timeQFreeList[MAX_TIMEQ_SIZE]; + int ha_timeQFreeHead; + int ha_timeQFreeTail; +#endif +} Asr_softc_t; + +STATIC Asr_softc_t * Asr_softc; + +/* + * Prototypes of the routines we have in this object. + */ + +/* Externally callable routines */ +#if __FreeBSD_version >= 400000 +#define PROBE_ARGS IN device_t tag +#define PROBE_RET int +#define PROBE_SET() u_long id = (pci_get_device(tag)<<16)|pci_get_vendor(tag) +#define PROBE_RETURN(retval) if(retval){device_set_desc(tag,retval);return(0);}else{return(ENXIO);} +#define ATTACH_ARGS IN device_t tag +#define ATTACH_RET int +#define ATTACH_SET() int unit = device_get_unit(tag) +#define ATTACH_RETURN(retval) return(retval) +#else +#define PROBE_ARGS IN pcici_t tag, IN pcidi_t id +#define PROBE_RET const char * +#define PROBE_SET() +#define PROBE_RETURN(retval) return(retval) +#define ATTACH_ARGS IN pcici_t tag, IN int unit +#define ATTACH_RET void +#define ATTACH_SET() +#define ATTACH_RETURN(retval) return +#endif +/* I2O HDM interface */ +STATIC PROBE_RET asr_probe __P((PROBE_ARGS)); +STATIC ATTACH_RET asr_attach __P((ATTACH_ARGS)); +/* DOMINO placeholder */ +STATIC PROBE_RET domino_probe __P((PROBE_ARGS)); +STATIC ATTACH_RET domino_attach __P((ATTACH_ARGS)); +/* MODE0 adapter placeholder */ +STATIC PROBE_RET mode0_probe __P((PROBE_ARGS)); +STATIC ATTACH_RET mode0_attach __P((ATTACH_ARGS)); + +STATIC Asr_softc_t * ASR_get_sc __P(( + IN dev_t dev)); +STATIC int asr_ioctl __P(( + IN dev_t dev, + IN u_long cmd, + INOUT caddr_t data, + int flag, + struct proc * proc)); +STATIC int asr_open __P(( + IN dev_t dev, + int32_t flags, + int32_t ifmt, + IN struct proc * proc)); +STATIC int asr_close __P(( + dev_t dev, + int flags, + int ifmt, + struct proc * proc)); +STATIC int asr_intr __P(( + IN Asr_softc_t * sc)); +STATIC void asr_timeout __P(( + INOUT void * arg)); +STATIC int ASR_init __P(( + IN Asr_softc_t * sc)); +STATIC INLINE int ASR_acquireLct __P(( + INOUT Asr_softc_t * sc)); +STATIC INLINE int ASR_acquireHrt __P(( + INOUT Asr_softc_t * sc)); +STATIC void asr_action __P(( + IN struct cam_sim * sim, + IN union ccb * ccb)); +STATIC void asr_async __P(( + void * callback_arg, + u_int32_t code, + struct cam_path * path, + void * arg)); +STATIC void asr_poll __P(( + IN struct cam_sim * sim)); + +/* + * Here is the auto-probe structure used to nest our tests appropriately + * during the startup phase of the operating system. + */ +#if __FreeBSD_version >= 400000 +STATIC device_method_t asr_methods[] = { + DEVMETHOD(device_probe, asr_probe), + DEVMETHOD(device_attach, asr_attach), + { 0, 0 } +}; + +STATIC driver_t asr_driver = { + "asr", + asr_methods, + sizeof(Asr_softc_t) +}; + +STATIC devclass_t asr_devclass; + +DRIVER_MODULE(asr, pci, asr_driver, asr_devclass, 0, 0); + +STATIC device_method_t domino_methods[] = { + DEVMETHOD(device_probe, domino_probe), + DEVMETHOD(device_attach, domino_attach), + { 0, 0 } +}; + +STATIC driver_t domino_driver = { + "domino", + domino_methods, + 0 +}; + +STATIC devclass_t domino_devclass; + +DRIVER_MODULE(domino, pci, domino_driver, domino_devclass, 0, 0); + +STATIC device_method_t mode0_methods[] = { + DEVMETHOD(device_probe, mode0_probe), + DEVMETHOD(device_attach, mode0_attach), + { 0, 0 } +}; + +STATIC driver_t mode0_driver = { + "mode0", + mode0_methods, + 0 +}; + +STATIC devclass_t mode0_devclass; + +DRIVER_MODULE(mode0, pci, mode0_driver, mode0_devclass, 0, 0); +#else +STATIC u_long asr_pcicount = 0; +STATIC struct pci_device asr_pcidev = { + "asr", + asr_probe, + asr_attach, + &asr_pcicount, + NULL +}; +DATA_SET (asr_pciset, asr_pcidev); + +STATIC u_long domino_pcicount = 0; +STATIC struct pci_device domino_pcidev = { + "domino", + domino_probe, + domino_attach, + &domino_pcicount, + NULL +}; +DATA_SET (domino_pciset, domino_pcidev); + +STATIC u_long mode0_pcicount = 0; +STATIC struct pci_device mode0_pcidev = { + "mode0", + mode0_probe, + mode0_attach, + &mode0_pcicount, + NULL +}; +DATA_SET (mode0_pciset, mode0_pcidev); +#endif + +/* + * devsw for asr hba driver + * + * only ioctl is used. the sd driver provides all other access. + */ +#define CDEV_MAJOR 97 /* prefered default character major */ +STATIC struct cdevsw asr_cdevsw = { + asr_open, /* open */ + asr_close, /* close */ + noread, /* read */ + nowrite, /* write */ + asr_ioctl, /* ioctl */ + nopoll, /* poll */ + nommap, /* mmap */ + nostrategy, /* strategy */ + "asr", /* name */ + CDEV_MAJOR, /* maj */ + nodump, /* dump */ + nopsize, /* psize */ + 0, /* flags */ + -1 /* bmaj */ +}; + +#ifdef ASR_MEASURE_PERFORMANCE +STATIC u_int32_t asr_time_delta __P((IN struct timeval start, + IN struct timeval end)); +#endif + +/* + * Initialize the dynamic cdevsw hooks. + */ +STATIC void +asr_drvinit ( + void * unused) +{ + static int asr_devsw_installed = 0; + + if (asr_devsw_installed) { + return; + } + asr_devsw_installed++; + /* + * Find a free spot (the report during driver load used by + * osd layer in engine to generate the controlling nodes). + */ + while ((asr_cdevsw.d_maj < NUMCDEVSW) + && (devsw(makedev(asr_cdevsw.d_maj,0)) != (struct cdevsw *)NULL)) { + ++asr_cdevsw.d_maj; + } + if (asr_cdevsw.d_maj >= NUMCDEVSW) for ( + asr_cdevsw.d_maj = 0; + (asr_cdevsw.d_maj < CDEV_MAJOR) + && (devsw(makedev(asr_cdevsw.d_maj,0)) != (struct cdevsw *)NULL); + ++asr_cdevsw.d_maj); + /* + * Come to papa + */ + cdevsw_add(&asr_cdevsw); + /* + * delete any nodes that would attach to the primary adapter, + * let the adapter scans add them. + */ + destroy_dev(makedev(asr_cdevsw.d_maj,0)); +} /* asr_drvinit */ + +/* Must initialize before CAM layer picks up our HBA driver */ +SYSINIT(asrdev,SI_SUB_DRIVERS,SI_ORDER_MIDDLE+CDEV_MAJOR,asr_drvinit,NULL) + +/* I2O support routines */ +#define defAlignLong(STRUCT,NAME) char NAME[sizeof(STRUCT)] +#define getAlignLong(STRUCT,NAME) ((STRUCT *)(NAME)) + +/* + * Fill message with default. + */ +STATIC PI2O_MESSAGE_FRAME +ASR_fillMessage ( + IN char * Message, + IN u_int16_t size) +{ + OUT PI2O_MESSAGE_FRAME Message_Ptr; + + Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message); + bzero ((void *)Message_Ptr, size); + I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11); + I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, + (size + sizeof(U32) - 1) >> 2); + I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1); + return (Message_Ptr); +} /* ASR_fillMessage */ + +#define EMPTY_QUEUE ((U32)-1L) + +STATIC INLINE U32 +ASR_getMessage( + IN i2oRegs_t * virt) +{ + OUT U32 MessageOffset; + + if ((MessageOffset = virt->ToFIFO) == EMPTY_QUEUE) { + MessageOffset = virt->ToFIFO; + } + return (MessageOffset); +} /* ASR_getMessage */ + +/* Issue a polled command */ +STATIC U32 +ASR_initiateCp ( + INOUT i2oRegs_t * virt, + IN PI2O_MESSAGE_FRAME Message) +{ + OUT U32 Mask = -1L; + U32 MessageOffset; + u_int Delay = 1500; + + /* + * ASR_initiateCp is only used for synchronous commands and will + * be made more resiliant to adapter delays since commands like + * resetIOP can cause the adapter to be deaf for a little time. + */ + while (((MessageOffset = ASR_getMessage(virt)) == EMPTY_QUEUE) + && (--Delay != 0)) { + DELAY (10000); + } + if (MessageOffset != EMPTY_QUEUE) { + bcopy (Message, virt->Address + MessageOffset, + I2O_MESSAGE_FRAME_getMessageSize(Message) << 2); + /* + * Disable the Interrupts + */ + virt->Mask = (Mask = virt->Mask) | Mask_InterruptsDisabled; + virt->ToFIFO = MessageOffset; + } + return (Mask); +} /* ASR_initiateCp */ + +/* + * Reset the adapter. + */ +STATIC U32 +ASR_resetIOP ( + INOUT i2oRegs_t * virt) +{ + struct resetMessage { + I2O_EXEC_IOP_RESET_MESSAGE M; + U32 R; + }; + defAlignLong(struct resetMessage,Message); + PI2O_EXEC_IOP_RESET_MESSAGE Message_Ptr; + OUT U32 * volatile Reply_Ptr; + U32 Old; + + /* + * Build up our copy of the Message. + */ + Message_Ptr = (PI2O_EXEC_IOP_RESET_MESSAGE)ASR_fillMessage(Message, + sizeof(I2O_EXEC_IOP_RESET_MESSAGE)); + I2O_EXEC_IOP_RESET_MESSAGE_setFunction(Message_Ptr, I2O_EXEC_IOP_RESET); + /* + * Reset the Reply Status + */ + *(Reply_Ptr = (U32 *)((char *)Message_Ptr + + sizeof(I2O_EXEC_IOP_RESET_MESSAGE))) = 0; + I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(Message_Ptr, + KVTOPHYS((void *)Reply_Ptr)); + /* + * Send the Message out + */ + if ((Old = ASR_initiateCp (virt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) { + /* + * Wait for a response (Poll), timeouts are dangerous if + * the card is truly responsive. We assume response in 2s. + */ + u_int8_t Delay = 200; + + while ((*Reply_Ptr == 0) && (--Delay != 0)) { + DELAY (10000); + } + /* + * Re-enable the interrupts. + */ + virt->Mask = Old; + ASSERT (*Reply_Ptr); + return (*Reply_Ptr); + } + ASSERT (Old != (U32)-1L); + return (0); +} /* ASR_resetIOP */ + +/* + * Get the curent state of the adapter + */ +STATIC INLINE PI2O_EXEC_STATUS_GET_REPLY +ASR_getStatus ( + INOUT i2oRegs_t * virt, + OUT PI2O_EXEC_STATUS_GET_REPLY buffer) +{ + defAlignLong(I2O_EXEC_STATUS_GET_MESSAGE,Message); + PI2O_EXEC_STATUS_GET_MESSAGE Message_Ptr; + U32 Old; + + /* + * Build up our copy of the Message. + */ + Message_Ptr = (PI2O_EXEC_STATUS_GET_MESSAGE)ASR_fillMessage(Message, + sizeof(I2O_EXEC_STATUS_GET_MESSAGE)); + I2O_EXEC_STATUS_GET_MESSAGE_setFunction(Message_Ptr, + I2O_EXEC_STATUS_GET); + I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(Message_Ptr, + KVTOPHYS((void *)buffer)); + /* This one is a Byte Count */ + I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(Message_Ptr, + sizeof(I2O_EXEC_STATUS_GET_REPLY)); + /* + * Reset the Reply Status + */ + bzero ((void *)buffer, sizeof(I2O_EXEC_STATUS_GET_REPLY)); + /* + * Send the Message out + */ + if ((Old = ASR_initiateCp (virt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) { + /* + * Wait for a response (Poll), timeouts are dangerous if + * the card is truly responsive. We assume response in 50ms. + */ + u_int8_t Delay = 50; + + while (*((U8 * volatile)&buffer->SyncByte) == 0) { + if (--Delay == 0) { + buffer = (PI2O_EXEC_STATUS_GET_REPLY)NULL; + break; + } + DELAY (1000); + } + /* + * Re-enable the interrupts. + */ + virt->Mask = Old; + return (buffer); + } + return ((PI2O_EXEC_STATUS_GET_REPLY)NULL); +} /* ASR_getStatus */ + +/* + * Check if the device is a SCSI I2O HBA, and add it to the list. + */ + +/* + * Probe for ASR controller. If we find it, we will use it. + * virtual adapters. + */ +STATIC PROBE_RET +asr_probe(PROBE_ARGS) +{ + PROBE_SET(); + if (id == 0xA5011044) { + PROBE_RETURN ("Adaptec Caching SCSI RAID"); + } + PROBE_RETURN (NULL); +} /* asr_probe */ + +/* + * Probe/Attach for DOMINO chipset. + */ +STATIC PROBE_RET +domino_probe(PROBE_ARGS) +{ + PROBE_SET(); + if (id == 0x10121044) { + PROBE_RETURN ("Adaptec Caching Memory Controller"); + } + PROBE_RETURN (NULL); +} /* domino_probe */ + +STATIC ATTACH_RET +domino_attach (ATTACH_ARGS) +{ + ATTACH_RETURN (0); +} /* domino_attach */ + +/* + * Probe/Attach for MODE0 adapters. + */ +STATIC PROBE_RET +mode0_probe(PROBE_ARGS) +{ + PROBE_SET(); + if (id == 0x908010B5) { + PROBE_RETURN ("Adaptec Mode0 3xxx"); + } +#if 0 /* this would match any generic i960 -- mjs */ + if (id == 0x19608086) { + PROBE_RETURN ("Adaptec Mode0 1xxx"); + } +#endif + PROBE_RETURN (NULL); +} /* mode0_probe */ + +STATIC ATTACH_RET +mode0_attach (ATTACH_ARGS) +{ + ATTACH_RETURN (0); +} /* mode0_attach */ + +STATIC INLINE union asr_ccb * +asr_alloc_ccb ( + IN Asr_softc_t * sc) +{ + OUT union asr_ccb * new_ccb; + + if ((new_ccb = (union asr_ccb *)malloc(sizeof(*new_ccb), + M_DEVBUF, M_WAITOK)) != (union asr_ccb *)NULL) { + bzero (new_ccb, sizeof(*new_ccb)); + new_ccb->ccb_h.pinfo.priority = 1; + new_ccb->ccb_h.pinfo.index = CAM_UNQUEUED_INDEX; + new_ccb->ccb_h.spriv_ptr0 = sc; + } + return (new_ccb); +} /* asr_alloc_ccb */ + +STATIC INLINE void +asr_free_ccb ( + IN union asr_ccb * free_ccb) +{ + free(free_ccb, M_DEVBUF); +} /* asr_free_ccb */ + +/* + * Print inquiry data `carefully' + */ +STATIC void +ASR_prstring ( + u_int8_t * s, + int len) +{ + while ((--len >= 0) && (*s) && (*s != ' ') && (*s != '-')) { + printf ("%c", *(s++)); + } +} /* ASR_prstring */ + +/* + * Prototypes + */ +STATIC INLINE int ASR_queue __P(( + IN Asr_softc_t * sc, + IN PI2O_MESSAGE_FRAME Message)); +/* + * Send a message synchronously and without Interrupt to a ccb. + */ +STATIC int +ASR_queue_s ( + INOUT union asr_ccb * ccb, + IN PI2O_MESSAGE_FRAME Message) +{ + int s; + U32 Mask; + Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0); + + /* + * We do not need any (optional byteswapping) method access to + * the Initiator context field. + */ + I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb); + + /* Prevent interrupt service */ + s = splcam (); + sc->ha_Virt->Mask = (Mask = sc->ha_Virt->Mask) + | Mask_InterruptsDisabled; + + if (ASR_queue (sc, Message) == EMPTY_QUEUE) { + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_REQUEUE_REQ; + } + + /* + * Wait for this board to report a finished instruction. + */ + while (ccb->ccb_h.status == CAM_REQ_INPROG) { + (void)asr_intr (sc); + } + + /* Re-enable Interrupts */ + sc->ha_Virt->Mask = Mask; + splx(s); + + return (ccb->ccb_h.status); +} /* ASR_queue_s */ + +/* + * Send a message synchronously to a Asr_softc_t + */ +STATIC int +ASR_queue_c ( + IN Asr_softc_t * sc, + IN PI2O_MESSAGE_FRAME Message) +{ + union asr_ccb * ccb; + OUT int status; + + if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) { + return (CAM_REQUEUE_REQ); + } + + status = ASR_queue_s (ccb, Message); + + asr_free_ccb(ccb); + + return (status); +} /* ASR_queue_c */ + +/* + * Add the specified ccb to the active queue + */ +STATIC INLINE void +ASR_ccbAdd ( + IN Asr_softc_t * sc, + INOUT union asr_ccb * ccb) +{ + LIST_INSERT_HEAD(&(sc->ha_ccb), &(ccb->ccb_h), sim_links.le); + if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) { + if (ccb->ccb_h.timeout == CAM_TIME_DEFAULT) { + /* + * RAID systems can take considerable time to + * complete some commands given the large cache + * flashes switching from write back to write thru. + */ + ccb->ccb_h.timeout = 6 * 60 * 1000; + } + ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb, + (ccb->ccb_h.timeout * hz) / 1000); + } +} /* ASR_ccbAdd */ + +/* + * Remove the specified ccb from the active queue. + */ +STATIC INLINE void +ASR_ccbRemove ( + IN Asr_softc_t * sc, + INOUT union asr_ccb * ccb) +{ + untimeout(asr_timeout, (caddr_t)ccb, ccb->ccb_h.timeout_ch); + LIST_REMOVE(&ccb->ccb_h, sim_links.le); +} /* ASR_ccbRemove */ + +/* + * Fail all the active commands, so they get re-issued by the operating + * system. + */ +STATIC INLINE void +ASR_failActiveCommands ( + IN Asr_softc_t * sc) +{ + struct ccb_hdr * ccb; + defAlignLong(I2O_EXEC_LCT_NOTIFY_MESSAGE,Message); + PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr; + + /* Send a blind LCT command to wait for the enableSys to complete */ + Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)ASR_fillMessage(Message, + sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT)); + I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), + I2O_EXEC_LCT_NOTIFY); + I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr, + I2O_CLASS_MATCH_ANYCLASS); + (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + + LIST_FOREACH(ccb, &(sc->ha_ccb), sim_links.le) { + + ASR_ccbRemove (sc, (union asr_ccb *)ccb); + + ccb->status &= ~CAM_STATUS_MASK; + ccb->status |= CAM_REQUEUE_REQ; + ((struct ccb_scsiio *)ccb)->resid + = ((struct ccb_scsiio *)ccb)->dxfer_len; + + if (ccb->path) { + xpt_done ((union ccb *)ccb); + } else { + wakeup ((caddr_t)ccb); + } + } +} /* ASR_failActiveCommands */ + +/* + * The following command causes the HBA to reset the specific bus + */ +STATIC INLINE void +ASR_resetBus( + IN Asr_softc_t * sc, + IN int bus) +{ + defAlignLong(I2O_HBA_BUS_RESET_MESSAGE,Message); + I2O_HBA_BUS_RESET_MESSAGE * Message_Ptr; + PI2O_LCT_ENTRY Device; + + Message_Ptr = (I2O_HBA_BUS_RESET_MESSAGE *)ASR_fillMessage(Message, + sizeof(I2O_HBA_BUS_RESET_MESSAGE)); + I2O_MESSAGE_FRAME_setFunction(&Message_Ptr->StdMessageFrame, + I2O_HBA_BUS_RESET); + for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) + (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); + ++Device) { + if (((Device->le_type & I2O_PORT) != 0) + && (Device->le_bus == bus)) { + I2O_MESSAGE_FRAME_setTargetAddress( + &Message_Ptr->StdMessageFrame, + I2O_LCT_ENTRY_getLocalTID(Device)); + /* Asynchronous command, with no expectations */ + (void)ASR_queue(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + break; + } + } +} /* ASR_resetBus */ + +STATIC INLINE int +ASR_getBlinkLedCode ( + IN Asr_softc_t * sc) +{ + if ((sc != (Asr_softc_t *)NULL) + && (sc->ha_blinkLED != (u_int8_t *)NULL) + && (sc->ha_blinkLED[1] == 0xBC)) { + return (sc->ha_blinkLED[0]); + } + return (0); +} /* ASR_getBlinkCode */ + +/* + * Determine the address of an TID lookup. Must be done at high priority + * since the address can be changed by other threads of execution. + * + * Returns NULL pointer if not indexible (but will attempt to generate + * an index if `new_entry' flag is set to TRUE). + * + * All addressible entries are to be guaranteed zero if never initialized. + */ +STATIC INLINE tid_t * +ASR_getTidAddress( + INOUT Asr_softc_t * sc, + IN int bus, + IN int target, + IN int lun, + IN int new_entry) +{ + target2lun_t * bus_ptr; + lun2tid_t * target_ptr; + unsigned new_size; + + /* + * Validity checking of incoming parameters. More of a bound + * expansion limit than an issue with the code dealing with the + * values. + * + * sc must be valid before it gets here, so that check could be + * dropped if speed a critical issue. + */ + if ((sc == (Asr_softc_t *)NULL) + || (bus > MAX_CHANNEL) + || (target > sc->ha_MaxId) + || (lun > sc->ha_MaxLun)) { + debug_asr_printf("(%lx,%d,%d,%d) target out of range\n", + (u_long)sc, bus, target, lun); + return ((tid_t *)NULL); + } + /* + * See if there is an associated bus list. + * + * for performance, allocate in size of BUS_CHUNK chunks. + * BUS_CHUNK must be a power of two. This is to reduce + * fragmentation effects on the allocations. + */ +# define BUS_CHUNK 8 + new_size = ((target + BUS_CHUNK - 1) & ~(BUS_CHUNK - 1)); + if ((bus_ptr = sc->ha_targets[bus]) == (target2lun_t *)NULL) { + /* + * Allocate a new structure? + * Since one element in structure, the +1 + * needed for size has been abstracted. + */ + if ((new_entry == FALSE) + || ((sc->ha_targets[bus] = bus_ptr = (target2lun_t *)malloc ( + sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size), + M_TEMP, M_WAITOK)) + == (target2lun_t *)NULL)) { + debug_asr_printf("failed to allocate bus list\n"); + return ((tid_t *)NULL); + } + bzero (bus_ptr, sizeof(*bus_ptr) + + (sizeof(bus_ptr->LUN) * new_size)); + bus_ptr->size = new_size + 1; + } else if (bus_ptr->size <= new_size) { + target2lun_t * new_bus_ptr; + + /* + * Reallocate a new structure? + * Since one element in structure, the +1 + * needed for size has been abstracted. + */ + if ((new_entry == FALSE) + || ((new_bus_ptr = (target2lun_t *)malloc ( + sizeof(*bus_ptr) + (sizeof(bus_ptr->LUN) * new_size), + M_TEMP, M_WAITOK)) + == (target2lun_t *)NULL)) { + debug_asr_printf("failed to reallocate bus list\n"); + return ((tid_t *)NULL); + } + /* + * Zero and copy the whole thing, safer, simpler coding + * and not really performance critical at this point. + */ + bzero (new_bus_ptr, sizeof(*bus_ptr) + + (sizeof(bus_ptr->LUN) * new_size)); + bcopy (bus_ptr, new_bus_ptr, sizeof(*bus_ptr) + + (sizeof(bus_ptr->LUN) * (bus_ptr->size - 1))); + sc->ha_targets[bus] = new_bus_ptr; + free (bus_ptr, M_TEMP); + bus_ptr = new_bus_ptr; + bus_ptr->size = new_size + 1; + } + /* + * We now have the bus list, lets get to the target list. + * Since most systems have only *one* lun, we do not allocate + * in chunks as above, here we allow one, then in chunk sizes. + * TARGET_CHUNK must be a power of two. This is to reduce + * fragmentation effects on the allocations. + */ +# define TARGET_CHUNK 8 + if ((new_size = lun) != 0) { + new_size = ((lun + TARGET_CHUNK - 1) & ~(TARGET_CHUNK - 1)); + } + if ((target_ptr = bus_ptr->LUN[target]) == (lun2tid_t *)NULL) { + /* + * Allocate a new structure? + * Since one element in structure, the +1 + * needed for size has been abstracted. + */ + if ((new_entry == FALSE) + || ((bus_ptr->LUN[target] = target_ptr = (lun2tid_t *)malloc ( + sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size), + M_TEMP, M_WAITOK)) + == (lun2tid_t *)NULL)) { + debug_asr_printf("failed to allocate target list\n"); + return ((tid_t *)NULL); + } + bzero (target_ptr, sizeof(*target_ptr) + + (sizeof(target_ptr->TID) * new_size)); + target_ptr->size = new_size + 1; + } else if (target_ptr->size <= new_size) { + lun2tid_t * new_target_ptr; + + /* + * Reallocate a new structure? + * Since one element in structure, the +1 + * needed for size has been abstracted. + */ + if ((new_entry == FALSE) + || ((new_target_ptr = (lun2tid_t *)malloc ( + sizeof(*target_ptr) + (sizeof(target_ptr->TID) * new_size), + M_TEMP, M_WAITOK)) + == (lun2tid_t *)NULL)) { + debug_asr_printf("failed to reallocate target list\n"); + return ((tid_t *)NULL); + } + /* + * Zero and copy the whole thing, safer, simpler coding + * and not really performance critical at this point. + */ + bzero (new_target_ptr, sizeof(*target_ptr) + + (sizeof(target_ptr->TID) * new_size)); + bcopy (target_ptr, new_target_ptr, + sizeof(*target_ptr) + + (sizeof(target_ptr->TID) * (target_ptr->size - 1))); + bus_ptr->LUN[target] = new_target_ptr; + free (target_ptr, M_TEMP); + target_ptr = new_target_ptr; + target_ptr->size = new_size + 1; + } + /* + * Now, acquire the TID address from the LUN indexed list. + */ + return (&(target_ptr->TID[lun])); +} /* ASR_getTidAddress */ + +/* + * Get a pre-existing TID relationship. + * + * If the TID was never set, return (tid_t)-1. + * + * should use mutex rather than spl. + */ +STATIC INLINE tid_t +ASR_getTid ( + IN Asr_softc_t * sc, + IN int bus, + IN int target, + IN int lun) +{ + tid_t * tid_ptr; + int s; + OUT tid_t retval; + + s = splcam(); + if (((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, FALSE)) + == (tid_t *)NULL) + /* (tid_t)0 or (tid_t)-1 indicate no TID */ + || (*tid_ptr == (tid_t)0)) { + splx(s); + return ((tid_t)-1); + } + retval = *tid_ptr; + splx(s); + return (retval); +} /* ASR_getTid */ + +/* + * Set a TID relationship. + * + * If the TID was not set, return (tid_t)-1. + * + * should use mutex rather than spl. + */ +STATIC INLINE tid_t +ASR_setTid ( + INOUT Asr_softc_t * sc, + IN int bus, + IN int target, + IN int lun, + INOUT tid_t TID) +{ + tid_t * tid_ptr; + int s; + + if (TID != (tid_t)-1) { + if (TID == 0) { + return ((tid_t)-1); + } + s = splcam(); + if ((tid_ptr = ASR_getTidAddress (sc, bus, target, lun, TRUE)) + == (tid_t *)NULL) { + splx(s); + return ((tid_t)-1); + } + *tid_ptr = TID; + splx(s); + } + return (TID); +} /* ASR_setTid */ + +/*-------------------------------------------------------------------------*/ +/* Function ASR_rescan */ +/*-------------------------------------------------------------------------*/ +/* The Parameters Passed To This Function Are : */ +/* Asr_softc_t * : HBA miniport driver's adapter data storage. */ +/* */ +/* This Function Will rescan the adapter and resynchronize any data */ +/* */ +/* Return : 0 For OK, Error Code Otherwise */ +/*-------------------------------------------------------------------------*/ + +STATIC INLINE int +ASR_rescan( + IN Asr_softc_t * sc) +{ + int bus; + OUT int error; + + /* + * Re-acquire the LCT table and synchronize us to the adapter. + */ + if ((error = ASR_acquireLct(sc)) == 0) { + error = ASR_acquireHrt(sc); + } + + if (error != 0) { + return error; + } + + bus = sc->ha_MaxBus; + /* Reset all existing cached TID lookups */ + do { + int target; + + /* + * Scan for all targets on this bus to see if they + * got affected by the rescan. + */ + for (target = 0; target <= sc->ha_MaxId; ++target) { + int lun; + + for (lun = 0; lun <= sc->ha_MaxLun; ++lun) { + PI2O_LCT_ENTRY Device; + tid_t TID = (tid_t)-1; + + /* + * See if the cached TID changed. Search for + * the device in our new LCT. + */ + for (Device = sc->ha_LCT->LCTEntry; + Device < (PI2O_LCT_ENTRY)(((U32 *)sc->ha_LCT) + + I2O_LCT_getTableSize(sc->ha_LCT)); + ++Device) { + if ((Device->le_type != I2O_UNKNOWN) + && (Device->le_bus == bus) + && (Device->le_target == target) + && (Device->le_lun == lun) + && (I2O_LCT_ENTRY_getUserTID(Device) + == 0xFFF)) { + TID = I2O_LCT_ENTRY_getLocalTID( + Device); + break; + } + } + /* + * Indicate to the OS that the label needs + * to be recalculated, or that the specific + * open device is no longer valid (Merde) + * because the cached TID changed. + * ASR_getTid (sc, bus, target, lun) != TI + */ + /* + * We have the option of clearing the + * cached TID for it to be rescanned, or to + * set it now even if the device never got + * accessed. We chose the later since we + * currently do not use the condition that + * the TID ever got cached. + */ + ASR_setTid (sc, bus, target, lun, TID); + } + } + } while (--bus >= 0); + return (error); +} /* ASR_rescan */ + +/*-------------------------------------------------------------------------*/ +/* Function ASR_reset */ +/*-------------------------------------------------------------------------*/ +/* The Parameters Passed To This Function Are : */ +/* Asr_softc_t * : HBA miniport driver's adapter data storage. */ +/* */ +/* This Function Will reset the adapter and resynchronize any data */ +/* */ +/* Return : None */ +/*-------------------------------------------------------------------------*/ + +STATIC INLINE void +ASR_reset( + IN Asr_softc_t * sc) +{ + (void)ASR_resetIOP (sc->ha_Virt); + (void)ASR_init (sc); + (void)ASR_rescan (sc); + (void)ASR_failActiveCommands (sc); +} /* ASR_reset */ + +/* + * Device timeout handler. + */ +STATIC void +asr_timeout( + INOUT void * arg) +{ + union asr_ccb * ccb = (union asr_ccb *)arg; + Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0); + int s; + + debug_asr_print_path(ccb); + debug_asr_printf("timed out"); + + /* + * Check if the adapter has locked up? + */ + if ((s = ASR_getBlinkLedCode(sc)) != 0) { + debug_asr_printf ( + " due to adapter blinkled code %x\nresetting adapter\n", s); + ASR_reset (sc); + return; + } + /* + * Abort does not function on the ASR card!!! Walking away from + * the SCSI command is also *very* dangerous. A SCSI BUS reset is + * our best bet, followed by a complete adapter reset if that fails. + */ + s = splcam(); + if (ccb->ccb_h.status == CAM_CMD_TIMEOUT) { + debug_asr_printf (" AGAIN\nreinitializing adapter\n"); + ASR_reset (sc); + splx(s); + return; + } + debug_asr_printf ("\nresetting bus\n"); + /* If the BUS reset does not take, then an adapter reset is next! */ + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_CMD_TIMEOUT; + ccb->ccb_h.timeout_ch = timeout(asr_timeout, (caddr_t)ccb, + (ccb->ccb_h.timeout * hz) / 1000); + ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path))); + splx(s); +} /* asr_timeout */ + +/* + * send a message asynchronously + */ +STATIC INLINE int +ASR_queue( + IN Asr_softc_t * sc, + IN PI2O_MESSAGE_FRAME Message) +{ + OUT U32 MessageOffset; + union asr_ccb * ccb; + + debug_asr_printf ("Host Command Dump:\n"); + debug_asr_dump_message (Message); + + /* + * Limit the number of Messages sent to this HBA. Better to sleep, + * than to hardware loop like a nut! By limiting the number of + * messages to an individual HBA here, we manage to perform all + * the processing of the message ready to drop the next one into + * the controller. We could limit the messages we are allowed to + * take, but that may have a performance hit. + */ + ccb = (union asr_ccb *)(long) + I2O_MESSAGE_FRAME_getInitiatorContext64(Message); + + if (((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE) + || ((MessageOffset = ASR_getMessage(sc->ha_Virt)) != EMPTY_QUEUE)) { +#ifdef ASR_MEASURE_PERFORMANCE + int startTimeIndex; + + if (ccb) { + ++sc->ha_performance.command_count[ + (int) ccb->csio.cdb_io.cdb_bytes[0]]; + DEQ_TIMEQ_FREE_LIST(startTimeIndex, + sc->ha_timeQFreeList, + sc->ha_timeQFreeHead, + sc->ha_timeQFreeTail); + if (-1 != startTimeIndex) { + microtime(&sc->ha_timeQ[startTimeIndex]); + } + /* Time stamp the command before we send it out */ + ((PRIVATE_SCSI_SCB_EXECUTE_MESSAGE *) Message)-> + PrivateMessageFrame.TransactionContext + = (I2O_TRANSACTION_CONTEXT) startTimeIndex; + + ++sc->ha_submitted_ccbs_count; + if (sc->ha_performance.max_submit_count + < sc->ha_submitted_ccbs_count) { + sc->ha_performance.max_submit_count + = sc->ha_submitted_ccbs_count; + } + } +#endif + bcopy (Message, sc->ha_Virt->Address + MessageOffset, + I2O_MESSAGE_FRAME_getMessageSize(Message) << 2); + if (ccb) { + ASR_ccbAdd (sc, ccb); + } + /* Post the command */ + sc->ha_Virt->ToFIFO = MessageOffset; + } else { + if (ASR_getBlinkLedCode(sc)) { + ASR_reset (sc); + } + } + return (MessageOffset); +} /* ASR_queue */ + + +/* Simple Scatter Gather elements */ +#define SG(SGL,Index,Flags,Buffer,Size) \ + I2O_FLAGS_COUNT_setCount( \ + &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \ + Size); \ + I2O_FLAGS_COUNT_setFlags( \ + &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index].FlagsCount), \ + I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | (Flags)); \ + I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress( \ + &(((PI2O_SG_ELEMENT)(SGL))->u.Simple[Index]), \ + (Buffer == NULL) ? NULL : KVTOPHYS(Buffer)) + +/* + * Retrieve Parameter Group. + * Buffer must be allocated using defAlignLong macro. + */ +STATIC void * +ASR_getParams( + IN Asr_softc_t * sc, + IN tid_t TID, + IN int Group, + OUT void * Buffer, + IN unsigned BufferSize) +{ + struct paramGetMessage { + I2O_UTIL_PARAMS_GET_MESSAGE M; + char F[ + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)]; + struct Operations { + I2O_PARAM_OPERATIONS_LIST_HEADER Header; + I2O_PARAM_OPERATION_ALL_TEMPLATE Template[1]; + } O; + }; + defAlignLong(struct paramGetMessage, Message); + struct Operations * Operations_Ptr; + I2O_UTIL_PARAMS_GET_MESSAGE * Message_Ptr; + struct ParamBuffer { + I2O_PARAM_RESULTS_LIST_HEADER Header; + I2O_PARAM_READ_OPERATION_RESULT Read; + char Info[1]; + } * Buffer_Ptr; + + Message_Ptr = (I2O_UTIL_PARAMS_GET_MESSAGE *)ASR_fillMessage(Message, + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) + + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)); + Operations_Ptr = (struct Operations *)((char *)Message_Ptr + + sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) + + sizeof(I2O_SGE_SIMPLE_ELEMENT)*2 - sizeof(I2O_SG_ELEMENT)); + bzero ((void *)Operations_Ptr, sizeof(struct Operations)); + I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount( + &(Operations_Ptr->Header), 1); + I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation( + &(Operations_Ptr->Template[0]), I2O_PARAMS_OPERATION_FIELD_GET); + I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount( + &(Operations_Ptr->Template[0]), 0xFFFF); + I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber( + &(Operations_Ptr->Template[0]), Group); + bzero ((void *)(Buffer_Ptr = getAlignLong(struct ParamBuffer, Buffer)), + BufferSize); + + I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), + I2O_VERSION_11 + + (((sizeof(I2O_UTIL_PARAMS_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4)); + I2O_MESSAGE_FRAME_setTargetAddress (&(Message_Ptr->StdMessageFrame), + TID); + I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame), + I2O_UTIL_PARAMS_GET); + /* + * Set up the buffers as scatter gather elements. + */ + SG(&(Message_Ptr->SGL), 0, + I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, + Operations_Ptr, sizeof(struct Operations)); + SG(&(Message_Ptr->SGL), 1, + I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, + Buffer_Ptr, BufferSize); + + if ((ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) == CAM_REQ_CMP) + && (Buffer_Ptr->Header.ResultCount)) { + return ((void *)(Buffer_Ptr->Info)); + } + return ((void *)NULL); +} /* ASR_getParams */ + +/* + * Acquire the LCT information. + */ +STATIC INLINE int +ASR_acquireLct ( + INOUT Asr_softc_t * sc) +{ + PI2O_EXEC_LCT_NOTIFY_MESSAGE Message_Ptr; + PI2O_SGE_SIMPLE_ELEMENT sg; + int MessageSizeInBytes; + caddr_t v; + int len; + I2O_LCT Table; + PI2O_LCT_ENTRY Entry; + + /* + * sc value assumed valid + */ + MessageSizeInBytes = sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) + - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT); + if ((Message_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE)malloc ( + MessageSizeInBytes, M_TEMP, M_WAITOK)) + == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) { + return (ENOMEM); + } + (void)ASR_fillMessage((char *)Message_Ptr, MessageSizeInBytes); + I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), + (I2O_VERSION_11 + + (((sizeof(I2O_EXEC_LCT_NOTIFY_MESSAGE) - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4))); + I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), + I2O_EXEC_LCT_NOTIFY); + I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(Message_Ptr, + I2O_CLASS_MATCH_ANYCLASS); + /* + * Call the LCT table to determine the number of device entries + * to reserve space for. + */ + SG(&(Message_Ptr->SGL), 0, + I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, &Table, + sizeof(I2O_LCT)); + /* + * since this code is reused in several systems, code efficiency + * is greater by using a shift operation rather than a divide by + * sizeof(u_int32_t). + */ + I2O_LCT_setTableSize(&Table, + (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2); + (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + /* + * Determine the size of the LCT table. + */ + if (sc->ha_LCT) { + free (sc->ha_LCT, M_TEMP); + } + /* + * malloc only generates contiguous memory when less than a + * page is expected. We must break the request up into an SG list ... + */ + if (((len = (I2O_LCT_getTableSize(&Table) << 2)) <= + (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY))) + || (len > (128 * 1024))) { /* Arbitrary */ + free (Message_Ptr, M_TEMP); + return (EINVAL); + } + if ((sc->ha_LCT = (PI2O_LCT)malloc (len, M_TEMP, M_WAITOK)) + == (PI2O_LCT)NULL) { + free (Message_Ptr, M_TEMP); + return (ENOMEM); + } + /* + * since this code is reused in several systems, code efficiency + * is greater by using a shift operation rather than a divide by + * sizeof(u_int32_t). + */ + I2O_LCT_setTableSize(sc->ha_LCT, + (sizeof(I2O_LCT) - sizeof(I2O_LCT_ENTRY)) >> 2); + /* + * Convert the access to the LCT table into a SG list. + */ + sg = Message_Ptr->SGL.u.Simple; + v = (caddr_t)(sc->ha_LCT); + for (;;) { + int next, base, span; + + span = 0; + next = base = KVTOPHYS(v); + I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base); + + /* How far can we go contiguously */ + while ((len > 0) && (base == next)) { + int size; + + next = trunc_page(base) + PAGE_SIZE; + size = next - base; + if (size > len) { + size = len; + } + span += size; + v += size; + len -= size; + base = KVTOPHYS(v); + } + + /* Construct the Flags */ + I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span); + { + int rw = I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT; + if (len <= 0) { + rw = (I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT + | I2O_SGL_FLAGS_LAST_ELEMENT + | I2O_SGL_FLAGS_END_OF_BUFFER); + } + I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), rw); + } + + if (len <= 0) { + break; + } + + /* + * Incrementing requires resizing of the packet. + */ + ++sg; + MessageSizeInBytes += sizeof(*sg); + I2O_MESSAGE_FRAME_setMessageSize( + &(Message_Ptr->StdMessageFrame), + I2O_MESSAGE_FRAME_getMessageSize( + &(Message_Ptr->StdMessageFrame)) + + (sizeof(*sg) / sizeof(U32))); + { + PI2O_EXEC_LCT_NOTIFY_MESSAGE NewMessage_Ptr; + + if ((NewMessage_Ptr = (PI2O_EXEC_LCT_NOTIFY_MESSAGE) + malloc (MessageSizeInBytes, M_TEMP, M_WAITOK)) + == (PI2O_EXEC_LCT_NOTIFY_MESSAGE)NULL) { + free (sc->ha_LCT, M_TEMP); + sc->ha_LCT = (PI2O_LCT)NULL; + free (Message_Ptr, M_TEMP); + return (ENOMEM); + } + span = ((caddr_t)sg) - (caddr_t)Message_Ptr; + bcopy ((caddr_t)Message_Ptr, + (caddr_t)NewMessage_Ptr, span); + free (Message_Ptr, M_TEMP); + sg = (PI2O_SGE_SIMPLE_ELEMENT) + (((caddr_t)NewMessage_Ptr) + span); + Message_Ptr = NewMessage_Ptr; + } + } + { int retval; + + retval = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + free (Message_Ptr, M_TEMP); + if (retval != CAM_REQ_CMP) { + return (ENODEV); + } + } + /* If the LCT table grew, lets truncate accesses */ + if (I2O_LCT_getTableSize(&Table) < I2O_LCT_getTableSize(sc->ha_LCT)) { + I2O_LCT_setTableSize(sc->ha_LCT, I2O_LCT_getTableSize(&Table)); + } + for (Entry = sc->ha_LCT->LCTEntry; Entry < (PI2O_LCT_ENTRY) + (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); + ++Entry) { + Entry->le_type = I2O_UNKNOWN; + switch (I2O_CLASS_ID_getClass(&(Entry->ClassID))) { + + case I2O_CLASS_RANDOM_BLOCK_STORAGE: + Entry->le_type = I2O_BSA; + break; + + case I2O_CLASS_SCSI_PERIPHERAL: + Entry->le_type = I2O_SCSI; + break; + + case I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL: + Entry->le_type = I2O_FCA; + break; + + case I2O_CLASS_BUS_ADAPTER_PORT: + Entry->le_type = I2O_PORT | I2O_SCSI; + /* FALLTHRU */ + case I2O_CLASS_FIBRE_CHANNEL_PORT: + if (I2O_CLASS_ID_getClass(&(Entry->ClassID)) == + I2O_CLASS_FIBRE_CHANNEL_PORT) { + Entry->le_type = I2O_PORT | I2O_FCA; + } + { struct ControllerInfo { + I2O_PARAM_RESULTS_LIST_HEADER Header; + I2O_PARAM_READ_OPERATION_RESULT Read; + I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info; + }; + defAlignLong(struct ControllerInfo, Buffer); + PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR Info; + + Entry->le_bus = 0xff; + Entry->le_target = 0xff; + Entry->le_lun = 0xff; + + if ((Info = (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR) + ASR_getParams(sc, + I2O_LCT_ENTRY_getLocalTID(Entry), + I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO, + Buffer, sizeof(struct ControllerInfo))) + == (PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR)NULL) { + continue; + } + Entry->le_target + = I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID( + Info); + Entry->le_lun = 0; + } /* FALLTHRU */ + default: + continue; + } + { struct DeviceInfo { + I2O_PARAM_RESULTS_LIST_HEADER Header; + I2O_PARAM_READ_OPERATION_RESULT Read; + I2O_DPT_DEVICE_INFO_SCALAR Info; + }; + defAlignLong (struct DeviceInfo, Buffer); + PI2O_DPT_DEVICE_INFO_SCALAR Info; + + Entry->le_bus = 0xff; + Entry->le_target = 0xff; + Entry->le_lun = 0xff; + + if ((Info = (PI2O_DPT_DEVICE_INFO_SCALAR) + ASR_getParams(sc, + I2O_LCT_ENTRY_getLocalTID(Entry), + I2O_DPT_DEVICE_INFO_GROUP_NO, + Buffer, sizeof(struct DeviceInfo))) + == (PI2O_DPT_DEVICE_INFO_SCALAR)NULL) { + continue; + } + Entry->le_type + |= I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(Info); + Entry->le_bus + = I2O_DPT_DEVICE_INFO_SCALAR_getBus(Info); + if ((Entry->le_bus > sc->ha_MaxBus) + && (Entry->le_bus <= MAX_CHANNEL)) { + sc->ha_MaxBus = Entry->le_bus; + } + Entry->le_target + = I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(Info); + Entry->le_lun + = I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(Info); + } + } + /* + * A zero return value indicates success. + */ + return (0); +} /* ASR_acquireLct */ + +/* + * Initialize a message frame. + * We assume that the CDB has already been set up, so all we do here is + * generate the Scatter Gather list. + */ +STATIC INLINE PI2O_MESSAGE_FRAME +ASR_init_message( + IN union asr_ccb * ccb, + OUT PI2O_MESSAGE_FRAME Message) +{ + int next, span, base, rw; + OUT PI2O_MESSAGE_FRAME Message_Ptr; + Asr_softc_t * sc = (Asr_softc_t *)(ccb->ccb_h.spriv_ptr0); + PI2O_SGE_SIMPLE_ELEMENT sg; + caddr_t v; + vm_size_t size, len; + U32 MessageSize; + + /* We only need to zero out the PRIVATE_SCSI_SCB_EXECUTE_MESSAGE */ + bzero (Message_Ptr = getAlignLong(I2O_MESSAGE_FRAME, Message), + (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT))); + + { + int target = ccb->ccb_h.target_id; + int lun = ccb->ccb_h.target_lun; + int bus = cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)); + tid_t TID; + + if ((TID = ASR_getTid (sc, bus, target, lun)) == (tid_t)-1) { + PI2O_LCT_ENTRY Device; + + TID = (tid_t)0; + for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) + (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); + ++Device) { + if ((Device->le_type != I2O_UNKNOWN) + && (Device->le_bus == bus) + && (Device->le_target == target) + && (Device->le_lun == lun) + && (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF)) { + TID = I2O_LCT_ENTRY_getLocalTID(Device); + ASR_setTid (sc, Device->le_bus, + Device->le_target, Device->le_lun, + TID); + break; + } + } + } + if (TID == (tid_t)0) { + return ((PI2O_MESSAGE_FRAME)NULL); + } + I2O_MESSAGE_FRAME_setTargetAddress(Message_Ptr, TID); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, TID); + } + I2O_MESSAGE_FRAME_setVersionOffset(Message_Ptr, I2O_VERSION_11 | + (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4)); + I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, + (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT)) / sizeof(U32)); + I2O_MESSAGE_FRAME_setInitiatorAddress (Message_Ptr, 1); + I2O_MESSAGE_FRAME_setFunction(Message_Ptr, I2O_PRIVATE_MESSAGE); + I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode ( + (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, I2O_SCSI_SCB_EXEC); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags ( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, + I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER); + /* + * We do not need any (optional byteswapping) method access to + * the Initiator & Transaction context field. + */ + I2O_MESSAGE_FRAME_setInitiatorContext64(Message, (long)ccb); + + I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID( + (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, DPT_ORGANIZATION_ID); + /* + * copy the cdb over + */ + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, ccb->csio.cdb_len); + bcopy (&(ccb->csio.cdb_io), + ((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->CDB, ccb->csio.cdb_len); + + /* + * Given a buffer describing a transfer, set up a scatter/gather map + * in a ccb to map that SCSI transfer. + */ + + rw = (ccb->ccb_h.flags & CAM_DIR_IN) ? 0 : I2O_SGL_FLAGS_DIR; + + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags ( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, + (ccb->csio.dxfer_len) + ? ((rw) ? (I2O_SCB_FLAG_XFER_TO_DEVICE + | I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER) + : (I2O_SCB_FLAG_XFER_FROM_DEVICE + | I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)) + : (I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)); + + /* + * Given a transfer described by a `data', fill in the SG list. + */ + sg = &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)->SGL.u.Simple[0]; + + len = ccb->csio.dxfer_len; + v = ccb->csio.data_ptr; + ASSERT (ccb->csio.dxfer_len >= 0); + MessageSize = I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, len); + while ((len > 0) && (sg < &((PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + Message_Ptr)->SGL.u.Simple[SG_SIZE])) { + span = 0; + next = base = KVTOPHYS(v); + I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, base); + + /* How far can we go contiguously */ + while ((len > 0) && (base == next)) { + next = trunc_page(base) + PAGE_SIZE; + size = next - base; + if (size > len) { + size = len; + } + span += size; + v += size; + len -= size; + base = KVTOPHYS(v); + } + + I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), span); + if (len == 0) { + rw |= I2O_SGL_FLAGS_LAST_ELEMENT; + } + I2O_FLAGS_COUNT_setFlags(&(sg->FlagsCount), + I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT | rw); + ++sg; + MessageSize += sizeof(*sg) / sizeof(U32); + } + /* We always do the request sense ... */ + if ((span = ccb->csio.sense_len) == 0) { + span = sizeof(ccb->csio.sense_data); + } + SG(sg, 0, I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, + &(ccb->csio.sense_data), span); + I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, + MessageSize + (sizeof(*sg) / sizeof(U32))); + return (Message_Ptr); +} /* ASR_init_message */ + +/* + * Reset the adapter. + */ +STATIC INLINE U32 +ASR_initOutBound ( + INOUT Asr_softc_t * sc) +{ + struct initOutBoundMessage { + I2O_EXEC_OUTBOUND_INIT_MESSAGE M; + U32 R; + }; + defAlignLong(struct initOutBoundMessage,Message); + PI2O_EXEC_OUTBOUND_INIT_MESSAGE Message_Ptr; + OUT U32 * volatile Reply_Ptr; + U32 Old; + + /* + * Build up our copy of the Message. + */ + Message_Ptr = (PI2O_EXEC_OUTBOUND_INIT_MESSAGE)ASR_fillMessage(Message, + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE)); + I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), + I2O_EXEC_OUTBOUND_INIT); + I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(Message_Ptr, PAGE_SIZE); + I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(Message_Ptr, + sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)); + /* + * Reset the Reply Status + */ + *(Reply_Ptr = (U32 *)((char *)Message_Ptr + + sizeof(I2O_EXEC_OUTBOUND_INIT_MESSAGE))) = 0; + SG (&(Message_Ptr->SGL), 0, I2O_SGL_FLAGS_LAST_ELEMENT, Reply_Ptr, + sizeof(U32)); + /* + * Send the Message out + */ + if ((Old = ASR_initiateCp (sc->ha_Virt, (PI2O_MESSAGE_FRAME)Message_Ptr)) != (U32)-1L) { + u_long size, addr; + + /* + * Wait for a response (Poll). + */ + while (*Reply_Ptr < I2O_EXEC_OUTBOUND_INIT_REJECTED); + /* + * Re-enable the interrupts. + */ + sc->ha_Virt->Mask = Old; + /* + * Populate the outbound table. + */ + if (sc->ha_Msgs == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { + + /* Allocate the reply frames */ + size = sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) + * sc->ha_Msgs_Count; + + /* + * contigmalloc only works reliably at + * initialization time. + */ + if ((sc->ha_Msgs = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) + contigmalloc (size, M_DEVBUF, M_WAITOK, 0ul, + 0xFFFFFFFFul, (u_long)sizeof(U32), 0ul)) + != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { + (void)bzero ((char *)sc->ha_Msgs, size); + sc->ha_Msgs_Phys = KVTOPHYS(sc->ha_Msgs); + } + } + + /* Initialize the outbound FIFO */ + if (sc->ha_Msgs != (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) + for (size = sc->ha_Msgs_Count, addr = sc->ha_Msgs_Phys; + size; --size) { + sc->ha_Virt->FromFIFO = addr; + addr += sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME); + } + return (*Reply_Ptr); + } + return (0); +} /* ASR_initOutBound */ + +/* + * Set the system table + */ +STATIC INLINE int +ASR_setSysTab( + IN Asr_softc_t * sc) +{ + PI2O_EXEC_SYS_TAB_SET_MESSAGE Message_Ptr; + PI2O_SET_SYSTAB_HEADER SystemTable; + Asr_softc_t * ha; + PI2O_SGE_SIMPLE_ELEMENT sg; + int retVal; + + if ((SystemTable = (PI2O_SET_SYSTAB_HEADER)malloc ( + sizeof(I2O_SET_SYSTAB_HEADER), M_TEMP, M_WAITOK)) + == (PI2O_SET_SYSTAB_HEADER)NULL) { + return (ENOMEM); + } + bzero (SystemTable, sizeof(I2O_SET_SYSTAB_HEADER)); + for (ha = Asr_softc; ha; ha = ha->ha_next) { + ++SystemTable->NumberEntries; + } + if ((Message_Ptr = (PI2O_EXEC_SYS_TAB_SET_MESSAGE)malloc ( + sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT) + + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT)), + M_TEMP, M_WAITOK)) == (PI2O_EXEC_SYS_TAB_SET_MESSAGE)NULL) { + free (SystemTable, M_TEMP); + return (ENOMEM); + } + (void)ASR_fillMessage((char *)Message_Ptr, + sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT) + + ((3+SystemTable->NumberEntries) * sizeof(I2O_SGE_SIMPLE_ELEMENT))); + I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), + (I2O_VERSION_11 + + (((sizeof(I2O_EXEC_SYS_TAB_SET_MESSAGE) - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4))); + I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), + I2O_EXEC_SYS_TAB_SET); + /* + * Call the LCT table to determine the number of device entries + * to reserve space for. + * since this code is reused in several systems, code efficiency + * is greater by using a shift operation rather than a divide by + * sizeof(u_int32_t). + */ + sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr + + ((I2O_MESSAGE_FRAME_getVersionOffset( + &(Message_Ptr->StdMessageFrame)) & 0xF0) >> 2)); + SG(sg, 0, I2O_SGL_FLAGS_DIR, SystemTable, sizeof(I2O_SET_SYSTAB_HEADER)); + ++sg; + for (ha = Asr_softc; ha; ha = ha->ha_next) { + SG(sg, 0, + ((ha->ha_next) + ? (I2O_SGL_FLAGS_DIR) + : (I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER)), + &(ha->ha_SystemTable), sizeof(ha->ha_SystemTable)); + ++sg; + } + SG(sg, 0, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0); + SG(sg, 1, I2O_SGL_FLAGS_DIR | I2O_SGL_FLAGS_LAST_ELEMENT + | I2O_SGL_FLAGS_END_OF_BUFFER, NULL, 0); + retVal = ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + free (Message_Ptr, M_TEMP); + free (SystemTable, M_TEMP); + return (retVal); +} /* ASR_setSysTab */ + +STATIC INLINE int +ASR_acquireHrt ( + INOUT Asr_softc_t * sc) +{ + defAlignLong(I2O_EXEC_HRT_GET_MESSAGE,Message); + I2O_EXEC_HRT_GET_MESSAGE * Message_Ptr; + struct { + I2O_HRT Header; + I2O_HRT_ENTRY Entry[MAX_CHANNEL]; + } Hrt; + u_int8_t NumberOfEntries; + PI2O_HRT_ENTRY Entry; + + bzero ((void *)&Hrt, sizeof (Hrt)); + Message_Ptr = (I2O_EXEC_HRT_GET_MESSAGE *)ASR_fillMessage(Message, + sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT) + + sizeof(I2O_SGE_SIMPLE_ELEMENT)); + I2O_MESSAGE_FRAME_setVersionOffset(&(Message_Ptr->StdMessageFrame), + (I2O_VERSION_11 + + (((sizeof(I2O_EXEC_HRT_GET_MESSAGE) - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4))); + I2O_MESSAGE_FRAME_setFunction (&(Message_Ptr->StdMessageFrame), + I2O_EXEC_HRT_GET); + + /* + * Set up the buffers as scatter gather elements. + */ + SG(&(Message_Ptr->SGL), 0, + I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, + &Hrt, sizeof(Hrt)); + if (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != CAM_REQ_CMP) { + return (ENODEV); + } + if ((NumberOfEntries = I2O_HRT_getNumberEntries(&Hrt.Header)) + > (MAX_CHANNEL + 1)) { + NumberOfEntries = MAX_CHANNEL + 1; + } + for (Entry = Hrt.Header.HRTEntry; + NumberOfEntries != 0; + ++Entry, --NumberOfEntries) { + PI2O_LCT_ENTRY Device; + + for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) + (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); + ++Device) { + if (I2O_LCT_ENTRY_getLocalTID(Device) + == (I2O_HRT_ENTRY_getAdapterID(Entry) & 0xFFF)) { + Device->le_bus = I2O_HRT_ENTRY_getAdapterID( + Entry) >> 16; + if ((Device->le_bus > sc->ha_MaxBus) + && (Device->le_bus <= MAX_CHANNEL)) { + sc->ha_MaxBus = Device->le_bus; + } + } + } + } + return (0); +} /* ASR_acquireHrt */ + +/* + * Enable the adapter. + */ +STATIC INLINE int +ASR_enableSys ( + IN Asr_softc_t * sc) +{ + defAlignLong(I2O_EXEC_SYS_ENABLE_MESSAGE,Message); + PI2O_EXEC_SYS_ENABLE_MESSAGE Message_Ptr; + + Message_Ptr = (PI2O_EXEC_SYS_ENABLE_MESSAGE)ASR_fillMessage(Message, + sizeof(I2O_EXEC_SYS_ENABLE_MESSAGE)); + I2O_MESSAGE_FRAME_setFunction(&(Message_Ptr->StdMessageFrame), + I2O_EXEC_SYS_ENABLE); + return (ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr) != 0); +} /* ASR_enableSys */ + +/* + * Perform the stages necessary to initialize the adapter + */ +STATIC int +ASR_init( + IN Asr_softc_t * sc) +{ + return ((ASR_initOutBound(sc) == 0) + || (ASR_setSysTab(sc) != CAM_REQ_CMP) + || (ASR_enableSys(sc) != CAM_REQ_CMP)); +} /* ASR_init */ + +/* + * Send a Synchronize Cache command to the target device. + */ +STATIC INLINE void +ASR_sync ( + IN Asr_softc_t * sc, + IN int bus, + IN int target, + IN int lun) +{ + tid_t TID; + + /* + * We will not synchronize the device when there are outstanding + * commands issued by the OS (this is due to a locked up device, + * as the OS normally would flush all outstanding commands before + * issuing a shutdown or an adapter reset). + */ + if ((sc != (Asr_softc_t *)NULL) + && (sc->ha_ccb.lh_first != (struct ccb_hdr *)NULL) + && ((TID = ASR_getTid (sc, bus, target, lun)) != (tid_t)-1) + && (TID != (tid_t)0)) { + defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message); + PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr; + + bzero (Message_Ptr + = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message), + sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)); + + I2O_MESSAGE_FRAME_setVersionOffset( + (PI2O_MESSAGE_FRAME)Message_Ptr, + I2O_VERSION_11 + | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4)); + I2O_MESSAGE_FRAME_setMessageSize( + (PI2O_MESSAGE_FRAME)Message_Ptr, + (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)); + I2O_MESSAGE_FRAME_setInitiatorAddress ( + (PI2O_MESSAGE_FRAME)Message_Ptr, 1); + I2O_MESSAGE_FRAME_setFunction( + (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE); + I2O_MESSAGE_FRAME_setTargetAddress( + (PI2O_MESSAGE_FRAME)Message_Ptr, TID); + I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode ( + (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, + I2O_SCSI_SCB_EXEC); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(Message_Ptr, TID); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, + I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER); + I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID( + (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, + DPT_ORGANIZATION_ID); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6); + Message_Ptr->CDB[0] = SYNCHRONIZE_CACHE; + Message_Ptr->CDB[1] = (lun << 5); + + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, + (I2O_SCB_FLAG_XFER_FROM_DEVICE + | I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)); + + (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + + } +} + +STATIC INLINE void +ASR_synchronize ( + IN Asr_softc_t * sc) +{ + int bus, target, lun; + + for (bus = 0; bus <= sc->ha_MaxBus; ++bus) { + for (target = 0; target <= sc->ha_MaxId; ++target) { + for (lun = 0; lun <= sc->ha_MaxLun; ++lun) { + ASR_sync(sc,bus,target,lun); + } + } + } +} + +/* + * Reset the HBA, targets and BUS. + * Currently this resets *all* the SCSI busses. + */ +STATIC INLINE void +asr_hbareset( + IN Asr_softc_t * sc) +{ + ASR_synchronize (sc); + ASR_reset (sc); +} /* asr_hbareset */ + +/* + * A reduced copy of the real pci_map_mem, incorporating the MAX_MAP + * limit and a reduction in error checking (in the pre 4.0 case). + */ +STATIC int +asr_pci_map_mem ( +#if __FreeBSD_version >= 400000 + IN device_t tag, +#else + IN pcici_t tag, +#endif + IN Asr_softc_t * sc) +{ + int rid; + u_int32_t p, l; + +#if __FreeBSD_version >= 400000 + /* + * I2O specification says we must find first *memory* mapped BAR + */ + for (rid = PCIR_MAPS; + rid < (PCIR_MAPS + 4 * sizeof(u_int32_t)); + ++rid) { + p = pci_read_config(tag, rid, sizeof(p)); + if ((p & 1) == 0) { + break; + } + } + /* + * Give up? + */ + if (rid >= (PCIR_MAPS + 4 * sizeof(u_int32_t))) { + rid = PCIR_MAPS; + } + p = pci_read_config(tag, rid, sizeof(p)); + pci_write_config(tag, rid, -1, sizeof(p)); + l = 0 - (pci_read_config(tag, rid, sizeof(l)) & ~15); + pci_write_config(tag, rid, p, sizeof(p)); + if (l > MAX_MAP) { + l = MAX_MAP; + } + p &= ~15; + sc->ha_mem_res = bus_alloc_resource(tag, SYS_RES_MEMORY, &rid, + p, p + l, l, RF_ACTIVE); + if (sc->ha_mem_res == (struct resource *)NULL) { + return (0); + } + sc->ha_Base = (void *)rman_get_start(sc->ha_mem_res); + if (sc->ha_Base == (void *)NULL) { + return (0); + } + sc->ha_Virt = (i2oRegs_t *) rman_get_virtual(sc->ha_mem_res); +#else + vm_size_t psize, poffs; + + /* + * I2O specification says we must find first *memory* mapped BAR + */ + for (rid = PCI_MAP_REG_START; + rid < (PCI_MAP_REG_START + 4 * sizeof(u_int32_t)); + ++rid) { + p = pci_conf_read (tag, rid); + if ((p & 1) == 0) { + break; + } + } + if (rid >= (PCI_MAP_REG_START + 4 * sizeof(u_int32_t))) { + rid = PCI_MAP_REG_START; + } + /* + ** save old mapping, get size and type of memory + ** + ** type is in the lowest four bits. + ** If device requires 2^n bytes, the next + ** n-4 bits are read as 0. + */ + + sc->ha_Base = (void *)((p = pci_conf_read (tag, rid)) + & PCI_MAP_MEMORY_ADDRESS_MASK); + pci_conf_write (tag, rid, 0xfffffffful); + l = pci_conf_read (tag, rid); + pci_conf_write (tag, rid, p); + + /* + ** check the type + */ + + if (!((l & PCI_MAP_MEMORY_TYPE_MASK) == PCI_MAP_MEMORY_TYPE_32BIT_1M + && ((u_long)sc->ha_Base & ~0xfffff) == 0) + && ((l & PCI_MAP_MEMORY_TYPE_MASK) != PCI_MAP_MEMORY_TYPE_32BIT)) { + debug_asr_printf ( + "asr_pci_map_mem failed: bad memory type=0x%x\n", + (unsigned) l); + return (0); + }; + + /* + ** get the size. + */ + + psize = -(l & PCI_MAP_MEMORY_ADDRESS_MASK); + if (psize > MAX_MAP) { + psize = MAX_MAP; + } + + if ((sc->ha_Base == (void *)NULL) + || (sc->ha_Base == (void *)PCI_MAP_MEMORY_ADDRESS_MASK)) { + debug_asr_printf ("asr_pci_map_mem: not configured by bios.\n"); + return (0); + }; + + /* + ** Truncate sc->ha_Base to page boundary. + ** (Or does pmap_mapdev the job?) + */ + + poffs = (u_long)sc->ha_Base - trunc_page ((u_long)sc->ha_Base); + sc->ha_Virt = (i2oRegs_t *)pmap_mapdev ((u_long)sc->ha_Base - poffs, + psize + poffs); + + if (sc->ha_Virt == (i2oRegs_t *)NULL) { + return (0); + } + + sc->ha_Virt = (i2oRegs_t *)((u_long)sc->ha_Virt + poffs); +#endif + return (1); +} /* asr_pci_map_mem */ + +/* + * A simplified copy of the real pci_map_int with additional + * registration requirements. + */ +STATIC int +asr_pci_map_int ( +#if __FreeBSD_version >= 400000 + IN device_t tag, +#else + IN pcici_t tag, +#endif + IN Asr_softc_t * sc) +{ +#if __FreeBSD_version >= 400000 + int rid = 0; + + sc->ha_irq_res = bus_alloc_resource(tag, SYS_RES_IRQ, &rid, + 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE); + if (sc->ha_irq_res == (struct resource *)NULL) { + return (0); + } + if (bus_setup_intr(tag, sc->ha_irq_res, INTR_TYPE_CAM, + (driver_intr_t *)asr_intr, (void *)sc, &(sc->ha_intr))) { + return (0); + } + sc->ha_irq = pci_read_config(tag, PCIR_INTLINE, sizeof(char)); +#else + if (!pci_map_int(tag, (pci_inthand_t *)asr_intr, + (void *)sc, &cam_imask)) { + return (0); + } + sc->ha_irq = pci_conf_read(tag, PCIR_INTLINE); +#endif + return (1); +} /* asr_pci_map_int */ + +/* + * Attach the devices, and virtual devices to the driver list. + */ +STATIC ATTACH_RET +asr_attach (ATTACH_ARGS) +{ + Asr_softc_t * sc; + struct scsi_inquiry_data * iq; + ATTACH_SET(); + + if ((sc = malloc(sizeof(*sc), M_DEVBUF, M_NOWAIT)) == (Asr_softc_t *)NULL) { + ATTACH_RETURN(ENOMEM); + } + if (Asr_softc == (Asr_softc_t *)NULL) { + /* + * Fixup the OS revision as saved in the dptsig for the + * engine (dptioctl.h) to pick up. + */ + bcopy (osrelease, &ASR_sig.dsDescription[16], 5); + printf ("asr%d: major=%d\n", unit, asr_cdevsw.d_maj); + } + /* + * Initialize the software structure + */ + bzero (sc, sizeof(*sc)); + LIST_INIT(&sc->ha_ccb); +# ifdef ASR_MEASURE_PERFORMANCE + { + u_int32_t i; + + // initialize free list for timeQ + sc->ha_timeQFreeHead = 0; + sc->ha_timeQFreeTail = MAX_TIMEQ_SIZE - 1; + for (i = 0; i < MAX_TIMEQ_SIZE; i++) { + sc->ha_timeQFreeList[i] = i; + } + } +# endif + /* Link us into the HA list */ + { + Asr_softc_t **ha; + + for (ha = &Asr_softc; *ha; ha = &((*ha)->ha_next)); + *(ha) = sc; + } + { + PI2O_EXEC_STATUS_GET_REPLY status; + int size; + + /* + * This is the real McCoy! + */ + if (!asr_pci_map_mem(tag, sc)) { + printf ("asr%d: could not map memory\n", unit); + ATTACH_RETURN(ENXIO); + } + /* Enable if not formerly enabled */ +#if __FreeBSD_version >= 400000 + pci_write_config (tag, PCIR_COMMAND, + pci_read_config (tag, PCIR_COMMAND, sizeof(char)) + | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN, sizeof(char)); + /* Knowledge is power, responsibility is direct */ + { + struct pci_devinfo { + STAILQ_ENTRY(pci_devinfo) pci_links; + struct resource_list resources; + pcicfgregs cfg; + } * dinfo = device_get_ivars(tag); + sc->ha_pciBusNum = dinfo->cfg.bus; + sc->ha_pciDeviceNum = (dinfo->cfg.slot << 3) + | dinfo->cfg.func; + } +#else + pci_conf_write (tag, PCIR_COMMAND, + pci_conf_read (tag, PCIR_COMMAND) + | PCIM_CMD_MEMEN | PCIM_CMD_BUSMASTEREN); + /* Knowledge is power, responsibility is direct */ + switch (pci_mechanism) { + + case 1: + sc->ha_pciBusNum = tag.cfg1 >> 16; + sc->ha_pciDeviceNum = tag.cfg1 >> 8; + + case 2: + sc->ha_pciBusNum = tag.cfg2.forward; + sc->ha_pciDeviceNum = ((tag.cfg2.enable >> 1) & 7) + | (tag.cfg2.port >> 5); + } +#endif + /* Check if the device is there? */ + if ((ASR_resetIOP(sc->ha_Virt) == 0) + || ((status = (PI2O_EXEC_STATUS_GET_REPLY)malloc ( + sizeof(I2O_EXEC_STATUS_GET_REPLY), M_TEMP, M_WAITOK)) + == (PI2O_EXEC_STATUS_GET_REPLY)NULL) + || (ASR_getStatus(sc->ha_Virt, status) == NULL)) { + printf ("asr%d: could not initialize hardware\n", unit); + ATTACH_RETURN(ENODEV); /* Get next, maybe better luck */ + } + sc->ha_SystemTable.OrganizationID = status->OrganizationID; + sc->ha_SystemTable.IOP_ID = status->IOP_ID; + sc->ha_SystemTable.I2oVersion = status->I2oVersion; + sc->ha_SystemTable.IopState = status->IopState; + sc->ha_SystemTable.MessengerType = status->MessengerType; + sc->ha_SystemTable.InboundMessageFrameSize + = status->InboundMFrameSize; + sc->ha_SystemTable.MessengerInfo.InboundMessagePortAddressLow + = (U32)(sc->ha_Base) + (U32)(&(((i2oRegs_t *)NULL)->ToFIFO)); + + if (!asr_pci_map_int(tag, (void *)sc)) { + printf ("asr%d: could not map interrupt\n", unit); + ATTACH_RETURN(ENXIO); + } + + /* Adjust the maximim inbound count */ + if (((sc->ha_QueueSize + = I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(status)) + > MAX_INBOUND) + || (sc->ha_QueueSize == 0)) { + sc->ha_QueueSize = MAX_INBOUND; + } + + /* Adjust the maximum outbound count */ + if (((sc->ha_Msgs_Count + = I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(status)) + > MAX_OUTBOUND) + || (sc->ha_Msgs_Count == 0)) { + sc->ha_Msgs_Count = MAX_OUTBOUND; + } + if (sc->ha_Msgs_Count > sc->ha_QueueSize) { + sc->ha_Msgs_Count = sc->ha_QueueSize; + } + + /* Adjust the maximum SG size to adapter */ + if ((size = (I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize( + status) << 2)) > MAX_INBOUND_SIZE) { + size = MAX_INBOUND_SIZE; + } + free (status, M_TEMP); + sc->ha_SgSize = (size - sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + + sizeof(I2O_SG_ELEMENT)) / sizeof(I2O_SGE_SIMPLE_ELEMENT); + } + + /* + * Only do a bus/HBA reset on the first time through. On this + * first time through, we do not send a flush to the devices. + */ + if (ASR_init(sc) == 0) { + struct BufferInfo { + I2O_PARAM_RESULTS_LIST_HEADER Header; + I2O_PARAM_READ_OPERATION_RESULT Read; + I2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info; + }; + defAlignLong (struct BufferInfo, Buffer); + PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR Info; +# define FW_DEBUG_BLED_OFFSET 8 + + if ((Info = (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR) + ASR_getParams(sc, 0, + I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO, + Buffer, sizeof(struct BufferInfo))) + != (PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR)NULL) { + sc->ha_blinkLED = sc->ha_Virt->Address + + I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(Info) + + FW_DEBUG_BLED_OFFSET; + } + if (ASR_acquireLct(sc) == 0) { + (void)ASR_acquireHrt(sc); + } + } else { + printf ("asr%d: failed to initialize\n", unit); + ATTACH_RETURN(ENXIO); + } + /* + * Add in additional probe responses for more channels. We + * are reusing the variable `target' for a channel loop counter. + * Done here because of we need both the acquireLct and + * acquireHrt data. + */ + { PI2O_LCT_ENTRY Device; + + for (Device = sc->ha_LCT->LCTEntry; Device < (PI2O_LCT_ENTRY) + (((U32 *)sc->ha_LCT)+I2O_LCT_getTableSize(sc->ha_LCT)); + ++Device) { + if (Device->le_type == I2O_UNKNOWN) { + continue; + } + if (I2O_LCT_ENTRY_getUserTID(Device) == 0xFFF) { + if (Device->le_target > sc->ha_MaxId) { + sc->ha_MaxId = Device->le_target; + } + if (Device->le_lun > sc->ha_MaxLun) { + sc->ha_MaxLun = Device->le_lun; + } + } + if (((Device->le_type & I2O_PORT) != 0) + && (Device->le_bus <= MAX_CHANNEL)) { + /* Do not increase MaxId for efficiency */ + sc->ha_adapter_target[Device->le_bus] + = Device->le_target; + } + } + } + + + /* + * Print the HBA model number as inquired from the card. + */ + + printf ("asr%d:", unit); + + if ((iq = (struct scsi_inquiry_data *)malloc ( + sizeof(struct scsi_inquiry_data), M_TEMP, M_WAITOK)) + != (struct scsi_inquiry_data *)NULL) { + defAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE,Message); + PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE Message_Ptr; + int posted = 0; + + bzero (iq, sizeof(struct scsi_inquiry_data)); + bzero (Message_Ptr + = getAlignLong(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, Message), + sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)); + + I2O_MESSAGE_FRAME_setVersionOffset( + (PI2O_MESSAGE_FRAME)Message_Ptr, + I2O_VERSION_11 + | (((sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT)) + / sizeof(U32)) << 4)); + I2O_MESSAGE_FRAME_setMessageSize( + (PI2O_MESSAGE_FRAME)Message_Ptr, + (sizeof(PRIVATE_SCSI_SCB_EXECUTE_MESSAGE) + - sizeof(I2O_SG_ELEMENT) + sizeof(I2O_SGE_SIMPLE_ELEMENT)) + / sizeof(U32)); + I2O_MESSAGE_FRAME_setInitiatorAddress ( + (PI2O_MESSAGE_FRAME)Message_Ptr, 1); + I2O_MESSAGE_FRAME_setFunction( + (PI2O_MESSAGE_FRAME)Message_Ptr, I2O_PRIVATE_MESSAGE); + I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode ( + (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, + I2O_SCSI_SCB_EXEC); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, + I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(Message_Ptr, 1); + I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID( + (PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr, + DPT_ORGANIZATION_ID); + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(Message_Ptr, 6); + Message_Ptr->CDB[0] = INQUIRY; + Message_Ptr->CDB[4] = (unsigned char)sizeof(struct scsi_inquiry_data); + if (Message_Ptr->CDB[4] == 0) { + Message_Ptr->CDB[4] = 255; + } + + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags (Message_Ptr, + (I2O_SCB_FLAG_XFER_FROM_DEVICE + | I2O_SCB_FLAG_ENABLE_DISCONNECT + | I2O_SCB_FLAG_SIMPLE_QUEUE_TAG + | I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER)); + + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr, + sizeof(struct scsi_inquiry_data)); + SG(&(Message_Ptr->SGL), 0, + I2O_SGL_FLAGS_LAST_ELEMENT | I2O_SGL_FLAGS_END_OF_BUFFER, + iq, sizeof(struct scsi_inquiry_data)); + (void)ASR_queue_c(sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + + if (iq->vendor[0] && (iq->vendor[0] != ' ')) { + printf (" "); + ASR_prstring (iq->vendor, 8); + ++posted; + } + if (iq->product[0] && (iq->product[0] != ' ')) { + printf (" "); + ASR_prstring (iq->product, 16); + ++posted; + } + if (iq->revision[0] && (iq->revision[0] != ' ')) { + printf (" FW Rev. "); + ASR_prstring (iq->revision, 4); + ++posted; + } + free ((caddr_t)iq, M_TEMP); + if (posted) { + printf (","); + } + } + printf (" %d channel, %d CCBs, Protocol I2O\n", sc->ha_MaxBus + 1, + (sc->ha_QueueSize > MAX_INBOUND) ? MAX_INBOUND : sc->ha_QueueSize); + + /* + * fill in the prototype cam_path. + */ + { + int bus; + union asr_ccb * ccb; + + if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) { + printf ("asr%d: CAM could not be notified of asynchronous callback parameters\n", unit); + ATTACH_RETURN(ENOMEM); + } + for (bus = 0; bus <= sc->ha_MaxBus; ++bus) { + struct cam_devq * devq; + int QueueSize = sc->ha_QueueSize; + + if (QueueSize > MAX_INBOUND) { + QueueSize = MAX_INBOUND; + } + + /* + * Create the device queue for our SIM(s). + */ + if ((devq = cam_simq_alloc(QueueSize)) == NULL) { + continue; + } + + /* + * Construct our first channel SIM entry + */ + sc->ha_sim[bus] = cam_sim_alloc( + asr_action, asr_poll, "asr", sc, + unit, 1, QueueSize, devq); + if (sc->ha_sim[bus] == NULL) { + continue; + } + + if (xpt_bus_register(sc->ha_sim[bus], bus) + != CAM_SUCCESS) { + cam_sim_free(sc->ha_sim[bus], + /*free_devq*/TRUE); + sc->ha_sim[bus] = NULL; + continue; + } + + if (xpt_create_path(&(sc->ha_path[bus]), /*periph*/NULL, + cam_sim_path(sc->ha_sim[bus]), CAM_TARGET_WILDCARD, + CAM_LUN_WILDCARD) != CAM_REQ_CMP) { + xpt_bus_deregister( + cam_sim_path(sc->ha_sim[bus])); + cam_sim_free(sc->ha_sim[bus], + /*free_devq*/TRUE); + sc->ha_sim[bus] = NULL; + continue; + } + xpt_setup_ccb(&(ccb->ccb_h), + sc->ha_path[bus], /*priority*/5); + ccb->ccb_h.func_code = XPT_SASYNC_CB; + ccb->csa.event_enable = AC_LOST_DEVICE; + ccb->csa.callback = asr_async; + ccb->csa.callback_arg = sc->ha_sim[bus]; + xpt_action((union ccb *)ccb); + } + asr_free_ccb (ccb); + } + /* + * Generate the device node information + */ + (void)make_dev(&asr_cdevsw, unit, 0, 0, S_IRWXU, "rasr%d", unit); + destroy_dev(makedev(asr_cdevsw.d_maj,unit+1)); + ATTACH_RETURN(0); +} /* asr_attach */ + +#if (!defined(UNREFERENCED_PARAMETER)) +# define UNREFERENCED_PARAMETER(x) (void)(x) +#endif + +STATIC void +asr_async( + void * callback_arg, + u_int32_t code, + struct cam_path * path, + void * arg) +{ + UNREFERENCED_PARAMETER(callback_arg); + UNREFERENCED_PARAMETER(code); + UNREFERENCED_PARAMETER(path); + UNREFERENCED_PARAMETER(arg); +} /* asr_async */ + +STATIC void +asr_poll( + IN struct cam_sim *sim) +{ + asr_intr(cam_sim_softc(sim)); +} /* asr_poll */ + +STATIC void +asr_action( + IN struct cam_sim * sim, + IN union ccb * ccb) +{ + struct Asr_softc * sc; + + debug_asr_printf ("asr_action(%lx,%lx{%x})\n", + (u_long)sim, (u_long)ccb, ccb->ccb_h.func_code); + + CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("asr_action\n")); + + ccb->ccb_h.spriv_ptr0 = sc = (struct Asr_softc *)cam_sim_softc(sim); + + switch (ccb->ccb_h.func_code) { + + /* Common cases first */ + case XPT_SCSI_IO: /* Execute the requested I/O operation */ + { + struct Message { + char M[MAX_INBOUND_SIZE]; + }; + defAlignLong(struct Message,Message); + PI2O_MESSAGE_FRAME Message_Ptr; + + if (ccb->ccb_h.status != CAM_REQ_INPROG) { + printf( + "asr%d WARNING: scsi_cmd(%x) already done on b%dt%du%d\n", + cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), + ccb->csio.cdb_io.cdb_bytes[0], + cam_sim_bus(sim), + ccb->ccb_h.target_id, + ccb->ccb_h.target_lun); + } + debug_asr_cmd_printf ("(%d,%d,%d,%d)", + cam_sim_unit(sim), + cam_sim_bus(sim), + ccb->ccb_h.target_id, + ccb->ccb_h.target_lun); + debug_asr_cmd_dump_ccb(ccb); + + if ((Message_Ptr = ASR_init_message ((union asr_ccb *)ccb, + (PI2O_MESSAGE_FRAME)Message)) != (PI2O_MESSAGE_FRAME)NULL) { + debug_asr_cmd2_printf ("TID=%x:\n", + PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID( + (PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE)Message_Ptr)); + debug_asr_cmd2_dump_message(Message_Ptr); + debug_asr_cmd1_printf (" q"); + + if (ASR_queue (sc, Message_Ptr) == EMPTY_QUEUE) { +#ifdef ASR_MEASURE_PERFORMANCE + ++sc->ha_performance.command_too_busy; +#endif + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_REQUEUE_REQ; + debug_asr_cmd_printf (" E\n"); + xpt_done(ccb); + } + debug_asr_cmd_printf (" Q\n"); + break; + } + /* + * We will get here if there is no valid TID for the device + * referenced in the scsi command packet. + */ + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_SEL_TIMEOUT; + debug_asr_cmd_printf (" B\n"); + xpt_done(ccb); + break; + } + + case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ + /* Rese HBA device ... */ + asr_hbareset (sc); + ccb->ccb_h.status = CAM_REQ_CMP; + xpt_done(ccb); + break; + +# if (defined(REPORT_LUNS)) + case REPORT_LUNS: +# endif + case XPT_ABORT: /* Abort the specified CCB */ + /* XXX Implement */ + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + break; + + case XPT_SET_TRAN_SETTINGS: + /* XXX Implement */ + ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; + xpt_done(ccb); + break; + + case XPT_GET_TRAN_SETTINGS: + /* Get default/user set transfer settings for the target */ + { + struct ccb_trans_settings *cts; + u_int target_mask; + + cts = &ccb->cts; + target_mask = 0x01 << ccb->ccb_h.target_id; + if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) { + cts->flags = CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB; + cts->bus_width = MSG_EXT_WDTR_BUS_16_BIT; + cts->sync_period = 6; /* 40MHz */ + cts->sync_offset = 15; + + cts->valid = CCB_TRANS_SYNC_RATE_VALID + | CCB_TRANS_SYNC_OFFSET_VALID + | CCB_TRANS_BUS_WIDTH_VALID + | CCB_TRANS_DISC_VALID + | CCB_TRANS_TQ_VALID; + ccb->ccb_h.status = CAM_REQ_CMP; + } else { + ccb->ccb_h.status = CAM_FUNC_NOTAVAIL; + } + xpt_done(ccb); + break; + } + + case XPT_CALC_GEOMETRY: + { + struct ccb_calc_geometry *ccg; + u_int32_t size_mb; + u_int32_t secs_per_cylinder; + + ccg = &ccb->ccg; + size_mb = ccg->volume_size + / ((1024L * 1024L) / ccg->block_size); + + if (size_mb > 4096) { + ccg->heads = 255; + ccg->secs_per_track = 63; + } else if (size_mb > 2048) { + ccg->heads = 128; + ccg->secs_per_track = 63; + } else if (size_mb > 1024) { + ccg->heads = 65; + ccg->secs_per_track = 63; + } else { + ccg->heads = 64; + ccg->secs_per_track = 32; + } + secs_per_cylinder = ccg->heads * ccg->secs_per_track; + ccg->cylinders = ccg->volume_size / secs_per_cylinder; + ccb->ccb_h.status = CAM_REQ_CMP; + xpt_done(ccb); + break; + } + + case XPT_RESET_BUS: /* Reset the specified SCSI bus */ + ASR_resetBus (sc, cam_sim_bus(sim)); + ccb->ccb_h.status = CAM_REQ_CMP; + xpt_done(ccb); + break; + + case XPT_TERM_IO: /* Terminate the I/O process */ + /* XXX Implement */ + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + break; + + case XPT_PATH_INQ: /* Path routing inquiry */ + { + struct ccb_pathinq *cpi = &ccb->cpi; + + cpi->version_num = 1; /* XXX??? */ + cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE|PI_WIDE_16; + cpi->target_sprt = 0; + /* Not necessary to reset bus, done by HDM initialization */ + cpi->hba_misc = PIM_NOBUSRESET; + cpi->hba_eng_cnt = 0; + cpi->max_target = sc->ha_MaxId; + cpi->max_lun = sc->ha_MaxLun; + cpi->initiator_id = sc->ha_adapter_target[cam_sim_bus(sim)]; + cpi->bus_id = cam_sim_bus(sim); + cpi->base_transfer_speed = 3300; + strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); + strncpy(cpi->hba_vid, "Adaptec", HBA_IDLEN); + strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); + cpi->unit_number = cam_sim_unit(sim); + cpi->ccb_h.status = CAM_REQ_CMP; + xpt_done(ccb); + break; + } + default: + ccb->ccb_h.status = CAM_REQ_INVALID; + xpt_done(ccb); + break; + } +} /* asr_action */ + +#ifdef ASR_MEASURE_PERFORMANCE +#define WRITE_OP 1 +#define READ_OP 2 +#define min_submitR sc->ha_performance.read_by_size_min_time[index] +#define max_submitR sc->ha_performance.read_by_size_max_time[index] +#define min_submitW sc->ha_performance.write_by_size_min_time[index] +#define max_submitW sc->ha_performance.write_by_size_max_time[index] + +STATIC INLINE void +asr_IObySize( + IN Asr_softc_t * sc, + IN u_int32_t submitted_time, + IN int op, + IN int index) +{ + struct timeval submitted_timeval; + + submitted_timeval.tv_sec = 0; + submitted_timeval.tv_usec = submitted_time; + + if ( op == READ_OP ) { + ++sc->ha_performance.read_by_size_count[index]; + + if ( submitted_time != 0xffffffff ) { + timevaladd( + &sc->ha_performance.read_by_size_total_time[index], + &submitted_timeval); + if ( (min_submitR == 0) + || (submitted_time < min_submitR) ) { + min_submitR = submitted_time; + } + + if ( submitted_time > max_submitR ) { + max_submitR = submitted_time; + } + } + } else { + ++sc->ha_performance.write_by_size_count[index]; + if ( submitted_time != 0xffffffff ) { + timevaladd( + &sc->ha_performance.write_by_size_total_time[index], + &submitted_timeval); + if ( (submitted_time < min_submitW) + || (min_submitW == 0) ) { + min_submitW = submitted_time; + } + + if ( submitted_time > max_submitW ) { + max_submitW = submitted_time; + } + } + } +} /* asr_IObySize */ +#endif + +/* + * Handle processing of current CCB as pointed to by the Status. + */ +STATIC int +asr_intr ( + IN Asr_softc_t * sc) +{ + OUT int processed; + +#ifdef ASR_MEASURE_PERFORMANCE + struct timeval junk; + + microtime(&junk); + sc->ha_performance.intr_started = junk; +#endif + + for (processed = 0; + sc->ha_Virt->Status & Mask_InterruptsDisabled; + processed = 1) { + union asr_ccb * ccb; + U32 ReplyOffset; + PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply; + + if (((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE) + && ((ReplyOffset = sc->ha_Virt->FromFIFO) == EMPTY_QUEUE)) { + break; + } + Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)(ReplyOffset + - sc->ha_Msgs_Phys + (char *)(sc->ha_Msgs)); + /* + * We do not need any (optional byteswapping) method access to + * the Initiator context field. + */ + ccb = (union asr_ccb *)(long) + I2O_MESSAGE_FRAME_getInitiatorContext64( + &(Reply->StdReplyFrame.StdMessageFrame)); + if (I2O_MESSAGE_FRAME_getMsgFlags( + &(Reply->StdReplyFrame.StdMessageFrame)) + & I2O_MESSAGE_FLAGS_FAIL) { + defAlignLong(I2O_UTIL_NOP_MESSAGE,Message); + PI2O_UTIL_NOP_MESSAGE Message_Ptr; + U32 MessageOffset; + + MessageOffset = (u_long) + I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA( + (PI2O_FAILURE_REPLY_MESSAGE_FRAME)Reply); + /* + * Get the Original Message Frame's address, and get + * it's Transaction Context into our space. (Currently + * unused at original authorship, but better to be + * safe than sorry). Straight copy means that we + * need not concern ourselves with the (optional + * byteswapping) method access. + */ + Reply->StdReplyFrame.TransactionContext + = ((PI2O_SINGLE_REPLY_MESSAGE_FRAME) + (sc->ha_Virt->Address + MessageOffset)) + ->TransactionContext; + /* + * For 64 bit machines, we need to reconstruct the + * 64 bit context. + */ + ccb = (union asr_ccb *)(long) + I2O_MESSAGE_FRAME_getInitiatorContext64( + &(Reply->StdReplyFrame.StdMessageFrame)); + /* + * Unique error code for command failure. + */ + I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode( + &(Reply->StdReplyFrame), (u_int16_t)-2); + /* + * Modify the message frame to contain a NOP and + * re-issue it to the controller. + */ + Message_Ptr = (PI2O_UTIL_NOP_MESSAGE)ASR_fillMessage( + Message, sizeof(I2O_UTIL_NOP_MESSAGE)); +# if (I2O_UTIL_NOP != 0) + I2O_MESSAGE_FRAME_setFunction ( + &(Message_Ptr->StdMessageFrame), + I2O_UTIL_NOP); +# endif + /* + * Copy the packet out to the Original Message + */ + bcopy ((caddr_t)Message_Ptr, + sc->ha_Virt->Address + MessageOffset, + sizeof(I2O_UTIL_NOP_MESSAGE)); + /* + * Issue the NOP + */ + sc->ha_Virt->ToFIFO = MessageOffset; + } + + /* + * Asynchronous command with no return requirements, + * and a generic handler for immunity against odd error + * returns from the adapter. + */ + if (ccb == (union asr_ccb *)NULL) { + /* + * Return Reply so that it can be used for the + * next command + */ + sc->ha_Virt->FromFIFO = ReplyOffset; + continue; + } + + /* Welease Wadjah! (and stop timeouts) */ + ASR_ccbRemove (sc, ccb); + + switch ( + I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode( + &(Reply->StdReplyFrame))) { + + case I2O_SCSI_DSC_SUCCESS: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_REQ_CMP; + break; + + case I2O_SCSI_DSC_CHECK_CONDITION: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_REQ_CMP|CAM_AUTOSNS_VALID; + break; + + case I2O_SCSI_DSC_BUSY: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_ADAPTER_BUSY: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_SCSI_BUS_RESET: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_BUS_BUSY: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_SCSI_BUSY; + break; + + case I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_SEL_TIMEOUT; + break; + + case I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_LUN_INVALID: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_SCSI_TID_INVALID: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_CMD_TIMEOUT; + break; + + case I2O_SCSI_HBA_DSC_DATA_OVERRUN: + /* FALLTHRU */ + case I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_DATA_RUN_ERR; + break; + + default: + ccb->ccb_h.status &= ~CAM_STATUS_MASK; + ccb->ccb_h.status |= CAM_REQUEUE_REQ; + break; + } + if ((ccb->csio.resid = ccb->csio.dxfer_len) != 0) { + ccb->csio.resid -= + I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount( + Reply); + } + +#ifdef ASR_MEASURE_PERFORMANCE + { + struct timeval endTime; + u_int32_t submitted_time; + u_int32_t size; + int op_type; + int startTimeIndex; + + --sc->ha_submitted_ccbs_count; + startTimeIndex + = (int)Reply->StdReplyFrame.TransactionContext; + if (-1 != startTimeIndex) { + /* Compute the time spent in device/adapter */ + microtime(&endTime); + submitted_time = asr_time_delta(sc->ha_timeQ[ + startTimeIndex], endTime); + /* put the startTimeIndex back on free list */ + ENQ_TIMEQ_FREE_LIST(startTimeIndex, + sc->ha_timeQFreeList, + sc->ha_timeQFreeHead, + sc->ha_timeQFreeTail); + } else { + submitted_time = 0xffffffff; + } + +#define maxctime sc->ha_performance.max_command_time[ccb->csio.cdb_io.cdb_bytes[0]] +#define minctime sc->ha_performance.min_command_time[ccb->csio.cdb_io.cdb_bytes[0]] + if (submitted_time != 0xffffffff) { + if ( maxctime < submitted_time ) { + maxctime = submitted_time; + } + if ( (minctime == 0) + || (minctime > submitted_time) ) { + minctime = submitted_time; + } + + if ( sc->ha_performance.max_submit_time + < submitted_time ) { + sc->ha_performance.max_submit_time + = submitted_time; + } + if ( sc->ha_performance.min_submit_time == 0 + || sc->ha_performance.min_submit_time + > submitted_time) { + sc->ha_performance.min_submit_time + = submitted_time; + } + + switch ( ccb->csio.cdb_io.cdb_bytes[0] ) { + + case 0xa8: /* 12-byte READ */ + /* FALLTHRU */ + case 0x08: /* 6-byte READ */ + /* FALLTHRU */ + case 0x28: /* 10-byte READ */ + op_type = READ_OP; + break; + + case 0x0a: /* 6-byte WRITE */ + /* FALLTHRU */ + case 0xaa: /* 12-byte WRITE */ + /* FALLTHRU */ + case 0x2a: /* 10-byte WRITE */ + op_type = WRITE_OP; + break; + + default: + op_type = 0; + break; + } + + if ( op_type != 0 ) { + struct scsi_rw_big * cmd; + + cmd = (struct scsi_rw_big *) + &(ccb->csio.cdb_io); + + size = (((u_int32_t) cmd->length2 << 8) + | ((u_int32_t) cmd->length1)) << 9; + + switch ( size ) { + + case 512: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_512); + break; + + case 1024: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_1K); + break; + + case 2048: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_2K); + break; + + case 4096: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_4K); + break; + + case 8192: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_8K); + break; + + case 16384: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_16K); + break; + + case 32768: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_32K); + break; + + case 65536: + asr_IObySize(sc, + submitted_time, op_type, + SIZE_64K); + break; + + default: + if ( size > (1 << 16) ) { + asr_IObySize(sc, + submitted_time, + op_type, + SIZE_BIGGER); + } else { + asr_IObySize(sc, + submitted_time, + op_type, + SIZE_OTHER); + } + break; + } + } + } + } +#endif + /* Sense data in reply packet */ + if (ccb->ccb_h.status & CAM_AUTOSNS_VALID) { + u_int16_t size = I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getAutoSenseTransferCount(Reply); + + if (size) { + if (size > sizeof(ccb->csio.sense_data)) { + size = sizeof(ccb->csio.sense_data); + } + if (size > I2O_SCSI_SENSE_DATA_SZ) { + size = I2O_SCSI_SENSE_DATA_SZ; + } + if ((ccb->csio.sense_len) + && (size > ccb->csio.sense_len)) { + size = ccb->csio.sense_len; + } + bcopy ((caddr_t)Reply->SenseData, + (caddr_t)&(ccb->csio.sense_data), size); + } + } + + /* + * Return Reply so that it can be used for the next command + * since we have no more need for it now + */ + sc->ha_Virt->FromFIFO = ReplyOffset; + + if (ccb->ccb_h.path) { + xpt_done ((union ccb *)ccb); + } else { + wakeup ((caddr_t)ccb); + } + } +#ifdef ASR_MEASURE_PERFORMANCE + { + u_int32_t result; + + microtime(&junk); + result = asr_time_delta(sc->ha_performance.intr_started, junk); + + if (result != 0xffffffff) { + if ( sc->ha_performance.max_intr_time < result ) { + sc->ha_performance.max_intr_time = result; + } + + if ( (sc->ha_performance.min_intr_time == 0) + || (sc->ha_performance.min_intr_time > result) ) { + sc->ha_performance.min_intr_time = result; + } + } + } +#endif + return (processed); +} /* asr_intr */ + +#undef QueueSize /* Grrrr */ +#undef SG_Size /* Grrrr */ + +/* + * Meant to be included at the bottom of asr.c !!! + */ + +/* + * Included here as hard coded. Done because other necessary include + * files utilize C++ comment structures which make them a nuisance to + * included here just to pick up these three typedefs. + */ +typedef U32 DPT_TAG_T; +typedef U32 DPT_MSG_T; +typedef U32 DPT_RTN_T; + +#undef SCSI_RESET /* Conflicts with "scsi/scsiconf.h" defintion */ +#include "dev/asr/osd_unix.h" + +#define asr_unit(dev) minor(dev) + +STATIC INLINE Asr_softc_t * +ASR_get_sc ( + IN dev_t dev) +{ + int unit = asr_unit(dev); + OUT Asr_softc_t * sc = Asr_softc; + + while (sc && sc->ha_sim[0] && (cam_sim_unit(sc->ha_sim[0]) != unit)) { + sc = sc->ha_next; + } + return (sc); +} /* ASR_get_sc */ + +STATIC u_int8_t ASR_ctlr_held; + +STATIC int +asr_open( + IN dev_t dev, + int32_t flags, + int32_t ifmt, + IN struct proc * proc) +{ + int s; + OUT int error; + UNREFERENCED_PARAMETER(flags); + UNREFERENCED_PARAMETER(ifmt); + + if (ASR_get_sc (dev) == (Asr_softc_t *)NULL) { + return (ENODEV); + } + s = splcam (); + if (ASR_ctlr_held) { + error = EBUSY; + } else if ((error = suser(proc)) == 0) { + ++ASR_ctlr_held; + } + splx(s); + return (error); +} /* asr_open */ + +STATIC int +asr_close( + dev_t dev, + int flags, + int ifmt, + struct proc * proc) +{ + UNREFERENCED_PARAMETER(dev); + UNREFERENCED_PARAMETER(flags); + UNREFERENCED_PARAMETER(ifmt); + UNREFERENCED_PARAMETER(proc); + + ASR_ctlr_held = 0; + return (0); +} /* asr_close */ + + +/*-------------------------------------------------------------------------*/ +/* Function ASR_queue_i */ +/*-------------------------------------------------------------------------*/ +/* The Parameters Passed To This Function Are : */ +/* Asr_softc_t * : HBA miniport driver's adapter data storage. */ +/* PI2O_MESSAGE_FRAME : Msg Structure Pointer For This Command */ +/* I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME following the Msg Structure */ +/* */ +/* This Function Will Take The User Request Packet And Convert It To An */ +/* I2O MSG And Send It Off To The Adapter. */ +/* */ +/* Return : 0 For OK, Error Code Otherwise */ +/*-------------------------------------------------------------------------*/ +STATIC INLINE int +ASR_queue_i( + IN Asr_softc_t * sc, + INOUT PI2O_MESSAGE_FRAME Packet) +{ + union asr_ccb * ccb; + PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply; + PI2O_MESSAGE_FRAME Message_Ptr; + PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME Reply_Ptr; + int MessageSizeInBytes; + int ReplySizeInBytes; + int error; + int s; + /* Scatter Gather buffer list */ + struct ioctlSgList_S { + SLIST_ENTRY(ioctlSgList_S) link; + caddr_t UserSpace; + I2O_FLAGS_COUNT FlagsCount; + char KernelSpace[sizeof(long)]; + } * elm; + /* Generates a `first' entry */ + SLIST_HEAD(ioctlSgListHead_S, ioctlSgList_S) sgList; + + if (ASR_getBlinkLedCode(sc)) { + debug_usr_cmd_printf ("Adapter currently in BlinkLed %x\n", + ASR_getBlinkLedCode(sc)); + return (EIO); + } + /* Copy in the message into a local allocation */ + if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc ( + sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK)) + == (PI2O_MESSAGE_FRAME)NULL) { + debug_usr_cmd_printf ( + "Failed to acquire I2O_MESSAGE_FRAME memory\n"); + return (ENOMEM); + } + if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr, + sizeof(I2O_MESSAGE_FRAME))) != 0) { + free (Message_Ptr, M_TEMP); + debug_usr_cmd_printf ("Can't copy in packet errno=%d\n", error); + return (error); + } + /* Acquire information to determine type of packet */ + MessageSizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr)<<2); + /* The offset of the reply information within the user packet */ + Reply = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)((char *)Packet + + MessageSizeInBytes); + + /* Check if the message is a synchronous initialization command */ + s = I2O_MESSAGE_FRAME_getFunction(Message_Ptr); + free (Message_Ptr, M_TEMP); + switch (s) { + + case I2O_EXEC_IOP_RESET: + { U32 status; + + status = ASR_resetIOP(sc->ha_Virt); + ReplySizeInBytes = sizeof(status); + debug_usr_cmd_printf ("resetIOP done\n"); + return (copyout ((caddr_t)&status, (caddr_t)Reply, + ReplySizeInBytes)); + } + + case I2O_EXEC_STATUS_GET: + { I2O_EXEC_STATUS_GET_REPLY status; + + if (ASR_getStatus (sc->ha_Virt, &status) + == (PI2O_EXEC_STATUS_GET_REPLY)NULL) { + debug_usr_cmd_printf ("getStatus failed\n"); + return (ENXIO); + } + ReplySizeInBytes = sizeof(status); + debug_usr_cmd_printf ("getStatus done\n"); + return (copyout ((caddr_t)&status, (caddr_t)Reply, + ReplySizeInBytes)); + } + + case I2O_EXEC_OUTBOUND_INIT: + { U32 status; + + status = ASR_initOutBound(sc); + ReplySizeInBytes = sizeof(status); + debug_usr_cmd_printf ("intOutBound done\n"); + return (copyout ((caddr_t)&status, (caddr_t)Reply, + ReplySizeInBytes)); + } + } + + /* Determine if the message size is valid */ + if ((MessageSizeInBytes < sizeof(I2O_MESSAGE_FRAME)) + || (MAX_INBOUND_SIZE < MessageSizeInBytes)) { + debug_usr_cmd_printf ("Packet size %d incorrect\n", + MessageSizeInBytes); + return (EINVAL); + } + + if ((Message_Ptr = (PI2O_MESSAGE_FRAME)malloc (MessageSizeInBytes, + M_TEMP, M_WAITOK)) == (PI2O_MESSAGE_FRAME)NULL) { + debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n", + MessageSizeInBytes); + return (ENOMEM); + } + if ((error = copyin ((caddr_t)Packet, (caddr_t)Message_Ptr, + MessageSizeInBytes)) != 0) { + free (Message_Ptr, M_TEMP); + debug_usr_cmd_printf ("Can't copy in packet[%d] errno=%d\n", + MessageSizeInBytes, error); + return (error); + } + + /* Check the size of the reply frame, and start constructing */ + + if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc ( + sizeof(I2O_MESSAGE_FRAME), M_TEMP, M_WAITOK)) + == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { + free (Message_Ptr, M_TEMP); + debug_usr_cmd_printf ( + "Failed to acquire I2O_MESSAGE_FRAME memory\n"); + return (ENOMEM); + } + if ((error = copyin ((caddr_t)Reply, (caddr_t)Reply_Ptr, + sizeof(I2O_MESSAGE_FRAME))) != 0) { + free (Reply_Ptr, M_TEMP); + free (Message_Ptr, M_TEMP); + debug_usr_cmd_printf ( + "Failed to copy in reply frame, errno=%d\n", + error); + return (error); + } + ReplySizeInBytes = (I2O_MESSAGE_FRAME_getMessageSize( + &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) << 2); + free (Reply_Ptr, M_TEMP); + if (ReplySizeInBytes < sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)) { + free (Message_Ptr, M_TEMP); + debug_usr_cmd_printf ( + "Failed to copy in reply frame[%d], errno=%d\n", + ReplySizeInBytes, error); + return (EINVAL); + } + + if ((Reply_Ptr = (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)malloc ( + ((ReplySizeInBytes > sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)) + ? ReplySizeInBytes + : sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)), + M_TEMP, M_WAITOK)) == (PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME)NULL) { + free (Message_Ptr, M_TEMP); + debug_usr_cmd_printf ("Failed to acquire frame[%d] memory\n", + ReplySizeInBytes); + return (ENOMEM); + } + (void)ASR_fillMessage ((char *)Reply_Ptr, ReplySizeInBytes); + Reply_Ptr->StdReplyFrame.StdMessageFrame.InitiatorContext + = Message_Ptr->InitiatorContext; + Reply_Ptr->StdReplyFrame.TransactionContext + = ((PI2O_PRIVATE_MESSAGE_FRAME)Message_Ptr)->TransactionContext; + I2O_MESSAGE_FRAME_setMsgFlags( + &(Reply_Ptr->StdReplyFrame.StdMessageFrame), + I2O_MESSAGE_FRAME_getMsgFlags( + &(Reply_Ptr->StdReplyFrame.StdMessageFrame)) + | I2O_MESSAGE_FLAGS_REPLY); + + /* Check if the message is a special case command */ + switch (I2O_MESSAGE_FRAME_getFunction(Message_Ptr)) { + case I2O_EXEC_SYS_TAB_SET: /* Special Case of empty Scatter Gather */ + if (MessageSizeInBytes == ((I2O_MESSAGE_FRAME_getVersionOffset( + Message_Ptr) & 0xF0) >> 2)) { + free (Message_Ptr, M_TEMP); + I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode( + &(Reply_Ptr->StdReplyFrame), (ASR_setSysTab(sc) != CAM_REQ_CMP)); + I2O_MESSAGE_FRAME_setMessageSize( + &(Reply_Ptr->StdReplyFrame.StdMessageFrame), + sizeof(I2O_SINGLE_REPLY_MESSAGE_FRAME)); + error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply, + ReplySizeInBytes); + free (Reply_Ptr, M_TEMP); + return (error); + } + } + + /* Deal in the general case */ + /* First allocate and optionally copy in each scatter gather element */ + SLIST_INIT(&sgList); + if ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) != 0) { + PI2O_SGE_SIMPLE_ELEMENT sg; + + /* + * since this code is reused in several systems, code + * efficiency is greater by using a shift operation rather + * than a divide by sizeof(u_int32_t). + */ + sg = (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr + + ((I2O_MESSAGE_FRAME_getVersionOffset(Message_Ptr) & 0xF0) + >> 2)); + while (sg < (PI2O_SGE_SIMPLE_ELEMENT)(((caddr_t)Message_Ptr) + + MessageSizeInBytes)) { + caddr_t v; + int len; + + if ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount)) + & I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT) == 0) { + error = EINVAL; + break; + } + len = I2O_FLAGS_COUNT_getCount(&(sg->FlagsCount)); + debug_usr_cmd_printf ("SG[%d] = %x[%d]\n", + sg - (PI2O_SGE_SIMPLE_ELEMENT)((char *)Message_Ptr + + ((I2O_MESSAGE_FRAME_getVersionOffset( + Message_Ptr) & 0xF0) >> 2)), + I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), len); + + if ((elm = (struct ioctlSgList_S *)malloc ( + sizeof(*elm) - sizeof(elm->KernelSpace) + len, + M_TEMP, M_WAITOK)) + == (struct ioctlSgList_S *)NULL) { + debug_usr_cmd_printf ( + "Failed to allocate SG[%d]\n", len); + error = ENOMEM; + break; + } + SLIST_INSERT_HEAD(&sgList, elm, link); + elm->FlagsCount = sg->FlagsCount; + elm->UserSpace = (caddr_t) + (I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg)); + v = elm->KernelSpace; + /* Copy in outgoing data (DIR bit could be invalid) */ + if ((error = copyin (elm->UserSpace, (caddr_t)v, len)) + != 0) { + break; + } + /* + * If the buffer is not contiguous, lets + * break up the scatter/gather entries. + */ + while ((len > 0) + && (sg < (PI2O_SGE_SIMPLE_ELEMENT) + (((caddr_t)Message_Ptr) + MAX_INBOUND_SIZE))) { + int next, base, span; + + span = 0; + next = base = KVTOPHYS(v); + I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(sg, + base); + + /* How far can we go physically contiguously */ + while ((len > 0) && (base == next)) { + int size; + + next = trunc_page(base) + PAGE_SIZE; + size = next - base; + if (size > len) { + size = len; + } + span += size; + v += size; + len -= size; + base = KVTOPHYS(v); + } + + /* Construct the Flags */ + I2O_FLAGS_COUNT_setCount(&(sg->FlagsCount), + span); + { + int flags = I2O_FLAGS_COUNT_getFlags( + &(elm->FlagsCount)); + /* Any remaining length? */ + if (len > 0) { + flags &= + ~(I2O_SGL_FLAGS_END_OF_BUFFER + | I2O_SGL_FLAGS_LAST_ELEMENT); + } + I2O_FLAGS_COUNT_setFlags( + &(sg->FlagsCount), flags); + } + + debug_usr_cmd_printf ("sg[%d] = %x[%d]\n", + sg - (PI2O_SGE_SIMPLE_ELEMENT) + ((char *)Message_Ptr + + ((I2O_MESSAGE_FRAME_getVersionOffset( + Message_Ptr) & 0xF0) >> 2)), + I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(sg), + span); + if (len <= 0) { + break; + } + + /* + * Incrementing requires resizing of the + * packet, and moving up the existing SG + * elements. + */ + ++sg; + MessageSizeInBytes += sizeof(*sg); + I2O_MESSAGE_FRAME_setMessageSize(Message_Ptr, + I2O_MESSAGE_FRAME_getMessageSize(Message_Ptr) + + (sizeof(*sg) / sizeof(U32))); + { + PI2O_MESSAGE_FRAME NewMessage_Ptr; + + if ((NewMessage_Ptr + = (PI2O_MESSAGE_FRAME) + malloc (MessageSizeInBytes, + M_TEMP, M_WAITOK)) + == (PI2O_MESSAGE_FRAME)NULL) { + debug_usr_cmd_printf ( + "Failed to acquire frame[%d] memory\n", + MessageSizeInBytes); + error = ENOMEM; + break; + } + span = ((caddr_t)sg) + - (caddr_t)Message_Ptr; + bcopy ((caddr_t)Message_Ptr, + (caddr_t)NewMessage_Ptr, span); + bcopy ((caddr_t)(sg-1), + ((caddr_t)NewMessage_Ptr) + span, + MessageSizeInBytes - span); + free (Message_Ptr, M_TEMP); + sg = (PI2O_SGE_SIMPLE_ELEMENT) + (((caddr_t)NewMessage_Ptr) + span); + Message_Ptr = NewMessage_Ptr; + } + } + if ((error) + || ((I2O_FLAGS_COUNT_getFlags(&(sg->FlagsCount)) + & I2O_SGL_FLAGS_LAST_ELEMENT) != 0)) { + break; + } + ++sg; + } + if (error) { + while ((elm = SLIST_FIRST(&sgList)) + != (struct ioctlSgList_S *)NULL) { + SLIST_REMOVE_HEAD(&sgList,link); + free (elm, M_TEMP); + } + free (Reply_Ptr, M_TEMP); + free (Message_Ptr, M_TEMP); + return (error); + } + } + + debug_usr_cmd_printf ("Inbound: "); + debug_usr_cmd_dump_message(Message_Ptr); + + /* Send the command */ + if ((ccb = asr_alloc_ccb (sc)) == (union asr_ccb *)NULL) { + /* Free up in-kernel buffers */ + while ((elm = SLIST_FIRST(&sgList)) + != (struct ioctlSgList_S *)NULL) { + SLIST_REMOVE_HEAD(&sgList,link); + free (elm, M_TEMP); + } + free (Reply_Ptr, M_TEMP); + free (Message_Ptr, M_TEMP); + return (ENOMEM); + } + + /* + * We do not need any (optional byteswapping) method access to + * the Initiator context field. + */ + I2O_MESSAGE_FRAME_setInitiatorContext64( + (PI2O_MESSAGE_FRAME)Message_Ptr, (long)ccb); + + (void)ASR_queue (sc, (PI2O_MESSAGE_FRAME)Message_Ptr); + + free (Message_Ptr, M_TEMP); + + /* + * Wait for the board to report a finished instruction. + */ + s = splcam(); + while (ccb->ccb_h.status == CAM_REQ_INPROG) { + if (ASR_getBlinkLedCode(sc)) { + /* Reset Adapter */ + printf ("asr%d: Blink LED 0x%x resetting adapter\n", + cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), + ASR_getBlinkLedCode(sc)); + ASR_reset (sc); + splx(s); + /* Command Cleanup */ + ASR_ccbRemove(sc, ccb); + /* Free up in-kernel buffers */ + while ((elm = SLIST_FIRST(&sgList)) + != (struct ioctlSgList_S *)NULL) { + SLIST_REMOVE_HEAD(&sgList,link); + free (elm, M_TEMP); + } + free (Reply_Ptr, M_TEMP); + asr_free_ccb(ccb); + return (EIO); + } + /* Check every second for BlinkLed */ + /* There is no PRICAM, but outwardly PRIBIO is functional */ + tsleep((caddr_t)ccb, PRIBIO, "asr", hz); + } + splx(s); + + debug_usr_cmd_printf ("Outbound: "); + debug_usr_cmd_dump_message(Reply_Ptr); + + I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode( + &(Reply_Ptr->StdReplyFrame), (ccb->ccb_h.status != CAM_REQ_CMP)); + + if (ReplySizeInBytes >= (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) + - I2O_SCSI_SENSE_DATA_SZ - sizeof(U32))) { + I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setTransferCount(Reply_Ptr, + ccb->csio.dxfer_len - ccb->csio.resid); + } + if ((ccb->ccb_h.status & CAM_AUTOSNS_VALID) && (ReplySizeInBytes + > (sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) + - I2O_SCSI_SENSE_DATA_SZ))) { + int size = ReplySizeInBytes + - sizeof(I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME) + - I2O_SCSI_SENSE_DATA_SZ; + + if (size > sizeof(ccb->csio.sense_data)) { + size = sizeof(ccb->csio.sense_data); + } + bcopy ((caddr_t)&(ccb->csio.sense_data), (caddr_t)Reply_Ptr->SenseData, + size); + I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setAutoSenseTransferCount( + Reply_Ptr, size); + } + + /* Free up in-kernel buffers */ + while ((elm = SLIST_FIRST(&sgList)) != (struct ioctlSgList_S *)NULL) { + /* Copy out as necessary */ + if ((error == 0) + /* DIR bit considered `valid', error due to ignorance works */ + && ((I2O_FLAGS_COUNT_getFlags(&(elm->FlagsCount)) + & I2O_SGL_FLAGS_DIR) == 0)) { + error = copyout ((caddr_t)(elm->KernelSpace), + elm->UserSpace, + I2O_FLAGS_COUNT_getCount(&(elm->FlagsCount))); + } + SLIST_REMOVE_HEAD(&sgList,link); + free (elm, M_TEMP); + } + if (error == 0) { + /* Copy reply frame to user space */ + error = copyout ((caddr_t)Reply_Ptr, (caddr_t)Reply, + ReplySizeInBytes); + } + free (Reply_Ptr, M_TEMP); + asr_free_ccb(ccb); + + return (error); +} /* ASR_queue_i */ + +/*----------------------------------------------------------------------*/ +/* Function asr_ioctl */ +/*----------------------------------------------------------------------*/ +/* The parameters passed to this function are : */ +/* dev : Device number. */ +/* cmd : Ioctl Command */ +/* data : User Argument Passed In. */ +/* flag : Mode Parameter */ +/* proc : Process Parameter */ +/* */ +/* This function is the user interface into this adapter driver */ +/* */ +/* Return : zero if OK, error code if not */ +/*----------------------------------------------------------------------*/ + +STATIC int +asr_ioctl( + IN dev_t dev, + IN u_long cmd, + INOUT caddr_t data, + int flag, + struct proc * proc) +{ + int i, j; + OUT int error = 0; + Asr_softc_t * sc = ASR_get_sc (dev); + UNREFERENCED_PARAMETER(flag); + UNREFERENCED_PARAMETER(proc); + + if (sc != (Asr_softc_t *)NULL) + switch(cmd) { + + case DPT_SIGNATURE: +# if (dsDescription_size != 50) + case DPT_SIGNATURE + ((50 - dsDescription_size) << 16): +# endif + if (cmd & 0xFFFF0000) { + (void)bcopy ((caddr_t)(&ASR_sig), data, + sizeof(dpt_sig_S)); + return (0); + } + /* Traditional version of the ioctl interface */ + case DPT_SIGNATURE & 0x0000FFFF: + return (copyout ((caddr_t)(&ASR_sig), *((caddr_t *)data), + sizeof(dpt_sig_S))); + + /* Traditional version of the ioctl interface */ + case DPT_CTRLINFO & 0x0000FFFF: + case DPT_CTRLINFO: { + struct { + u_int16_t length; + u_int16_t drvrHBAnum; + u_int32_t baseAddr; + u_int16_t blinkState; + u_int8_t pciBusNum; + u_int8_t pciDeviceNum; + u_int16_t hbaFlags; + u_int16_t Interrupt; + u_int32_t reserved1; + u_int32_t reserved2; + u_int32_t reserved3; + } CtlrInfo; + + bzero (&CtlrInfo, sizeof(CtlrInfo)); + CtlrInfo.length = sizeof(CtlrInfo) - sizeof(u_int16_t); + CtlrInfo.drvrHBAnum = asr_unit(dev); + CtlrInfo.baseAddr = (u_long)sc->ha_Base; + i = ASR_getBlinkLedCode (sc); + if (i == -1) { + i = 0; + } + CtlrInfo.blinkState = i; + CtlrInfo.pciBusNum = sc->ha_pciBusNum; + CtlrInfo.pciDeviceNum = sc->ha_pciDeviceNum; +#define FLG_OSD_PCI_VALID 0x0001 +#define FLG_OSD_DMA 0x0002 +#define FLG_OSD_I2O 0x0004 + CtlrInfo.hbaFlags = FLG_OSD_PCI_VALID | FLG_OSD_DMA | FLG_OSD_I2O; + CtlrInfo.Interrupt = sc->ha_irq; + if (cmd & 0xFFFF0000) { + bcopy (&CtlrInfo, data, sizeof(CtlrInfo)); + } else { + error = copyout (&CtlrInfo, *(caddr_t *)data, sizeof(CtlrInfo)); + } + } return (error); + + /* Traditional version of the ioctl interface */ + case DPT_SYSINFO & 0x0000FFFF: + case DPT_SYSINFO: { + sysInfo_S Info; + caddr_t c_addr; + /* Kernel Specific ptok `hack' */ +# define ptok(a) ((char *)(a) + KERNBASE) + + bzero (&Info, sizeof(Info)); + + outb (0x70, 0x12); + i = inb(0x71); + j = i >> 4; + if (i == 0x0f) { + outb (0x70, 0x19); + j = inb (0x71); + } + Info.drive0CMOS = j; + + j = i & 0x0f; + if (i == 0x0f) { + outb (0x70, 0x1a); + j = inb (0x71); + } + Info.drive1CMOS = j; + + Info.numDrives = *((char *)ptok(0x475)); + + Info.processorFamily = ASR_sig.dsProcessorFamily; + switch (cpu) { + case CPU_386SX: case CPU_386: + Info.processorType = PROC_386; break; + case CPU_486SX: case CPU_486: + Info.processorType = PROC_486; break; + case CPU_586: + Info.processorType = PROC_PENTIUM; break; + case CPU_686: + Info.processorType = PROC_SEXIUM; break; + } + Info.osType = OS_BSDI_UNIX; + Info.osMajorVersion = osrelease[0] - '0'; + Info.osMinorVersion = osrelease[2] - '0'; + /* Info.osRevision = 0; */ + /* Info.osSubRevision = 0; */ + Info.busType = SI_PCI_BUS; + Info.flags = SI_CMOS_Valid | SI_NumDrivesValid + | SI_OSversionValid |SI_BusTypeValid; + + /* Go Out And Look For SmartROM */ + for(i = 0; i < 3; ++i) { + int k; + + if (i == 0) { + j = 0xC8000; + } else if (i == 1) { + j = 0xD8000; + } else { + j = 0xDC000; + } + c_addr = ptok(j); + if (*((unsigned short *)c_addr) != 0xAA55) { + continue; + } + if (*((u_long *)(c_addr + 6)) != 0x202053) { + continue; + } + if (*((u_long *)(c_addr + 10)) != 0x545044) { + continue; + } + c_addr += 0x24; + for (k = 0; k < 64; ++k) { + if ((*((unsigned char *)(c_addr++)) == ' ') + && (*((unsigned char *)(c_addr)) == 'v')) { + break; + } + } + if (k < 64) { + Info.smartROMMajorVersion + = *((unsigned char *)(c_addr += 3)) - '0'; + Info.smartROMMinorVersion + = *((unsigned char *)(c_addr += 2)); + Info.smartROMRevision + = *((unsigned char *)(++c_addr)); + Info.flags |= SI_SmartROMverValid; + break; + } + } + if (i >= 3) { + Info.flags |= SI_NO_SmartROM; + } + /* Get The Conventional Memory Size From CMOS */ + outb (0x70, 0x16); + j = inb (0x71); + j <<= 8; + outb (0x70, 0x15); + j |= inb(0x71); + Info.conventionalMemSize = j; + + /* Get The Extended Memory Found At Power On From CMOS */ + outb (0x70, 0x31); + j = inb (0x71); + j <<= 8; + outb (0x70, 0x30); + j |= inb(0x71); + Info.extendedMemSize = j; + Info.flags |= SI_MemorySizeValid; + +# if (defined(THIS_IS_BROKEN)) + /* If There Is 1 or 2 Drives Found, Set Up Drive Parameters */ + if (Info.numDrives > 0) { + /* + * Get The Pointer From Int 41 For The First + * Drive Parameters + */ + j = ((unsigned)(*((unsigned short *)ptok(0x104+2))) << 4) + + (unsigned)(*((unsigned short *)ptok(0x104+0))); + /* + * It appears that SmartROM's Int41/Int46 pointers + * use memory that gets stepped on by the kernel + * loading. We no longer have access to this + * geometry information but try anyways (!?) + */ + Info.drives[0].cylinders = *((unsigned char *)ptok(j)); + ++j; + Info.drives[0].cylinders += ((int)*((unsigned char *) + ptok(j))) << 8; + ++j; + Info.drives[0].heads = *((unsigned char *)ptok(j)); + j += 12; + Info.drives[0].sectors = *((unsigned char *)ptok(j)); + Info.flags |= SI_DriveParamsValid; + if ((Info.drives[0].cylinders == 0) + || (Info.drives[0].heads == 0) + || (Info.drives[0].sectors == 0)) { + Info.flags &= ~SI_DriveParamsValid; + } + if (Info.numDrives > 1) { + /* + * Get The Pointer From Int 46 For The + * Second Drive Parameters + */ + j = ((unsigned)(*((unsigned short *)ptok(0x118+2))) << 4) + + (unsigned)(*((unsigned short *)ptok(0x118+0))); + Info.drives[1].cylinders = *((unsigned char *) + ptok(j)); + ++j; + Info.drives[1].cylinders += ((int) + *((unsigned char *)ptok(j))) << 8; + ++j; + Info.drives[1].heads = *((unsigned char *) + ptok(j)); + j += 12; + Info.drives[1].sectors = *((unsigned char *) + ptok(j)); + if ((Info.drives[1].cylinders == 0) + || (Info.drives[1].heads == 0) + || (Info.drives[1].sectors == 0)) { + Info.flags &= ~SI_DriveParamsValid; + } + } + } +# endif + /* Copy Out The Info Structure To The User */ + if (cmd & 0xFFFF0000) { + bcopy (&Info, data, sizeof(Info)); + } else { + error = copyout (&Info, *(caddr_t *)data, sizeof(Info)); + } + return (error); } + + /* Get The BlinkLED State */ + case DPT_BLINKLED: + i = ASR_getBlinkLedCode (sc); + if (i == -1) { + i = 0; + } + if (cmd & 0xFFFF0000) { + bcopy ((caddr_t)(&i), data, sizeof(i)); + } else { + error = copyout (&i, *(caddr_t *)data, sizeof(i)); + } + break; + + /* Get performance metrics */ +#ifdef ASR_MEASURE_PERFORMANCE + case DPT_PERF_INFO: + bcopy((caddr_t) &sc->ha_performance, data, + sizeof(sc->ha_performance)); + return (0); +#endif + + /* Send an I2O command */ + case I2OUSRCMD: + return (ASR_queue_i (sc, *((PI2O_MESSAGE_FRAME *)data))); + + /* Reset and re-initialize the adapter */ + case I2ORESETCMD: + ASR_reset (sc); + return (0); + + /* Rescan the LCT table and resynchronize the information */ + case I2ORESCANCMD: + return (ASR_rescan (sc)); + } + return (EINVAL); +} /* asr_ioctl */ + +#ifdef ASR_MEASURE_PERFORMANCE +/* + * This function subtracts one timeval structure from another, + * Returning the result in usec. + * It assumes that less than 4 billion usecs passed form start to end. + * If times are sensless, 0xffffffff is returned. + */ + +STATIC u_int32_t +asr_time_delta( + IN struct timeval start, + IN struct timeval end) +{ + OUT u_int32_t result; + + if (start.tv_sec > end.tv_sec) { + result = 0xffffffff; + } + else { + if (start.tv_sec == end.tv_sec) { + if (start.tv_usec > end.tv_usec) { + result = 0xffffffff; + } else { + return (end.tv_usec - start.tv_usec); + } + } else { + return (end.tv_sec - start.tv_sec) * 1000000 + + end.tv_usec + (1000000 - start.tv_usec); + } + } + return(result); +} /* asr_time_delta */ +#endif diff --git a/sys/dev/asr/dptalign.h b/sys/dev/asr/dptalign.h new file mode 100644 index 0000000..c04a1b6 --- /dev/null +++ b/sys/dev/asr/dptalign.h @@ -0,0 +1,385 @@ +/* $FreeBSD$ */ +/* + * Copyright (c) 1996-1999 Distributed Processing Technology Corporation + * All rights reserved. + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of x driver software, even if advised + * of the possibility of such damage. + * + * DPT Alignment Description File + * + */ +#if (!defined(__DPTALIGN_H)) +#define __DPTALIGN_H + +/* + * File - DPTALIGN.H + * + * Description: This file contains basic Alignment support definitions. + * + * Copyright Distributed Processing Technology, Corp. + * 140 Candace Dr. + * Maitland, Fl. 32751 USA + * Phone: (407) 830-5522 Fax: (407) 260-5366 + * All Rights Reserved + * + * Author: Mark Salyzyn + * Date: Aug 29 1996 + * + * + * Fifth Gen product enhancements and additions + * Author: Ben Ghofrani + * Date: April 6 1998 + */ + +/* + * Description: Support macros for active alignment + * Requires: + * osdLocal2(x) + * osdLocal4(x) + * osdSwap2(x) + * osdSwap4(x) + */ +#if (!defined(__FAR__)) +# if (defined(__BORLANDC__)) +# define __FAR__ far +# else +# define __FAR__ +# endif +#endif + + +#if (defined(sun)) && (!defined(_ILP32)) +# define DPT_4_BYTES int /* 64 bit OS */ +#else +# define DPT_4_BYTES long +#endif + +#if (!defined(osdSwap2)) +/* + * Name: osdSwap2(value) + * Description: Mandatory byte swapping routine for words. We allow an + * override of x routine if the OS supplies it's own byte swapping + * routine, inline or macro. + */ +# define osdSwap2(x) (((unsigned short)(x) >> 8) \ + | ((unsigned short)((unsigned char)(x)) << 8)) +#endif +#if (!defined(osdSwap4)) +/* + * Name: osdSwap4(value) + * Description: Mandatory byte swapping routine for DPT_4_BYTES words. We allow + * an override of x routine if the OS supplies it's own byte swapping + * routine, inline or macro. The following is universal, but may be + * more optimally performed by an OS or driver processor dependant + * routine. + */ +# define osdSwap4(x) ( \ + (((unsigned DPT_4_BYTES)(x)) >> 24L) \ + | ((unsigned DPT_4_BYTES)(((unsigned short)((unsigned DPT_4_BYTES)(x) >> 8L)) & 0xFF00)) \ + | (((unsigned DPT_4_BYTES)(((unsigned short)(x)) & 0xFF00)) << 8L) \ + | (((unsigned DPT_4_BYTES)((unsigned char)(x))) << 24L)) +#endif + + + +#if (!defined(osdLocal2)) +/* + * Name: osdLocal2(pointer) + * Description: Local byte order to Big Endian Format for short words. + * Could be replaced with an OS defined localization routine, macro or + * inline. + */ +# if (defined(_DPT_BIG_ENDIAN)) +# define osdLocal2(x) (*((unsigned short __FAR__ *)(x))) +# if (defined(osdSwap2)) +# define osdSLocal2(x) osdSwap2(osdLocal2(x)) +# else +# define osdSLocal2(x) ((unsigned short)(((unsigned char __FAR__ *)(x))[1])\ + + ((unsigned int)((unsigned short)(((unsigned char __FAR__ *)(x))[0])) << 8)) +# endif +# else +# define osdSLocal2(x) (*((unsigned short __FAR__ *)(x))) +# if (defined(osdSwap2)) +# define osdLocal2(x) osdSwap2(osdSLocal2(x)) +# else +# define osdLocal2(x) ((unsigned short)(((unsigned char __FAR__*)(x))[1]) \ + + (((unsigned short)(((unsigned char __FAR__*)(x))[0])) << 8)) +# endif +# endif +#endif +#if (!defined(osdLocal3)) +/* + * Name: osdLocal3(pointer) + * Description: Local byte order to Big Endian Format for DPT_4_BYTES words. + * Could be replaced with an OS defined localization routine, macro or + * inline. + */ +# if (defined(_DPT_BIG_ENDIAN)) +# define osdLocal3(x) (*((unsigned DPT_4_BYTES __FAR__ *)(x))) +# else +# if (defined(osdSwap3)) +# define osdLocal3(x) osdSwap3(*((unsigned DPT_4_BYTES __FAR__ *)(x))) +# else +# define osdLocal3(x) ((unsigned DPT_4_BYTES)osdLocal2(((unsigned char __FAR__ *) \ + (x)+1)) + (((unsigned DPT_4_BYTES)(((unsigned char __FAR__ *)(x))[0])) << 16)) +# endif +# endif +#endif + + + +#if (!defined(osdLocal4)) +/* + * Name: osdLocal4(pointer) + * Description: Local byte order to Big Endian Format for DPT_4_BYTES words. + * Could be replaced with an OS defined localization routine, macro or + * inline. + */ +# if (defined(_DPT_BIG_ENDIAN)) +# define osdLocal4(x) (*(unsigned DPT_4_BYTES __FAR__ *)(x)) +# if (defined(osdSwap4)) +# define osdSLocal4(x) osdSwap4(osdLocal4(x)) +# else +# define osdSLocal4(x) ((unsigned DPT_4_BYTES)osdSLocal2(((unsigned char __FAR__ *)\ + (x)+2)) + (((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(x))[1]) << 16) \ + + (((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(x))[0]) << 24)) +# endif +# else +# define osdSLocal4(x) (*(unsigned DPT_4_BYTES __FAR__ *)(x)) +# if (defined(osdSwap4)) +# define osdLocal4(x) osdSwap4(osdSLocal4(x)) +# else +# define osdLocal4(x) ((unsigned DPT_4_BYTES)osdLocal2(((unsigned char __FAR__ *) \ + (x)+2)) + (((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(x))[1]) << 16) \ + + (((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(x))[0]) << 24)) +# endif +# endif +#endif + +#define I2O_TID_MASK ((unsigned DPT_4_BYTES) ((1L<> 16L); \ + *((unsigned short __FAR__ *)(getUP1(x,y) + 1)) \ + = (unsigned short)hold; \ + } +# else +# define setU3(x,y,z) \ + { unsigned DPT_4_BYTES hold = z; \ + *(getUP1(x,y) + 0) = (unsigned char)(hold >> 16) ; \ + *(getUP1(x,y) + 1) = (unsigned char)(hold >> 8L); \ + *(getUP1(x,y) + 2) = (unsigned char)(hold); \ + } +# endif +#endif +/* up to here to be deleted */ + +#define getBU3(x,y) ((unsigned DPT_4_BYTES)osdLocal3((unsigned DPT_4_BYTES __FAR__ *) \ + getUP1(x,y))) +#if (!defined(setBU3)) +# if (defined(_DPT_BIG_ENDIAN)) +# define setBU3(x,y,z) \ + { unsigned DPT_4_BYTES hold = z; \ + *(getUP1(x,y)) = (unsigned char)(hold >> 16L); \ + *((unsigned short __FAR__ *)(getUP1(x,y) + 1)) \ + = (unsigned short)hold; \ + } +# else +# define setBU3(x,y,z) \ + { unsigned DPT_4_BYTES hold = z; \ + *(getUP1(x,y) + 0) = (unsigned char)(hold >> 16) ; \ + *(getUP1(x,y) + 1) = (unsigned char)(hold >> 8L); \ + *(getUP1(x,y) + 2) = (unsigned char)(hold); \ + } +# endif +#endif +#define getUP4(x,y) ((unsigned DPT_4_BYTES __FAR__ *)(((unsigned char __FAR__ *) \ + (x))+(unsigned DPT_4_BYTES)(y))) +#define getBU4(x,y) ((unsigned DPT_4_BYTES)osdLocal4((unsigned DPT_4_BYTES __FAR__ *) \ + getUP1(x,y))) +#define getLU4(x,y) ((unsigned DPT_4_BYTES)osdSLocal4((unsigned DPT_4_BYTES __FAR__ *) \ + getUP1(x,y))) +/* to be deleted */ +#define getU4(x,y) ((unsigned DPT_4_BYTES)osdSLocal4((unsigned DPT_4_BYTES __FAR__ *) \ + getUP1(x,y))) +#if (!defined(setU4)) +# define setU4(x,y,z) { unsigned DPT_4_BYTES hold = z; \ + *((unsigned DPT_4_BYTES __FAR__ *)getUP1(x,y)) \ + = osdLocal4(&hold); \ + } +#endif +/* up to here */ +#if (!defined(setBU4)) +# define setBU4(x,y,z) { unsigned DPT_4_BYTES hold = z; \ + *((unsigned DPT_4_BYTES __FAR__ *)getUP1(x,y)) \ + = osdLocal4(&hold); \ + } +#endif +#if (!defined(setLU4)) +# define setLU4(x,y,z) { unsigned DPT_4_BYTES hold = z; \ + *((unsigned DPT_4_BYTES __FAR__ *)getUP1(x,y)) \ + = osdSLocal4(&hold); \ + } +#endif + + +#define osdSwap16bit(x) ( (((unsigned short )x & 0xf000) >> 12) | \ + (((unsigned short )x & 0x0f00) >> 4) | \ + (((unsigned short )x & 0x00f0) << 4) | \ + (((unsigned short )x & 0x000f) << 12 ) ) + +/* + * note that in big endian a 12 bit number (0x123) is stored as 1203 + */ + +#define osdSwap12bit(x) (( (((unsigned short )x & 0x0f00) >> 8) | \ + ((unsigned short )x & 0x00f0) | \ + (((unsigned short )x & 0x000f) << 8 ) ) ) + +#define osdSwap8bit(x) ( (((unsigned char )x & 0x0f) << 4) | \ + (((unsigned char )x &0xf0) >> 4 ) ) + +#define getL24bit1(w,x,y) ((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(&w->x))[0+(y)] \ + + ((((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(&w->x))[1+(y)]) << 8) & 0xFF00) \ + + ((((unsigned DPT_4_BYTES)((unsigned char __FAR__ *)(&w->x))[2+(y)]) << 16) & 0xFF0000)) + +#define setL24bit1(w,x,y,z) { ((unsigned char __FAR__ *)(&w->x))[0+(y)] = (z); \ + ((unsigned char __FAR__ *)(&w->x))[1+(y)] = ((z) >> 8) & 0xFF; \ + ((unsigned char __FAR__ *)(&w->x))[2+(y)] = ((z) >> 16) & 0xFF; \ + } + +#define getL16bit(w,x,y) ((unsigned short)((unsigned char __FAR__ *)(&w->x))[0+(y)] \ + + ((((unsigned short)((unsigned char __FAR__ *)(&w->x))[1+(y)]) << 8) & 0xFF00)) + +#define setL16bit(w,x,y,z) { ((unsigned char __FAR__ *)(&w->x))[0+(y)] = (z); \ + ((unsigned char __FAR__ *)(&w->x))[1+(y)] = ((z) >> 8) & 0xFF; \ + } + +#define getL16bit2(w,x,y) ((unsigned short)((unsigned char __FAR__ *)(&w->x))[2+(y)] \ + + ((((unsigned short)((unsigned char __FAR__ *)(&w->x))[3+(y)]) << 8) & 0xFF00)) + +#define setL16bit2(w,x,y,z) { ((unsigned char __FAR__ *)(&w->x))[2+(y)] = (z); \ + ((unsigned char __FAR__ *)(&w->x))[3+(y)] = ((z) >> 8) & 0xFF; \ + } + +/* y is the number of bytes from beg of DPT_4_BYTES to get upper 4 bit of the addressed byte */ +#define getL4bit(w,x,y) \ + ((unsigned char)(((unsigned char __FAR__ *)(&w->x))[0+(y)] >> 4) & 0x0f) + +#define setL4bit(w,x,y,z) { \ + ((unsigned char __FAR__ *)(&w->x))[0+(y)] &= 0xF0; \ + ((unsigned char __FAR__ *)(&w->x))[0+(y)] |= ((z) << 4) & 0xF0; \ + } +/* y is number of bytes from beg of DPT_4_BYTES */ +#define getL1bit(w,x,y) \ + ((unsigned char)(((unsigned char __FAR__ *)(&w->x))[0+(y)] ) & 0x01) + +#define setL1bit(w,x,y,z) { \ + ((unsigned char __FAR__ *)(&w->x))[0+(y)] &= 0xFE; \ + ((unsigned char __FAR__ *)(&w->x))[0+(y)] |= (z) & 0x01; \ + } +#define getL1bit1(w,x,y) \ + ((unsigned char)(((unsigned char __FAR__ *)(&w->x))[0+(y)] >> 1) & 0x01) + +#define setL1bit1(w,x,y,z) { \ + ((unsigned char __FAR__ *)(&w->x))[0+(y)] &= 0xFD; \ + ((unsigned char __FAR__ *)(&w->x))[0+(y)] |= (z << 1) & 0x02; \ + } + + + +/* 12 bit at the first 12 bits of a DPT_4_BYTES word */ +#define getL12bit(w,x,y) ((unsigned short)((unsigned char __FAR__ *)(&w->x))[0+(y)] \ + + ((((unsigned short)((unsigned char __FAR__ *)(&w->x))[1+(y)]) << 8) & 0xF00)) + +#define setL12bit(w,x,y,z) { ((unsigned char __FAR__ *)(&w->x))[0+(y)] = (z); \ + ((unsigned char __FAR__ *)(&w->x))[1+(y)] &= 0xF0; \ + ((unsigned char __FAR__ *)(&w->x))[1+(y)] |= ((z) >> 8) & 0xF; \ + } +/* 12 bit after another 12 bit in DPT_4_BYTES word */ +#define getL12bit1(w,x,y) (((unsigned short)((unsigned char __FAR__ *)(&w->x))[1+(y)]) >> 4 \ + + ((((unsigned short)((unsigned char __FAR__ *)(&w->x))[2+(y)]) << 4) )) + +#define setL12bit1(w,x,y,z) { ((unsigned char __FAR__ *)(&w->x))[1+(y)] &= 0x0F; \ + ((unsigned char __FAR__ *)(&w->x))[1+(y)] |= ((z) & 0xF) << 4; \ + ((unsigned char __FAR__ *)(&w->x))[2+(y)] &= 0x00;\ + ((unsigned char __FAR__ *)(&w->x))[2+(y)] |= ((z) >> 8) & 0xff;\ + } + +/* 12 at the 3rd byte in a DPT_4_BYTES word */ +#define getL12bit2(w,x,y) ((unsigned short)((unsigned char __FAR__ *)(&w->x))[2+(y)] \ + + ((((unsigned short)((unsigned char __FAR__ *)(&w->x))[3+(y)]) << 8) & 0xF00)) + +#define setL12bit2(w,x,y,z) { ((unsigned char __FAR__ *)(&w->x))[2+(y)] = (z); \ + ((unsigned char __FAR__ *)(&w->x))[3+(y)] &= 0xF0; \ + ((unsigned char __FAR__ *)(&w->x))[3+(y)] |= ((z) >> 8) & 0xF; \ + } + +#define getL8bit(w,x,y) (\ + (*(((unsigned char __FAR__ *)(&((w)->x)))\ + + y)) ) + +#define setL8bit(w,x,y,z) {\ + (*(((unsigned char __FAR__ *)(&((w)->x)))\ + + y) = (z));\ + } + + +#endif /* __DPTALIGN_H */ diff --git a/sys/dev/asr/dptsig.h b/sys/dev/asr/dptsig.h new file mode 100644 index 0000000..af6a404 --- /dev/null +++ b/sys/dev/asr/dptsig.h @@ -0,0 +1,412 @@ +/* $FreeBSD$ */ +/* BSDI dptsig.h,v 1.7 1998/06/03 19:15:00 karels Exp */ + +/* + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + */ + +#ifndef __DPTSIG_H_ +#define __DPTSIG_H_ +#ifdef _SINIX_ADDON +#include "dpt.h" +#endif +/* DPT SIGNATURE SPEC AND HEADER FILE */ +/* Signature Version 1 (sorry no 'A') */ + +/* to make sure we are talking the same size under all OS's */ +typedef unsigned char sigBYTE; +typedef unsigned short sigWORD; +#if (defined(_MULTI_DATAMODEL) && defined(sun) && !defined(_ILP32)) +typedef uint32_t sigLONG; +#else +typedef unsigned long sigLONG; +#endif + +/* + * use sigWORDLittleEndian for: + * dsCapabilities + * dsDeviceSupp + * dsAdapterSupp + * dsApplication + * use sigLONGLittleEndian for: + * dsOS + * so that the sig can be standardised to Little Endian + */ +#if (defined(_DPT_BIG_ENDIAN)) +# define sigWORDLittleEndian(x) ((((x)&0xFF)<<8)|(((x)>>8)&0xFF)) +# define sigLONGLittleEndian(x) \ + ((((x)&0xFF)<<24) | \ + (((x)&0xFF00)<<8) | \ + (((x)&0xFF0000L)>>8) | \ + (((x)&0xFF000000L)>>24)) +#else +# define sigWORDLittleEndian(x) (x) +# define sigLONGLittleEndian(x) (x) +#endif + +/* must make sure the structure is not word or double-word aligned */ +/* --------------------------------------------------------------- */ +/* Borland will ignore the following pragma: */ +/* Word alignment is OFF by default. If in the, IDE make */ +/* sure that Options | Compiler | Code Generation | Word Alignment */ +/* is not checked. If using BCC, do not use the -a option. */ + +#ifndef NO_PACK +#if defined (_DPT_AIX) +#pragma options align=packed +#else +#pragma pack(1) +#endif /* aix */ +#endif +/* For the Macintosh */ +#if STRUCTALIGNMENTSUPPORTED +#pragma options align=mac68k +#endif + + +/* Current Signature Version - sigBYTE dsSigVersion; */ +/* ------------------------------------------------------------------ */ +#define SIG_VERSION 1 + +/* Processor Family - sigBYTE dsProcessorFamily; DISTINCT VALUES */ +/* ------------------------------------------------------------------ */ +/* What type of processor the file is meant to run on. */ +/* This will let us know whether to read sigWORDs as high/low or low/high. */ +#define PROC_INTEL 0x00 /* Intel 80x86 */ +#define PROC_MOTOROLA 0x01 /* Motorola 68K */ +#define PROC_MIPS4000 0x02 /* MIPS RISC 4000 */ +#define PROC_MIPS PROC_MIPS4000 /* MIPS RISC */ +#define PROC_ALPHA 0x03 /* DEC Alpha */ +#define PROC_POWERPC 0x04 /* IBM Power PC */ +#define PROC_i960 0x05 /* Intel i960 */ +#define PROC_ULTRASPARC 0x06 /* SPARC processor */ + +/* Specific Minimim Processor - sigBYTE dsProcessor; FLAG BITS */ +/* ------------------------------------------------------------------ */ +/* Different bit definitions dependent on processor_family */ + +/* PROC_INTEL: */ +#define PROC_8086 0x01 /* Intel 8086 */ +#define PROC_286 0x02 /* Intel 80286 */ +#define PROC_386 0x04 /* Intel 80386 */ +#define PROC_486 0x08 /* Intel 80486 */ +#define PROC_PENTIUM 0x10 /* Intel 586 aka P5 aka Pentium */ +#define PROC_SEXIUM 0x20 /* Intel 686 aka P6 aka Pentium Pro or MMX */ + +/* PROC_i960: */ +#define PROC_960RX 0x01 /* Intel 80960RP/RD */ +#define PROC_960HX 0x02 /* Intel 80960HA/HD/HT */ +#define PROC_960RN 0x03 /* Intel 80960RN/RM */ +#define PROC_960RS 0x04 /* Intel 80960RS */ + +/* PROC_MOTOROLA: */ +#define PROC_68000 0x01 /* Motorola 68000 */ +#define PROC_68010 0x02 /* Motorola 68010 */ +#define PROC_68020 0x04 /* Motorola 68020 */ +#define PROC_68030 0x08 /* Motorola 68030 */ +#define PROC_68040 0x10 /* Motorola 68040 */ + +/* PROC_POWERPC */ +#define PROC_PPC601 0x01 /* PowerPC 601 */ +#define PROC_PPC603 0x02 /* PowerPC 603 */ +#define PROC_PPC604 0x04 /* PowerPC 604 */ + +/* PROC_MIPS */ +#define PROC_R4000 0x01 /* MIPS R4000 */ +#define PROC_RM7000 0x02 /* MIPS RM7000 */ + +/* Filetype - sigBYTE dsFiletype; DISTINCT VALUES */ +/* ------------------------------------------------------------------ */ +#define FT_EXECUTABLE 0 /* Executable Program */ +#define FT_SCRIPT 1 /* Script/Batch File??? */ +#define FT_HBADRVR 2 /* HBA Driver */ +#define FT_OTHERDRVR 3 /* Other Driver */ +#define FT_IFS 4 /* Installable Filesystem Driver */ +#define FT_ENGINE 5 /* DPT Engine */ +#define FT_COMPDRVR 6 /* Compressed Driver Disk */ +#define FT_LANGUAGE 7 /* Foreign Language file */ +#define FT_FIRMWARE 8 /* Downloadable or actual Firmware */ +#define FT_COMMMODL 9 /* Communications Module */ +#define FT_INT13 10 /* INT 13 style HBA Driver */ +#define FT_HELPFILE 11 /* Help file */ +#define FT_LOGGER 12 /* Event Logger */ +#define FT_INSTALL 13 /* An Install Program */ +#define FT_LIBRARY 14 /* Storage Manager Real-Mode Calls */ +#define FT_RESOURCE 15 /* Storage Manager Resource File */ +#define FT_MODEM_DB 16 /* Storage Manager Modem Database */ + +/* Filetype flags - sigBYTE dsFiletypeFlags; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define FTF_DLL 0x01 /* Dynamic Link Library */ +#define FTF_NLM 0x02 /* Netware Loadable Module */ +#define FTF_OVERLAYS 0x04 /* Uses overlays */ +#define FTF_DEBUG 0x08 /* Debug version */ +#define FTF_TSR 0x10 /* TSR */ +#define FTF_SYS 0x20 /* DOS Loadable driver */ +#define FTF_PROTECTED 0x40 /* Runs in protected mode */ +#define FTF_APP_SPEC 0x80 /* Application Specific */ +#define FTF_ROM (FTF_SYS|FTF_TSR) /* Special Case */ + +/* OEM - sigBYTE dsOEM; DISTINCT VALUES */ +/* ------------------------------------------------------------------ */ +#define OEM_DPT 0 /* DPT */ +#define OEM_ATT 1 /* ATT */ +#define OEM_NEC 2 /* NEC */ +#define OEM_ALPHA 3 /* Alphatronix */ +#define OEM_AST 4 /* AST */ +#define OEM_OLIVETTI 5 /* Olivetti */ +#define OEM_SNI 6 /* Siemens/Nixdorf */ +#define OEM_SUN 7 /* SUN Microsystems */ +#define OEM_ADAPTEC 8 /* Adaptec */ + +/* Operating System - sigLONG dsOS; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define OS_DOS 0x00000001 /* PC/MS-DOS */ +#define OS_WINDOWS 0x00000002 /* Microsoft Windows 3.x */ +#define OS_WINDOWS_NT 0x00000004 /* Microsoft Windows NT */ +#define OS_OS2M 0x00000008 /* OS/2 1.2.x,MS 1.3.0,IBM 1.3.x - Monolithic */ +#define OS_OS2L 0x00000010 /* Microsoft OS/2 1.301 - LADDR */ +#define OS_OS22x 0x00000020 /* IBM OS/2 2.x */ +#define OS_NW286 0x00000040 /* Novell NetWare 286 */ +#define OS_NW386 0x00000080 /* Novell NetWare 386 */ +#define OS_GEN_UNIX 0x00000100 /* Generic Unix */ +#define OS_SCO_UNIX 0x00000200 /* SCO Unix */ +#define OS_ATT_UNIX 0x00000400 /* ATT Unix */ +#define OS_UNIXWARE 0x00000800 /* USL Unix */ +#define OS_INT_UNIX 0x00001000 /* Interactive Unix */ +#define OS_SOLARIS 0x00002000 /* SunSoft Solaris */ +#define OS_QNX 0x00004000 /* QNX for Tom Moch */ +#define OS_NEXTSTEP 0x00008000 /* NeXTSTEP/OPENSTEP/MACH */ +#define OS_BANYAN 0x00010000 /* Banyan Vines */ +#define OS_OLIVETTI_UNIX 0x00020000/* Olivetti Unix */ +#define OS_MAC_OS 0x00040000 /* Mac OS */ +#define OS_WINDOWS_95 0x00080000 /* Microsoft Windows '95 */ +#define OS_NW4x 0x00100000 /* Novell Netware 4.x */ +#define OS_BSDI_UNIX 0x00200000 /* BSDi Unix BSD/OS 2.0 and up */ +#define OS_AIX_UNIX 0x00400000 /* AIX Unix */ +#define OS_FREE_BSD 0x00800000 /* FreeBSD Unix */ +#define OS_LINUX 0x01000000 /* Linux */ +#define OS_DGUX_UNIX 0x02000000 /* Data General Unix */ +#define OS_SINIX_N 0x04000000 /* SNI SINIX-N */ +#define OS_PLAN9 0x08000000 /* ATT Plan 9 */ +#define OS_TSX 0x10000000 /* SNH TSX-32 */ +#define OS_WINDOWS_98 0x20000000 /* Microsoft Windows '98 */ + +#define OS_OTHER 0x80000000 /* Other */ + +/* Capabilities - sigWORD dsCapabilities; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define CAP_RAID0 0x0001 /* RAID-0 */ +#define CAP_RAID1 0x0002 /* RAID-1 */ +#define CAP_RAID3 0x0004 /* RAID-3 */ +#define CAP_RAID5 0x0008 /* RAID-5 */ +#define CAP_SPAN 0x0010 /* Spanning */ +#define CAP_PASS 0x0020 /* Provides passthrough */ +#define CAP_OVERLAP 0x0040 /* Passthrough supports overlapped commands */ +#define CAP_ASPI 0x0080 /* Supports ASPI Command Requests */ +#define CAP_ABOVE16MB 0x0100 /* ISA Driver supports greater than 16MB */ +#define CAP_EXTEND 0x8000 /* Extended info appears after description */ +#ifdef SNI_MIPS +#define CAP_CACHEMODE 0x1000 /* dpt_force_cache is set in driver */ +#endif + +/* Devices Supported - sigWORD dsDeviceSupp; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define DEV_DASD 0x0001 /* DASD (hard drives) */ +#define DEV_TAPE 0x0002 /* Tape drives */ +#define DEV_PRINTER 0x0004 /* Printers */ +#define DEV_PROC 0x0008 /* Processors */ +#define DEV_WORM 0x0010 /* WORM drives */ +#define DEV_CDROM 0x0020 /* CD-ROM drives */ +#define DEV_SCANNER 0x0040 /* Scanners */ +#define DEV_OPTICAL 0x0080 /* Optical Drives */ +#define DEV_JUKEBOX 0x0100 /* Jukebox */ +#define DEV_COMM 0x0200 /* Communications Devices */ +#define DEV_OTHER 0x0400 /* Other Devices */ +#define DEV_ALL 0xFFFF /* All SCSI Devices */ + +/* Adapters Families Supported - sigWORD dsAdapterSupp; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define ADF_2001 0x0001 /* PM2001 */ +#define ADF_2012A 0x0002 /* PM2012A */ +#define ADF_PLUS_ISA 0x0004 /* PM2011,PM2021 */ +#define ADF_PLUS_EISA 0x0008 /* PM2012B,PM2022 */ +#define ADF_SC3_ISA 0x0010 /* PM2021 */ +#define ADF_SC3_EISA 0x0020 /* PM2022,PM2122, etc */ +#define ADF_SC3_PCI 0x0040 /* SmartCache III PCI */ +#define ADF_SC4_ISA 0x0080 /* SmartCache IV ISA */ +#define ADF_SC4_EISA 0x0100 /* SmartCache IV EISA */ +#define ADF_SC4_PCI 0x0200 /* SmartCache IV PCI */ +#define ADF_SC5_PCI 0x0400 /* Fifth Generation I2O products */ +/* + * Combinations of products + */ +#define ADF_ALL_2000 (ADF_2001|ADF_2012A) +#define ADF_ALL_PLUS (ADF_PLUS_ISA|ADF_PLUS_EISA) +#define ADF_ALL_SC3 (ADF_SC3_ISA|ADF_SC3_EISA|ADF_SC3_PCI) +#define ADF_ALL_SC4 (ADF_SC4_ISA|ADF_SC4_EISA|ADF_SC4_PCI) +#define ADF_ALL_SC5 (ADF_SC5_PCI) +/* All EATA Cacheing Products */ +#define ADF_ALL_CACHE (ADF_ALL_PLUS|ADF_ALL_SC3|ADF_ALL_SC4) +/* All EATA Bus Mastering Products */ +#define ADF_ALL_MASTER (ADF_2012A|ADF_ALL_CACHE) +/* All EATA Adapter Products */ +#define ADF_ALL_EATA (ADF_2001|ADF_ALL_MASTER) +#define ADF_ALL ADF_ALL_EATA + +/* Application - sigWORD dsApplication; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define APP_DPTMGR 0x0001 /* DPT Storage Manager */ +#define APP_ENGINE 0x0002 /* DPT Engine */ +#define APP_SYTOS 0x0004 /* Sytron Sytos Plus */ +#define APP_CHEYENNE 0x0008 /* Cheyenne ARCServe + ARCSolo */ +#define APP_MSCDEX 0x0010 /* Microsoft CD-ROM extensions */ +#define APP_NOVABACK 0x0020 /* NovaStor Novaback */ +#define APP_AIM 0x0040 /* Archive Information Manager */ + +/* Requirements - sigBYTE dsRequirements; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define REQ_SMARTROM 0x01 /* Requires SmartROM to be present */ +#define REQ_DPTDDL 0x02 /* Requires DPTDDL.SYS to be loaded */ +#define REQ_HBA_DRIVER 0x04 /* Requires an HBA driver to be loaded */ +#define REQ_ASPI_TRAN 0x08 /* Requires an ASPI Transport Modules */ +#define REQ_ENGINE 0x10 /* Requires a DPT Engine to be loaded */ +#define REQ_COMM_ENG 0x20 /* Requires a DPT Communications Engine */ + +/* ------------------------------------------------------------------ */ +/* Requirements - sigWORD dsFirmware; FLAG BITS */ +/* ------------------------------------------------------------------ */ +#define dsFirmware dsApplication +#define FW_DNLDSIZE0 0x0000 /* 0..2 DownLoader Size - NONE */ +#define FW_DNLDSIZE16 0x0001 /* 0..2 DownLoader Size 16K */ +#define FW_DNLDSIZE32 0x0002 /* 0..2 DownLoader Size 32K */ +#define FW_DNLDSIZE64 0x0004 /* 0..2 DownLoader Size 64K */ + +#define FW_LOAD_BTM 0x2000 /* 13 Load Offset (1=Btm, 0=Top) */ +#define FW_LOAD_TOP 0x0000 /* 13 Load Offset (1=Btm, 0=Top) */ +#define FW_SIG_VERSION1 0x0000 /* 15..14 Version Bits 0=Ver1 */ + +/* + 0..2 Downloader Size (Value * 16K) + 3 + + 4 + 5 + 6 + 7 + + 8 + 9 + 10 + 11 + + 12 + 13 Load Offset (1=BTM 0=TOP) + 14..15 F/W Sig Version (0=Ver1) +*/ + +/* ------------------------------------------------------------------ */ +/* ------------------------------------------------------------------ */ +/* ------------------------------------------------------------------ */ + +/* + * You may adjust dsDescription_size with an override to a value less than + * 50 so that the structure allocates less real space. + */ +#if (!defined(dsDescription_size)) +# define dsDescription_size 50 +#endif + +typedef struct dpt_sig { + char dsSignature[6]; /* ALWAYS "dPtSiG" */ + sigBYTE dsSigVersion; /* signature version (currently 1) */ + sigBYTE dsProcessorFamily; /* what type of processor */ + sigBYTE dsProcessor; /* precise processor */ + sigBYTE dsFiletype; /* type of file */ + sigBYTE dsFiletypeFlags; /* flags to specify load type, etc. */ + sigBYTE dsOEM; /* OEM file was created for */ + sigLONG dsOS; /* which Operating systems */ + sigWORD dsCapabilities; /* RAID levels, etc. */ + sigWORD dsDeviceSupp; /* Types of SCSI devices supported */ + sigWORD dsAdapterSupp; /* DPT adapter families supported */ + sigWORD dsApplication; /* applications file is for */ + sigBYTE dsRequirements; /* Other driver dependencies */ + sigBYTE dsVersion; /* 1 */ + sigBYTE dsRevision; /* 'J' */ + sigBYTE dsSubRevision; /* '9' ' ' if N/A */ + sigBYTE dsMonth; /* creation month */ + sigBYTE dsDay; /* creation day */ + sigBYTE dsYear; /* creation year since 1980 (1993=13) */ + /* description (NULL terminated) */ + char dsDescription[dsDescription_size]; +} dpt_sig_S; +/* 32 bytes minimum - with no description. Put NULL at description[0] */ +/* 81 bytes maximum - with 49 character description plus NULL. */ + +#if defined __bsdi__ +#ifndef PACK +#define PACK __attribute__ ((packed)) +#endif +typedef struct dpt_sig_Packed { + char dsSignature[6] PACK; /* ALWAYS "dPtSiG" */ + sigBYTE dsSigVersion PACK; /* signature version (currently 1) */ + sigBYTE dsProcessorFamily PACK; /* what type of processor */ + sigBYTE dsProcessor PACK; /* precise processor */ + sigBYTE dsFiletype PACK; /* type of file */ + sigBYTE dsFiletypeFlags PACK; /* flags to specify load type, etc. */ + sigBYTE dsOEM PACK; /* OEM file was created for */ + sigLONG dsOS PACK; /* which Operating systems */ + sigWORD dsCapabilities PACK; /* RAID levels, etc. */ + sigWORD dsDeviceSupp PACK; /* Types of SCSI devices supported */ + sigWORD dsAdapterSupp PACK; /* DPT adapter families supported */ + sigWORD dsApplication PACK; /* applications file is for */ + sigBYTE dsRequirements PACK; /* Other driver dependencies */ + sigBYTE dsVersion PACK; /* 1 */ + sigBYTE dsRevision PACK; /* 'J' */ + sigBYTE dsSubRevision PACK; /* '9' ' ' if N/A */ + sigBYTE dsMonth PACK; /* creation month */ + sigBYTE dsDay PACK; /* creation day */ + sigBYTE dsYear PACK; /* creation year since 1980 (1993=13) */ + /* description (NULL terminated) */ + char dsDescription[dsDescription_size] PACK; +} dpt_sig_S_Packed; +#define PACKED_SIG_SIZE sizeof(dpt_sig_S_Packed) +#endif +/* This line added at Roycroft's request */ +/* Microsoft's NT compiler gets confused if you do a pack and don't */ +/* restore it. */ + +#ifndef NO_UNPACK +#if defined (_DPT_AIX) +#pragma options align=reset +#elif defined (UNPACK_FOUR) +#pragma pack(4) +#else +#pragma pack() +#endif /* aix */ +#endif +/* For the Macintosh */ +#if STRUCTALIGNMENTSUPPORTED +#pragma options align=reset +#endif + +#endif diff --git a/sys/dev/asr/i2oadptr.h b/sys/dev/asr/i2oadptr.h new file mode 100644 index 0000000..d2ec6a9 --- /dev/null +++ b/sys/dev/asr/i2oadptr.h @@ -0,0 +1,402 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corproation. + * All rights reserved. + * + * Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved. + * All rights reserved + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This header file, and any modifications of this header file, are provided + * contingent upon your agreement and adherence to the here-listed terms and + * conditions. By accepting and/or using this header file, you agree to abide + * by these terms and conditions and that these terms and conditions will be + * construed and governed in accordance with the laws of the State of California, + * without reference to conflict-of-law provisions. If you do not agree + * to these terms and conditions, please delete this file, and any copies, + * permanently, without making any use thereof. + * + * THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT + * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE + * USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR + * ERROR-FREE. + * + * I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF + * ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O + * SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH + * IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS. + * + * THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY + * ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA + * OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM. + * + * I2O SIG grants the user of this header file a license to copy, distribute, + * and modify it, for any purpose, under the following terms. Any copying, + * distribution, or modification of this header file must not delete or alter + * the copyright notice of I2O SIG or any of these Terms and Conditions. + * + * Any distribution of this header file must not include a charge for the + * header file (unless such charges are strictly for the physical acts of + * copying or transferring copies). However, distribution of a product in + * which this header file is embedded may include a charge so long as any + * such charge does not include any charge for the header file itself. + * + * Any modification of this header file constitutes a derivative work based + * on this header file. Any distribution of such derivative work: (1) must + * include prominent notices that the header file has been changed from the + * original, together with the dates of any changes; (2) automatically includes + * this same license to the original header file from I2O SIG, without any + * restriction thereon from the distributing user; and (3) must include a + * grant of license of the modified file under the same terms and conditions + * as these Terms and Conditions. + * + * The I2O SIG Web site can be found at: http://www.i2osig.org + * + * The I2O SIG encourages you to deposit derivative works based on this + * header file at the I2O SIG Web site. Furthermore, to become a Registered + * Developer of the I2O SIG, sign up at the Web site or call 415.750.8352 + * (United States). + ****************************************************************/ + +#if !defined(I2O_ADPTR_HDR) +#define I2O_ADPTR_HDR + +#if ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/pci/i2omsg.h" +# else +# include "dev/asr/i2omsg.h" +# endif +#else +# include "i2omsg.h" /* Include the Base Message file */ +#endif + + +#define I2OADPTR_REV 1_5_1 /* Header file revision string */ + + +/***************************************************************************** + * + * i2oadptr.h -- I2O Adapter Class Message defintion file + * + * + * Revision History: + * + * 1.5.d 03/06/97 - First definition for spec. draft version 1.5d. + * 1.5.1 05/02/97 - Corrections from review cycle: + * 1) Remove "SCSI" from function definition comment. + * 2) Add revision string. + * 3) Convert tabs to spaces. + * 4) New disclaimer. + * + * + * + *****************************************************************************/ + +/* + NOTES: + + Gets, reads, receives, etc. are all even numbered functions. + Sets, writes, sends, etc. are all odd numbered functions. + Functions that both send and receive data can be either but an attempt is made + to use the function number that indicates the greater transfer amount. + Functions that do not send or receive data use odd function numbers. + + Some functions are synonyms like read, receive and send, write. + + All common functions will have a code of less than 0x80. + Unique functions to a class will start at 0x80. + Executive Functions start at 0xA0. + + Utility Message function codes range from 0 - 0x1f + Base Message function codes range from 0x20 - 0xfe + Private Message function code is 0xff. +*/ + + +PRAGMA_ALIGN_PUSH + +PRAGMA_PACK_PUSH + +/* + Bus Adapter Class specific functions +*/ + +#define I2O_HBA_ADAPTER_RESET 0x85 +#define I2O_HBA_BUS_QUIESCE 0x8b +#define I2O_HBA_BUS_RESET 0x87 +#define I2O_HBA_BUS_SCAN 0x89 + + +/* + Detailed Status Codes for HBA operations + + Note: + The 16-bit Detailed Status Code field for HBA operations is divided + into two separate 8-bit fields. The lower 8 bits are reserved. The + upper 8 bits are used to report Adapter Status information. The + definitions for these two fields, however, will be consistent with + the standard reply message frame structure declaration, which treats + this as a single 16-bit field. In addition, the values used will be + consistent with the Adapter Status codes defined for the SCSI + Peripheral class. Theses codes are based on CAM-1. In other words, + these definitions are a subset of the SCSI peripheral class codes. + Where applicable, "SCSI" has been removed from the definition. +*/ + + +#define I2O_HBA_DSC_MASK 0xFF00 + +#define I2O_HBA_DSC_SUCCESS 0x0000 +#define I2O_HBA_DSC_ADAPTER_BUSY 0x0500 +#define I2O_HBA_DSC_COMMAND_TIMEOUT 0x0B00 +#define I2O_HBA_DSC_COMPLETE_WITH_ERROR 0x0400 +#define I2O_HBA_DSC_FUNCTION_UNAVAILABLE 0x3A00 +#define I2O_HBA_DSC_NO_ADAPTER 0x1100 +#define I2O_HBA_DSC_PARITY_ERROR_FAILURE 0x0F00 +#define I2O_HBA_DSC_PATH_INVALID 0x0700 +#define I2O_HBA_DSC_PROVIDE_FAILURE 0x1600 +#define I2O_HBA_DSC_QUEUE_FROZEN 0x4000 +#define I2O_HBA_DSC_REQUEST_ABORTED 0x0200 +#define I2O_HBA_DSC_REQUEST_INVALID 0x0600 +#define I2O_HBA_DSC_REQUEST_LENGTH_ERROR 0x1500 +#define I2O_HBA_DSC_REQUEST_TERMINATED 0x1800 +#define I2O_HBA_DSC_RESOURCE_UNAVAILABLE 0x3400 +#define I2O_HBA_DSC_BUS_BUSY 0x3F00 +#define I2O_HBA_DSC_BUS_RESET 0x0E00 +#define I2O_HBA_DSC_ID_INVALID 0x3900 +#define I2O_HBA_DSC_SEQUENCE_FAILURE 0x1400 +#define I2O_HBA_DSC_UNABLE_TO_ABORT 0x0300 +#define I2O_HBA_DSC_UNABLE_TO_TERMINATE 0x0900 +#define I2O_HBA_DSC_UNACKNOWLEDGED_EVENT 0x3500 +#define I2O_HBA_DSC_UNEXPECTED_BUS_FREE 0x1300 + + + +/****************************************************************************/ + +/* Bus Adapter Parameter Groups */ + +/****************************************************************************/ + + +#define I2O_HBA_CONTROLLER_INFO_GROUP_NO 0x0000 +#define I2O_HBA_HISTORICAL_STATS_GROUP_NO 0x0100 +#define I2O_HBA_SCSI_CONTROLLER_INFO_GROUP_NO 0x0200 +#define I2O_HBA_SCSI_BUS_PORT_INFO_GROUP_NO 0x0201 +#define I2O_HBA_FCA_CONTROLLER_INFO_GROUP_NO 0x0300 +#define I2O_HBA_FCA_PORT_INFO_GROUP_NO 0x0301 + + +/* - 0000h - HBA Controller Information Parameter Group */ + +/* Bus Type */ + +#define I2O_HBA_BUS_TYPE_GENERIC 0x00 +#define I2O_HBA_BUS_TYPE_SCSI 0x01 +#define I2O_HBA_BUS_TYPE_FCA 0x10 + + +typedef struct _I2O_HBA_CONTROLLER_INFO_SCALAR { + U8 BusType; + U8 BusState; + U16 Reserved2; + U8 BusName[12]; +} I2O_HBA_CONTROLLER_INFO_SCALAR, *PI2O_HBA_CONTROLLER_INFO_SCALAR; + + +/* - 0100h - HBA Historical Stats Parameter Group */ + +typedef struct _I2O_HBA_HIST_STATS_SCALAR { + U32 TimeLastPoweredUp; + U32 TimeLastReset; +} I2O_HBA_HIST_STATS_SCALAR, *PI2O_HBA_HIST_STATS_SCALAR; + + +/* - 0200h - HBA SCSI Controller Information Parameter Group */ + +/* SCSI Type */ + +#define I2O_SCSI_TYPE_UNKNOWN 0x00 +#define I2O_SCSI_TYPE_SCSI_1 0x01 +#define I2O_SCSI_TYPE_SCSI_2 0x02 +#define I2O_SCSI_TYPE_SCSI_3 0x03 + +/* Protection Management */ + +#define I2O_SCSI_PORT_PROT_OTHER 0x00 +#define I2O_SCSI_PORT_PROT_UNKNOWN 0x01 +#define I2O_SCSI_PORT_PROT_UNPROTECTED 0x02 +#define I2O_SCSI_PORT_PROT_PROTECTED 0x03 +#define I2O_SCSI_PORT_PROT_SCC 0x04 + +/* Settings */ + +#define I2O_SCSI_PORT_PARITY_FLAG 0x01 +#define I2O_SCSI_PORT_PARITY_DISABLED 0x00 +#define I2O_SCSI_PORT_PARITY_ENABLED 0x01 + +#define I2O_SCSI_PORT_SCAN_ORDER_FLAG 0x02 +#define I2O_SCSI_PORT_SCAN_LOW_TO_HIGH 0x00 +#define I2O_SCSI_PORT_SCAN_HIGH_TO_LOW 0x02 + +#define I2O_SCSI_PORT_IID_FLAG 0x04 +#define I2O_SCSI_PORT_IID_DEFAULT 0x00 +#define I2O_SCSI_PORT_IID_SPECIFIED 0x04 + +#define I2O_SCSI_PORT_SCAM_FLAG 0x08 +#define I2O_SCSI_PORT_SCAM_DISABLED 0x00 +#define I2O_SCSI_PORT_SCAM_ENABLED 0x08 + +#define I2O_SCSI_PORT_TYPE_FLAG 0x80 +#define I2O_SCSI_PORT_TYPE_PARALLEL 0x00 +#define I2O_SCSI_PORT_TYPE_SERIAL 0x80 + +typedef struct _I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR { + U8 SCSIType; + U8 ProtectionManagement; + U8 Settings; + U8 Reserved1; + U32 InitiatorID; + U64 ScanLun0Only; + U16 DisableDevice; + U8 MaxOffset; + U8 MaxDataWidth; + U64 MaxSyncRate; +} I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR, *PI2O_HBA_SCSI_CONTROLLER_INFO_SCALAR; + + +/* - 0201h - HBA SCSI Bus Port Information Parameter Group */ + +/* NOTE: Refer to the SCSI Peripheral Class Bus Port Information Parameter + Group field definitions for HBA SCSI Bus Port field definitions. + */ + +typedef struct _I2O_HBA_SCSI_BUS_PORT_INFO_SCALAR { + U8 PhysicalInterface; + U8 ElectricalInterface; + U8 Isochronous; + U8 ConnectorType; + U8 ConnectorGender; + U8 Reserved1; + U16 Reserved2; + U32 MaxNumberDevices; + U32 DeviceIdBegin; + U32 DeviceIdEnd; + U8 LunBegin[8]; + U8 LunEnd[8]; +} I2O_HBA_SCSI_BUS_PORT_INFO_SCALAR, *PI2O_HBA_SCSI_BUS_PORT_INFO_SCALAR; + + +/* - 0300h - HBA FCA Controller Information Parameters Group defines */ + +/* SCSI Type */ + +#define I2O_FCA_TYPE_UNKNOWN 0x00 +#define I2O_FCA_TYPE_FCAL 0x01 + +typedef struct _I2O_HBA_FCA_CONTROLLER_INFO_SCALAR { + U8 FcaType; + U8 Reserved1; + U16 Reserved2; +} I2O_HBA_FCA_CONTROLLER_INFO_SCALAR, *PI2O_HBA_FCA_CONTROLLER_INFO_SCALAR; + + +/* - 0301h - HBA FCA Port Information Parameters Group defines */ + +typedef struct _I2O_HBA_FCA_PORT_INFO_SCALAR { + U32 Reserved4; +} I2O_HBA_FCA_PORT_INFO_SCALAR, *PI2O_HBA_FCA_PORT_INFO_SCALAR; + + +/****************************************************************************/ + +/* I2O Bus Adapter Class Specific Message Definitions */ + +/****************************************************************************/ + + +/****************************************************************************/ + +/* I2O Bus Adapter Class Reply Message Frame */ + +typedef struct _I2O_HBA_REPLY_MESSAGE_FRAME { + I2O_SINGLE_REPLY_MESSAGE_FRAME StdReplyFrame; +} I2O_HBA_REPLY_MESSAGE_FRAME, *PI2O_HBA_REPLY_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* I2O HBA Adapter Reset Message Frame */ + +typedef struct _I2O_HBA_ADAPTER_RESET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_HBA_ADAPTER_RESET_MESSAGE, *PI2O_HBA_ADAPTER_RESET_MESSAGE; + + +/****************************************************************************/ + +/* I2O HBA Bus Quiesce Message Frame */ + +typedef U32 I2O_HBQ_FLAGS; + +#define I2O_HBQ_FLAG_NORMAL 0x0000 +#define I2O_HBQ_FLAG_QUIESCE 0x0001 + +typedef struct _I2O_HBA_BUS_QUIESCE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + I2O_HBQ_FLAGS Flags; +} I2O_HBA_BUS_QUIESCE_MESSAGE, *PI2O_HBA_BUS_QUIESCE_MESSAGE; + + +/****************************************************************************/ + +/* I2O HBA Bus Reset Message Frame */ + +typedef struct _I2O_HBA_BUS_RESET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_HBA_BUS_RESET_MESSAGE, *PI2O_HBA_BUS_RESET_MESSAGE; + + +/****************************************************************************/ + +/* I2O HBA Bus Scan Message Frame */ + +/* NOTE: SCSI-2 8-bit scalar LUN goes into offset 1 of Lun arrays */ + +typedef struct _I2O_HBA_BUS_SCAN_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_HBA_BUS_SCAN_MESSAGE, *PI2O_HBA_BUS_SCAN_MESSAGE; + + +PRAGMA_PACK_POP + +PRAGMA_ALIGN_POP + +#endif /* I2O_ADPTR_HDR */ + + diff --git a/sys/dev/asr/i2obscsi.h b/sys/dev/asr/i2obscsi.h new file mode 100644 index 0000000..7295772 --- /dev/null +++ b/sys/dev/asr/i2obscsi.h @@ -0,0 +1,495 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved. + * All rights reserved + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This header file, and any modifications of this header file, are provided + * contingent upon your agreement and adherence to the here-listed terms and + * conditions. By accepting and/or using this header file, you agree to abide + * by these terms and conditions and that these terms and conditions will be + * construed and governed in accordance with the laws of the State of California, + * without reference to conflict-of-law provisions. If you do not agree + * to these terms and conditions, please delete this file, and any copies, + * permanently, without making any use thereof. + * + * THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT + * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE + * USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR + * ERROR-FREE. + * + * I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF + * ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O + * SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH + * IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS. + * + * THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY + * ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA + * OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM. + * + * I2O SIG grants the user of this header file a license to copy, distribute, + * and modify it, for any purpose, under the following terms. Any copying, + * distribution, or modification of this header file must not delete or alter + * the copyright notice of I2O SIG or any of these Terms and Conditions. + * + * Any distribution of this header file must not include a charge for the + * header file (unless such charges are strictly for the physical acts of + * copying or transferring copies). However, distribution of a product in + * which this header file is embedded may include a charge so long as any + * such charge does not include any charge for the header file itself. + * + * Any modification of this header file constitutes a derivative work based + * on this header file. Any distribution of such derivative work: (1) must + * include prominent notices that the header file has been changed from the + * original, together with the dates of any changes; (2) automatically includes + * this same license to the original header file from I2O SIG, without any + * restriction thereon from the distributing user; and (3) must include a + * grant of license of the modified file under the same terms and conditions + * as these Terms and Conditions. + * + * The I2O SIG Web site can be found at: http://www.i2osig.org + * + * The I2O SIG encourages you to deposit derivative works based on this + * header file at the I2O SIG Web site. Furthermore, to become a Registered + * Developer of the I2O SIG, sign up at the Web site or call 415.750.8352 + * (United States). + ****************************************************************/ + +#if !defined(I2O_BASE_SCSI_HDR) +#define I2O_BASE_SCSI_HDR + +#if ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/pci/i2omsg.h" /* Include the Base Message file */ +# else +# include "dev/asr/i2omsg.h" +# endif +#else +# include "i2omsg.h" /* Include the Base Message file */ +#endif + + +#define I2OBSCSI_REV 1_5_1 /* Header file revision string */ + + + +/***************************************************************************** + * + * I2OBSCSI.h -- I2O Base SCSI Device Class Message defintion file + * + * This file contains information presented in Chapter 6, Section 6 & 7 of + * the I2O Specification. + * + * Revision History: (Revision History tracks the revision number of the I2O + * specification) + * + * .92 - First marked revsion used for Proof of Concept. + * .93 - Change to match the rev .93 of the spec. + * .95 - Updated to Rev .95 of 2/5/96. + * 1.00 - Checked and Updated against spec version 1.00 4/9/96. + * 1.xx - Updated to the 1.x version of the I2O Specification on 11/11/96. + * 1.xx - 11/14/96 + * 1) Removed duplicate device type definitions. + * 2) Added "DSC" to Detailed Status Code definitions. + * 3) Changed SCSI-3 LUN fields from U64 to U8 array. + * 1.xx 11/15/96 - Added #pragma statments for i960. + * 1.xx 11/20/96 - Changed duplicate Bus Scan structure to Bus Reset. + * 1.xx 12/05/96 - Added Auto Request Sense flag definition. + * 1.5d 03/06/97 - Update for spec. draft version 1.5d. + * 1) Converted SCSI bus adapter class to generic in i2oadptr.h. + * 2) Fixed DSC reference: changed from _BUS_SCAN to _BUS_RESET. + * 1.5d 03/031/97 - Made AutoSense flag definition consistent with spec. + * 1.5d 04/11/97 - Corrections from review cycle: + * 1) Corrected typo in I2O_SCSI_PERIPHERAL_TYPE_PARALLEL. + * 2) Corrected typo in I2O_SCSI_PORT_CONN_UNSHIELDED_P_HD. + * 1.5.1 05/02/97 - Corrections from review cycle: + * 1) Remove #include for i2omstor.h. + * 2) Add revision string. + * 3) Convert tabs to spaces. + * 4) New disclaimer. + * + *****************************************************************************/ + +/* + NOTES: + + Gets, reads, receives, etc. are all even numbered functions. + Sets, writes, sends, etc. are all odd numbered functions. + Functions that both send and receive data can be either but an attempt is made + to use the function number that indicates the greater transfer amount. + Functions that do not send or receive data use odd function numbers. + + Some functions are synonyms like read, receive and send, write. + + All common functions will have a code of less than 0x80. + Unique functions to a class will start at 0x80. + Executive Functions start at 0xA0. + + Utility Message function codes range from 0 - 0x1f + Base Message function codes range from 0x20 - 0xfe + Private Message function code is 0xff. +*/ + +PRAGMA_ALIGN_PUSH + +PRAGMA_PACK_PUSH + +/* + SCSI Peripheral Class specific functions + + Although the names are SCSI Peripheral class specific, the values + assigned are common with other classes when applicable. +*/ + +#define I2O_SCSI_DEVICE_RESET 0x27 +#define I2O_SCSI_SCB_ABORT 0x83 +#define I2O_SCSI_SCB_EXEC 0x81 + +/* + Detailed Status Codes for SCSI operations + + The 16-bit Detailed Status Code field for SCSI operations is divided + into two separate 8-bit fields. The lower 8 bits are used to report + Device Status information. The upper 8 bits are used to report + Adapter Status information. The definitions for these two fields, + however, will be consistent with the standard reply message frame + structure declaration, which treats this as a single 16-bit field. +*/ + + +/* SCSI Device Completion Status Codes (defined by SCSI-2/3)*/ + +#define I2O_SCSI_DEVICE_DSC_MASK 0x00FF + +#define I2O_SCSI_DSC_SUCCESS 0x0000 +#define I2O_SCSI_DSC_CHECK_CONDITION 0x0002 +#define I2O_SCSI_DSC_BUSY 0x0008 +#define I2O_SCSI_DSC_RESERVATION_CONFLICT 0x0018 +#define I2O_SCSI_DSC_COMMAND_TERMINATED 0x0022 +#define I2O_SCSI_DSC_TASK_SET_FULL 0x0028 +#define I2O_SCSI_DSC_ACA_ACTIVE 0x0030 + +/* SCSI Adapter Status Codes (based on CAM-1) */ + +#define I2O_SCSI_HBA_DSC_MASK 0xFF00 + +#define I2O_SCSI_HBA_DSC_SUCCESS 0x0000 + +#define I2O_SCSI_HBA_DSC_REQUEST_ABORTED 0x0200 +#define I2O_SCSI_HBA_DSC_UNABLE_TO_ABORT 0x0300 +#define I2O_SCSI_HBA_DSC_COMPLETE_WITH_ERROR 0x0400 +#define I2O_SCSI_HBA_DSC_ADAPTER_BUSY 0x0500 +#define I2O_SCSI_HBA_DSC_REQUEST_INVALID 0x0600 +#define I2O_SCSI_HBA_DSC_PATH_INVALID 0x0700 +#define I2O_SCSI_HBA_DSC_DEVICE_NOT_PRESENT 0x0800 +#define I2O_SCSI_HBA_DSC_UNABLE_TO_TERMINATE 0x0900 +#define I2O_SCSI_HBA_DSC_SELECTION_TIMEOUT 0x0A00 +#define I2O_SCSI_HBA_DSC_COMMAND_TIMEOUT 0x0B00 + +#define I2O_SCSI_HBA_DSC_MR_MESSAGE_RECEIVED 0x0D00 +#define I2O_SCSI_HBA_DSC_SCSI_BUS_RESET 0x0E00 +#define I2O_SCSI_HBA_DSC_PARITY_ERROR_FAILURE 0x0F00 +#define I2O_SCSI_HBA_DSC_AUTOSENSE_FAILED 0x1000 +#define I2O_SCSI_HBA_DSC_NO_ADAPTER 0x1100 +#define I2O_SCSI_HBA_DSC_DATA_OVERRUN 0x1200 +#define I2O_SCSI_HBA_DSC_UNEXPECTED_BUS_FREE 0x1300 +#define I2O_SCSI_HBA_DSC_SEQUENCE_FAILURE 0x1400 +#define I2O_SCSI_HBA_DSC_REQUEST_LENGTH_ERROR 0x1500 +#define I2O_SCSI_HBA_DSC_PROVIDE_FAILURE 0x1600 +#define I2O_SCSI_HBA_DSC_BDR_MESSAGE_SENT 0x1700 +#define I2O_SCSI_HBA_DSC_REQUEST_TERMINATED 0x1800 + +#define I2O_SCSI_HBA_DSC_IDE_MESSAGE_SENT 0x3300 +#define I2O_SCSI_HBA_DSC_RESOURCE_UNAVAILABLE 0x3400 +#define I2O_SCSI_HBA_DSC_UNACKNOWLEDGED_EVENT 0x3500 +#define I2O_SCSI_HBA_DSC_MESSAGE_RECEIVED 0x3600 +#define I2O_SCSI_HBA_DSC_INVALID_CDB 0x3700 +#define I2O_SCSI_HBA_DSC_LUN_INVALID 0x3800 +#define I2O_SCSI_HBA_DSC_SCSI_TID_INVALID 0x3900 +#define I2O_SCSI_HBA_DSC_FUNCTION_UNAVAILABLE 0x3A00 +#define I2O_SCSI_HBA_DSC_NO_NEXUS 0x3B00 +#define I2O_SCSI_HBA_DSC_SCSI_IID_INVALID 0x3C00 +#define I2O_SCSI_HBA_DSC_CDB_RECEIVED 0x3D00 +#define I2O_SCSI_HBA_DSC_LUN_ALREADY_ENABLED 0x3E00 +#define I2O_SCSI_HBA_DSC_BUS_BUSY 0x3F00 + +#define I2O_SCSI_HBA_DSC_QUEUE_FROZEN 0x4000 + + +/****************************************************************************/ + +/* SCSI Peripheral Device Parameter Groups */ + +/****************************************************************************/ + + +/* SCSI Configuration and Operating Structures and Defines */ + + +#define I2O_SCSI_DEVICE_INFO_GROUP_NO 0x0000 +#define I2O_SCSI_DEVICE_BUS_PORT_INFO_GROUP_NO 0x0001 + + +/* - 0000h - SCSI Device Information Parameters Group defines */ + +/* Device Type */ + +#define I2O_SCSI_DEVICE_TYPE_DIRECT 0x00 +#define I2O_SCSI_DEVICE_TYPE_SEQUENTIAL 0x01 +#define I2O_SCSI_DEVICE_TYPE_PRINTER 0x02 +#define I2O_SCSI_DEVICE_TYPE_PROCESSOR 0x03 +#define I2O_SCSI_DEVICE_TYPE_WORM 0x04 +#define I2O_SCSI_DEVICE_TYPE_CDROM 0x05 +#define I2O_SCSI_DEVICE_TYPE_SCANNER 0x06 +#define I2O_SCSI_DEVICE_TYPE_OPTICAL 0x07 +#define I2O_SCSI_DEVICE_TYPE_MEDIA_CHANGER 0x08 +#define I2O_SCSI_DEVICE_TYPE_COMM 0x09 +#define I2O_SCSI_DEVICE_GRAPHICS_1 0x0A +#define I2O_SCSI_DEVICE_GRAPHICS_2 0x0B +#define I2O_SCSI_DEVICE_TYPE_ARRAY_CONT 0x0C +#define I2O_SCSI_DEVICE_TYPE_SES 0x0D +#define I2O_SCSI_DEVICE_TYPE_UNKNOWN 0x1F + +/* Flags */ + +#define I2O_SCSI_PERIPHERAL_TYPE_FLAG 0x01 +#define I2O_SCSI_PERIPHERAL_TYPE_PARALLEL 0x00 +#define I2O_SCSI_PERIPHERAL_TYPE_SERIAL 0x01 + +#define I2O_SCSI_RESERVED_FLAG 0x02 + +#define I2O_SCSI_DISCONNECT_FLAG 0x04 +#define I2O_SCSI_DISABLE_DISCONNECT 0x00 +#define I2O_SCSI_ENABLE_DISCONNECT 0x04 + +#define I2O_SCSI_MODE_MASK 0x18 +#define I2O_SCSI_MODE_SET_DATA 0x00 +#define I2O_SCSI_MODE_SET_DEFAULT 0x08 +#define I2O_SCSI_MODE_SET_SAFEST 0x10 + +#define I2O_SCSI_DATA_WIDTH_MASK 0x60 +#define I2O_SCSI_DATA_WIDTH_8 0x00 +#define I2O_SCSI_DATA_WIDTH_16 0x20 +#define I2O_SCSI_DATA_WIDTH_32 0x40 + +#define I2O_SCSI_SYNC_NEGOTIATION_FLAG 0x80 +#define I2O_SCSI_DISABLE_SYNC_NEGOTIATION 0x00 +#define I2O_SCSI_ENABLE_SYNC_NEGOTIATION 0x80 + + +/* - 0001h - SCSI Device Bus Port Info Parameters Group defines */ + +/* Physical */ + +#define I2O_SCSI_PORT_PHYS_OTHER 0x01 +#define I2O_SCSI_PORT_PHYS_UNKNOWN 0x02 +#define I2O_SCSI_PORT_PHYS_PARALLEL 0x03 +#define I2O_SCSI_PORT_PHYS_FIBRE_CHANNEL 0x04 +#define I2O_SCSI_PORT_PHYS_SERIAL_P1394 0x05 +#define I2O_SCSI_PORT_PHYS_SERIAL_SSA 0x06 + +/* Electrical */ + +#define I2O_SCSI_PORT_ELEC_OTHER 0x01 +#define I2O_SCSI_PORT_ELEC_UNKNOWN 0x02 +#define I2O_SCSI_PORT_ELEC_SINGLE_ENDED 0x03 +#define I2O_SCSI_PORT_ELEC_DIFFERENTIAL 0x04 +#define I2O_SCSI_PORT_ELEC_LOW_VOLT_DIFF 0x05 +#define I2O_SCSI_PORT_ELEC_OPTICAL 0x06 + +/* Isochronous */ + +#define I2O_SCSI_PORT_ISOC_NO 0x00 +#define I2O_SCSI_PORT_ISOC_YES 0x01 +#define I2O_SCSI_PORT_ISOC_UNKNOWN 0x02 + +/* Connector Type */ + +#define I2O_SCSI_PORT_CONN_OTHER 0x01 +#define I2O_SCSI_PORT_CONN_UNKNOWN 0x02 +#define I2O_SCSI_PORT_CONN_NONE 0x03 +#define I2O_SCSI_PORT_CONN_SHIELDED_A_HD 0x04 +#define I2O_SCSI_PORT_CONN_UNSHIELDED_A_HD 0x05 +#define I2O_SCSI_PORT_CONN_SHIELDED_A_LD 0x06 +#define I2O_SCSI_PORT_CONN_UNSHIELDED_A_LD 0x07 +#define I2O_SCSI_PORT_CONN_SHIELDED_P_HD 0x08 +#define I2O_SCSI_PORT_CONN_UNSHIELDED_P_HD 0x09 +#define I2O_SCSI_PORT_CONN_SCA_I 0x0A +#define I2O_SCSI_PORT_CONN_SCA_II 0x0B +#define I2O_SCSI_PORT_CONN_FC_DB9 0x0C +#define I2O_SCSI_PORT_CONN_FC_FIBRE 0x0D +#define I2O_SCSI_PORT_CONN_FC_SCA_II_40 0x0E +#define I2O_SCSI_PORT_CONN_FC_SCA_II_20 0x0F +#define I2O_SCSI_PORT_CONN_FC_BNC 0x10 + +/* Connector Gender */ + +#define I2O_SCSI_PORT_CONN_GENDER_OTHER 0x01 +#define I2O_SCSI_PORT_CONN_GENDER_UNKOWN 0x02 +#define I2O_SCSI_PORT_CONN_GENDER_FEMALE 0x03 +#define I2O_SCSI_PORT_CONN_GENDER_MALE 0x04 + + +/* SCSI Device Group 0000h - Device Information Parameter Group */ + +typedef struct _I2O_SCSI_DEVICE_INFO_SCALAR { + U8 DeviceType; + U8 Flags; + U16 Reserved2; + U32 Identifier; + U8 LunInfo[8]; /* SCSI-2 8-bit scalar LUN goes into offset 1 */ + U32 QueueDepth; + U8 Reserved1a; + U8 NegOffset; + U8 NegDataWidth; + U8 Reserved1b; + U64 NegSyncRate; + +} I2O_SCSI_DEVICE_INFO_SCALAR, *PI2O_SCSI_DEVICE_INFO_SCALAR; + + +/* SCSI Device Group 0001h - Bus Port Information Parameter Group */ + +typedef struct _I2O_SCSI_BUS_PORT_INFO_SCALAR { + U8 PhysicalInterface; + U8 ElectricalInterface; + U8 Isochronous; + U8 ConnectorType; + U8 ConnectorGender; + U8 Reserved1; + U16 Reserved2; + U32 MaxNumberDevices; +} I2O_SCSI_BUS_PORT_INFO_SCALAR, *PI2O_SCSI_BUS_PORT_INFO_SCALAR; + + + +/****************************************************************************/ + +/* I2O SCSI Peripheral Event Indicator Assignment */ + +#define I2O_SCSI_EVENT_SCSI_SMART 0x00000010 + + +/****************************************************************************/ + +/* SCSI Peripheral Class Specific Message Definitions */ + +/****************************************************************************/ + + +/****************************************************************************/ + +/* I2O SCSI Peripheral Successful Completion Reply Message Frame */ + +typedef struct _I2O_SCSI_SUCCESS_REPLY_MESSAGE_FRAME { + I2O_SINGLE_REPLY_MESSAGE_FRAME StdReplyFrame; + U32 TransferCount; +} I2O_SCSI_SUCCESS_REPLY_MESSAGE_FRAME, *PI2O_SCSI_SUCCESS_REPLY_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* I2O SCSI Peripheral Error Report Reply Message Frame */ + +#ifdef _WIN64 +#define I2O_SCSI_SENSE_DATA_SZ 44 +#else +#define I2O_SCSI_SENSE_DATA_SZ 40 +#endif + +typedef struct _I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME { + I2O_SINGLE_REPLY_MESSAGE_FRAME StdReplyFrame; + U32 TransferCount; + U32 AutoSenseTransferCount; + U8 SenseData[I2O_SCSI_SENSE_DATA_SZ]; +} I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME, *PI2O_SCSI_ERROR_REPLY_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* I2O SCSI Device Reset Message Frame */ + +typedef struct _I2O_SCSI_DEVICE_RESET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_SCSI_DEVICE_RESET_MESSAGE, *PI2O_SCSI_DEVICE_RESET_MESSAGE; + + +/****************************************************************************/ + +/* I2O SCSI Control Block Abort Message Frame */ + +typedef struct _I2O_SCSI_SCB_ABORT_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + I2O_TRANSACTION_CONTEXT TransactionContextToAbort; +} I2O_SCSI_SCB_ABORT_MESSAGE, *PI2O_SCSI_SCB_ABORT_MESSAGE; + + +/****************************************************************************/ + +/* I2O SCSI Control Block Execute Message Frame */ + +#define I2O_SCSI_CDB_LENGTH 16 + +typedef U16 I2O_SCB_FLAGS; + +#define I2O_SCB_FLAG_XFER_DIR_MASK 0xC000 +#define I2O_SCB_FLAG_NO_DATA_XFER 0x0000 +#define I2O_SCB_FLAG_XFER_FROM_DEVICE 0x4000 +#define I2O_SCB_FLAG_XFER_TO_DEVICE 0x8000 + +#define I2O_SCB_FLAG_ENABLE_DISCONNECT 0x2000 + +#define I2O_SCB_FLAG_TAG_TYPE_MASK 0x0380 +#define I2O_SCB_FLAG_NO_TAG_QUEUEING 0x0000 +#define I2O_SCB_FLAG_SIMPLE_QUEUE_TAG 0x0080 +#define I2O_SCB_FLAG_HEAD_QUEUE_TAG 0x0100 +#define I2O_SCB_FLAG_ORDERED_QUEUE_TAG 0x0180 +#define I2O_SCB_FLAG_ACA_QUEUE_TAG 0x0200 + +#define I2O_SCB_FLAG_AUTOSENSE_MASK 0x0060 +#define I2O_SCB_FLAG_DISABLE_AUTOSENSE 0x0000 +#define I2O_SCB_FLAG_SENSE_DATA_IN_MESSAGE 0x0020 +#define I2O_SCB_FLAG_SENSE_DATA_IN_BUFFER 0x0060 + +typedef struct _I2O_SCSI_SCB_EXECUTE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U8 CDBLength; + U8 Reserved; + I2O_SCB_FLAGS SCBFlags; + U8 CDB[I2O_SCSI_CDB_LENGTH]; + U32 ByteCount; + I2O_SG_ELEMENT SGL; +} I2O_SCSI_SCB_EXECUTE_MESSAGE, *PI2O_SCSI_SCB_EXECUTE_MESSAGE; + + +PRAGMA_PACK_POP + +PRAGMA_ALIGN_POP + +#endif /* I2O_BASE_SCSI_HDR */ diff --git a/sys/dev/asr/i2odep.h b/sys/dev/asr/i2odep.h new file mode 100644 index 0000000..0fe2fc1 --- /dev/null +++ b/sys/dev/asr/i2odep.h @@ -0,0 +1,1296 @@ +/* $FreeBSD$ */ +/**************************************************************************** + * + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Copyright (c) 1998 I2O Special Interest Group (I2O SIG) + * All rights reserved + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This information is provided on an as-is basis without warranty of any + * kind, either express or implied, including but not limited to, implied + * warranties or merchantability and fitness for a particular purpose. I2O SIG + * does not warrant that this program will meet the user's requirements or + * that the operation of these programs will be uninterrupted or error-free. + * The I2O SIG disclaims all liability, including liability for infringement + * of any proprietary rights, relating to implementation of information in + * this specification. The I2O SIG does not warrant or represent that such + * implementations(s) will not infringe such rights. Acceptance and use of + * this program constitutes the user's understanding that he will have no + * recourse to I2O SIG for any actual or consequential damages including, but + * not limited to, loss profits arising out of use or inability to use this + * program. + * + * This information is provided for the purpose of recompilation of the + * driver code provided by Distributed Processing Technology only. It is + * NOT to be used for any other purpose. + * + * To develop other products based upon I2O definitions, it is necessary to + * become a "Registered Developer" of the I2O SIG. This can be done by calling + * 415-750-8352 in the US, or via http://www.i2osig.org. + * + **************************************************************************/ + +/* + * This template provides place holders for architecture and compiler + * dependencies. It should be filled in and renamed as i2odep.h. + * i2odep.h is included by i2otypes.h. marks the places to fill. + */ + +#ifndef __INCi2odeph +#define __INCi2odeph + +#define I2ODEP_REV 1_5_4 + +/* + * Pragma macros. These are to assure appropriate alignment between + * host/IOP as defined by the I2O Specification. Each one of the shared + * header files includes these macros. + */ + +#define PRAGMA_ALIGN_PUSH +#define PRAGMA_ALIGN_POP +#define PRAGMA_PACK_PUSH +#define PRAGMA_PACK_POP + +/* Setup the basics */ + +typedef signed char S8; +typedef signed short S16; + +typedef unsigned char U8; +typedef unsigned short U16; + +typedef unsigned long U32; +typedef unsigned short S32; + + +/* Bitfields */ + +#if (defined(__BORLANDC__)) +typedef U16 BF; +#else +typedef U32 BF; +#endif + + +/* VOID */ + +#ifndef __VOID +#if (defined(_DPT_ARC)) +# define VOID void +#else + typedef void VOID; +#endif +#define __VOID +#endif + + +/* Boolean */ + +#ifndef __BOOL +#define __BOOL + +typedef unsigned char BOOL; +#endif + +#if (!defined(__FAR__)) +# if (defined(__BORLANDC__)) +# define __FAR__ far +# else +# define __FAR__ +# endif +#endif + +/* NULL */ + +#if (!defined(NULL)) +# define NULL ((VOID __FAR__ *)0L) +#endif + + +#if (defined(__SPARC__) || defined(__linux__)) +typedef char CHAR; +typedef char *pCHAR; +typedef char INT8; +typedef char *pINT8; +typedef unsigned char UINT8; +typedef unsigned char *pUINT8; +typedef short INT16; +typedef short *pINT16; +typedef unsigned short UINT16; +typedef unsigned short *pUINT16; +typedef long INT32; +typedef long *pINT32; +typedef unsigned long UINT32; +typedef unsigned long *pUINT32; +//typedef SCSI_REQUEST_BLOCK OS_REQUEST_T; +//typedef PSCSI_REQUEST_BLOCK pOS_REQUEST_T; +#define STATIC static +#ifndef __NEAR__ +# if (defined(__BORLANDC__)) +# define __NEAR__ near +# else +# define __NEAR__ +# endif +#endif +#define pVOID void * +#define pBOOLEAN BOOLEAN * +#endif + + +/* + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + */ +/* + * Define some generalized portability macros + * These macros follow the following parameterization: + * _F_getXXX(pointer,primaryElement<,offset>,referredElement) + * _F_setXXX(pointer,primaryElement<,offset>,referredElement,newValue) + * These parameters are shortened to u, w, x, y and z to reduce clutter. + */ +#if (defined(__BORLANDC__)) +# define I2O_TID_MASK ((U16)((1L<x))) & I2O_TID_MASK) +# define _F_setTID(w,x,y,z) (*((U16 __FAR__ *)(&((w)->x)))\ + &= 0xFFFF - I2O_TID_MASK);\ + (*((U16 __FAR__ *)(&((w)->x)))\ + |=(U16)(z)&I2O_TID_MASK) +/* Seconds 12 bits (optimized with the assumption of 12 & 12) */ +# define _F_getTID1(w,x,y) ((*(U16 __FAR__ *)(((U8 __FAR__ *)(&((w)->x)))\ + + (I2O_TID_SZ/8)))\ + >> (I2O_TID_SZ-((I2O_TID_SZ/8)*8))) +# define _F_setTID1(w,x,y,z) ((*((U16 __FAR__ *)(((U8 __FAR__ *)(&((w)->x)))\ + + (I2O_TID_SZ/8)))) &= (0xFFFF >> I2O_TID_SZ));\ + ((*((U16 __FAR__ *)(((U8 __FAR__ *)(&((w)->x)))\ + + (I2O_TID_SZ/8)))) |= (z)\ + << (I2O_TID_SZ-((I2O_TID_SZ/8)*8))) +/* Last 8 bits */ +# define _F_getFunc(w,x,y) (*(((U8 __FAR__ *)(&((w)->x)))\ + + ((I2O_TID_SZ+I2O_TID_SZ)/8))) +# define _F_setFunc(w,x,y,z) (_F_getFunc(w,x,y) = (z)) +# define I2O_SG_COUNT_MASK ((U32)((1L<x)))&I2O_SG_COUNT_MASK) +/* + * The following is less efficient because of compiler inefficiencies: + * + * # define _F_setCount(w,x,y,z) *((U16 __FAR__ *)(&((w)->x))) = (U16)(z);\ + * ((U8 __FAR__ *)(&((w)->x)))[2]= (U8)((z)>>16L) + * + * so we will use the apparently more code intensive: + */ +# define _F_setCount(w,x,y,z) (*((U32 __FAR__ *)(&((w)->x)))\ + &= 0xFFFFFFFFL - I2O_SG_COUNT_MASK);\ + (*((U32 __FAR__ *)(&((w)->x)))\ + |= (z) & I2O_SG_COUNT_MASK) +/* Last 8 bits */ +# define _F_getFlags(w,x,y) (*(((U8 __FAR__ *)(&((w)->x)))\ + + (I2O_SG_COUNT_SZ/8))) +# define _F_setFlags(w,x,y,z) (_F_getFlags(w,x,y) = (z)) +/* Other accesses that are simpler */ +# define _F_get1bit(w,x,y,z) ((U8)((w)->z)) +# define _F_set1bit(w,x,y,z,u) ((w)->z = (u)) +# define _F_get1bit1(w,x,y,z) ((U8)((w)->z)) +# define _F_set1bit1(w,x,y,z,u) ((w)->z = (u)) +# define _F_get4bit4(w,x,y,z) ((U8)((w)->z)) +# define _F_set4bit4(w,x,y,z,u) ((w)->z = (u)) +# define _F_get8bit(w,x,y,z) ((U8)((w)->z)) +# define _F_set8bit(w,x,y,z,u) ((w)->z = (u)) +# define _F_get12bit(w,x,y,z) ((U16)((w)->z)) +# define _F_set12bit(w,x,y,z,u) ((w)->z = (u)) +# define _F_get12bit4(w,x,y,z) ((U16)((w)->z)) +# define _F_set12bit4(w,x,y,z,u) ((w)->z = (u)) +# define _F_get16bit(w,x,y,z) ((U16)((w)->z)) +# define _F_set16bit(w,x,y,z,u) ((w)->z = (u)) +#elif (defined(_DPT_BIG_ENDIAN)) +/* First 12 bits */ +# define _F_getTID(w,x,y) getL12bit(w,x,0) +# define _F_setTID(w,x,y,z) setL12bit(w,x,0,z) +# define _F_getTID1(w,x,y) getL12bit1(w,x,0) +# define _F_setTID1(w,x,y,z) setL12bit1(w,x,0,z) +# define _F_getFunc(w,x,y) getL8bit(w,x,3) +# define _F_setFunc(w,x,y,z) setL8bit(w,x,3,z) +# define _F_getCount(w,x,y) getL24bit1(w,x,0) +# define _F_setCount(w,x,y,z) setL24bit1(w,x,0,z) +# define _F_getFlags(w,x,y) getL8bit(w,x,3) +# define _F_setFlags(w,x,y,z) setL8bit(w,x,3,z) +/* Other accesses that are simpler */ +# define _F_get1bit(w,x,y,z) getL1bit(w,x,y) +# define _F_set1bit(w,x,y,z,u) setL1bit(w,x,y,u) +# define _F_get1bit1(w,x,y,z) getL1bit1(w,x,y) +# define _F_set1bit1(w,x,y,z,u) setL1bit1(w,x,y,u) +# define _F_get4bit4(w,x,y,z) getL4bit(w,x,y) +# define _F_set4bit4(w,x,y,z,u) setL4bit(w,x,y,u) +# define _F_get8bit(w,x,y,z) getL8bit(w,x,y) +# define _F_set8bit(w,x,y,z,u) setL8bit(w,x,y,u) +# define _F_get12bit(w,x,y,z) getL12bit(w,x,y) +# define _F_set12bit(w,x,y,z,u) setL12bit(w,x,y,z) +# define _F_get12bit4(w,x,y,z) getL12bit1(w,x,(y)-1) +# define _F_set12bit4(w,x,y,z,u) setL12bit1(w,x,(y)-1,u) +# define _F_get16bit(w,x,y,z) getL16bit(w,x,y) +# define _F_set16bit(w,x,y,z,u) setL16bit(w,x,y,u) +#else +# define _F_getTID(w,x,y) ((U16)((w)->y)) +# define _F_setTID(w,x,y,z) ((w)->y = (z)) +# define _F_getTID1(w,x,y) ((U16)((w)->y)) +# define _F_setTID1(w,x,y,z) ((w)->y = (z)) +# define _F_getFunc(w,x,y) ((U8)((w)->y)) +# define _F_setFunc(w,x,y,z) ((w)->y = (z)) +# define _F_getCount(w,x,y) ((U32)((w)->y)) +# define _F_setCount(w,x,y,z) ((w)->y = (z)) +# define _F_getFlags(w,x,y) ((U8)((w)->y)) +# define _F_setFlags(w,x,y,z) ((w)->y = (z)) +# define _F_get1bit(w,x,y,z) ((U8)((w)->z)) +# define _F_set1bit(w,x,y,z,u) ((w)->z = (u)) +# define _F_get1bit1(w,x,y,z) ((U8)((w)->z)) +# define _F_set1bit1(w,x,y,z,u) ((w)->z = (u)) +# define _F_get4bit4(w,x,y,z) ((U8)((w)->z)) +# define _F_set4bit4(w,x,y,z,u) ((w)->z = (u)) +# define _F_get8bit(w,x,y,z) ((U8)((w)->z)) +# define _F_set8bit(w,x,y,z,u) ((w)->z = (u)) +# define _F_get12bit(w,x,y,z) ((U16)((w)->z)) +# define _F_set12bit(w,x,y,z,u) ((w)->z = (u)) +# define _F_get12bit4(w,x,y,z) ((U16)((w)->z)) +# define _F_set12bit4(w,x,y,z,u) ((w)->z = (u)) +# define _F_get16bit(w,x,y,z) ((U16)((w)->z)) +# define _F_set16bit(w,x,y,z,u) ((w)->z = (u)) +#endif + +/* + * Define some specific portability macros + * These macros follow the following parameterization: + * XXX_getYYY (pointer) + * XXX_setYYY (pointer, newValue) + * These parameters are shortened to x and y to reduce clutter. + */ + +/* + * General SGE + */ +#define I2O_FLAGS_COUNT_getCount(x) _F_getCount(x,Count,Count) +#define I2O_FLAGS_COUNT_setCount(x,y) _F_setCount(x,Count,Count,y) +#define I2O_FLAGS_COUNT_getFlags(x) _F_getFlags(x,Count,Flags) +#define I2O_FLAGS_COUNT_setFlags(x,y) _F_setFlags(x,Count,Flags,y) + +/* + * I2O_SGE_SIMPLE_ELEMENT + */ +#define I2O_SGE_SIMPLE_ELEMENT_getPhysicalAddress(x) \ + getLU4((&(x)->PhysicalAddress),0) +#define I2O_SGE_SIMPLE_ELEMENT_setPhysicalAddress(x,y) \ + setLU4((&(x)->PhysicalAddress),0,y) +/* + * I2O_SGE_LONG_TRANSACTION_ELEMENT + */ +#define I2O_SGE_LONG_TRANSACTION_ELEMENT_getLongElementLength(x)\ + _F_getCount(x,LongElementLength,LongElementLength) +#define I2O_SGE_LONG_TRANSACTION_ELEMENT_setLongElementLength(x,y)\ + _F_setCount(x,LongElementLength,LongElementLength,y) +#define I2O_SGE_LONG_TRANSACTION_ELEMENT_getFlags(x)\ + _F_getFlags(x,LongElementLength,Flags) +#define I2O_SGE_LONG_TRANSACTION_ELEMENT_setFlags(x,y)\ + _F_setFlags(x,LongElementLength,Flags,y) + +/* + * I2O_SGE_LONG_TRANSPORT_ELEMENT + */ +#define I2O_SGE_LONG_TRANSPORT_ELEMENT_getLongElementLength(x)\ + _F_getCount(x,LongElementLength,LongElementLength) +#define I2O_SGE_LONG_TRANSPORT_ELEMENT_setLongElementLength(x,y)\ + _F_setCount(x,LongElementLength,LongElementLength,y) +#define I2O_SGE_LONG_TRANSPORT_ELEMENT_getFlags(x)\ + _F_getFlags(x,LongElementLength,Flags) +#define I2O_SGE_LONG_TRANSPORT_ELEMENT_setFlags(x,y)\ + _F_setFlags(x,LongElementLength,Flags,y) + +/* + * I2O_EXEC_ADAPTER_ASSIGN_MESSAGE + */ +#define I2O_EXEC_ADAPTER_ASSIGN_MESSAGE_getDdmTID(x)\ + _F_getTID(x,DdmTID,DdmTID) +#define I2O_EXEC_ADAPTER_ASSIGN_MESSAGE_setDdmTID(x,y)\ + _F_setTID(x,DDdmTID,DdmTID,y) +#define I2O_EXEC_ADAPTER_ASSIGN_MESSAGE_getOperationFlags(x)\ + _F_getFunc(x,DdmTID,OperationFlags) +#define I2O_EXEC_ADAPTER_ASSIGN_MESSAGE_setOperationFlags(x,y)\ + _F_setFunc(x,DdmTID,OperationFlags,y) + +/* + * I2O_EXEC_BIOS_INFO_SET_MESSAGE + */ +#define I2O_EXEC_BIOS_INFO_SET_MESSAGE_getDeviceTID(x)\ + _F_getTID(x,DeviceTID,DeviceTID) +#define I2O_EXEC_BIOS_INFO_SET_MESSAGE_setDeviceTID(x,y)\ + _F_setTID(x,DeviceTID,DeviceTID,y) +#define I2O_EXEC_BIOS_INFO_SET_MESSAGE_getBiosInfo(x)\ + _F_getFunc(x,DeviceTID,BiosInfo) +#define I2O_EXEC_BIOS_INFO_SET_MESSAGE_setBiosInfo(x,y) \ + _F_setFunc(x,DeviceTID,BiosInfo,y) + +/* + * I2O_ALIAS_CONNECT_SETUP + */ +#define I2O_ALIAS_CONNECT_SETUP_getIOP1AliasForTargetDevice(x)\ + _F_getTID(x,IOP1AliasForTargetDevice,IOP1AliasForTargetDevice) +#define I2O_ALIAS_CONNECT_SETUP_setIOP1AliasForTargetDevice(x,y)\ + _F_setTID(x,IOP1AliasForTargetDevice,IOP1AliasForTargetDevice,y) +#define I2O_ALIAS_CONNECT_SETUP_getIOP2AliasForInitiatorDevice(x)\ + _F_getTID1(x,IOP1AliasForTargetDevice,IOP2AliasForInitiatorDevice) +#define I2O_ALIAS_CONNECT_SETUP_setIOP2AliasForInitiatorDevice(x,y)\ + _F_setTID1(x,IOP1AliasForTargetDevice,IOP2AliasForInitiatorDevice,y) + +/* + * I2O_OBJECT_CONNECT_SETUP + */ +#define I2O_OBJECT_CONNECT_SETUP_getTargetDevice(x)\ + _F_getTID(x,TargetDevice,TargetDevice) +#define I2O_OBJECT_CONNECT_SETUP_setTargetDevice(x,y)\ + _F_setTID(x,TargetDevice,TargetDevice,y) +#define I2O_OBJECT_CONNECT_SETUP_getInitiatorDevice(x)\ + _F_getTID1(x,TargetDevice,InitiatorDevice) +#define I2O_OBJECT_CONNECT_SETUP_setInitiatorDevice(x,y)\ + _F_setTID1(x,TargetDevice,InitiatorDevice,y) +#define I2O_OBJECT_CONNECT_SETUP_getOperationFlags(x)\ + _F_getFunc(x,TargetDevice,OperationFlags) +#define I2O_OBJECT_CONNECT_SETUP_setOperationFlags(x,y)\ + _F_setFunc(x,TargetDevice,OperationFlags,y) + +/* + * I2O_OBJECT_CONNECT_REPLY + */ +#define I2O_OBJECT_CONNECT_REPLY_getTargetDevice(x)\ + _F_getTID(x,TargetDevice,TargetDevice) +#define I2O_OBJECT_CONNECT_REPLY_setTargetDevice(x,y)\ + _F_setTID(x,TargetDevice,TargetDevice,y) +#define I2O_OBJECT_CONNECT_REPLY_getInitiatorDevice(x)\ + _F_getTID1(x,TargetDevice,InitiatorDevice) +#define I2O_OBJECT_CONNECT_REPLY_setInitiatorDevice(x,y)\ + _F_setTID1(x,TargetDevice,InitiatorDevice,y) +#define I2O_OBJECT_CONNECT_REPLY_getReplyStatusCode(x)\ + _F_getFunc(x,TargetDevice,ReplyStatusCode) +#define I2O_OBJECT_CONNECT_REPLY_setReplyStatusCode(x,y)\ + _F_setFunc(x,TargetDevice,ReplyStatusCode,y) + +/* + * I2O_EXEC_DEVICE_ASSIGN_MESSAGE + */ +#define I2O_EXEC_DEVICE_ASSIGN_MESSAGE_getDeviceTID(x)\ + _F_getTID(x,Object.DeviceTID,Object.DeviceTID) +#define I2O_EXEC_DEVICE_ASSIGN_MESSAGE_setDeviceTID(x,y)\ + _F_setTID(x,Object.DeviceTID,Object.DeviceTID,y) +#define I2O_EXEC_DEVICE_ASSIGN_MESSAGE_getIOP_ID(x)\ + _F_getTID1(x,Object.DeviceTID,Object.IOP_ID) +#define I2O_EXEC_DEVICE_ASSIGN_MESSAGE_setIOP_ID(x,y)\ + _F_setTID1(x,Object.DeviceTID,Object.IOP_ID,y) +#define I2O_EXEC_DEVICE_ASSIGN_MESSAGE_getOperationFlags(x)\ + _F_getFunc(x,Object.DeviceTID,Object.OperationFlags) +#define I2O_EXEC_DEVICE_ASSIGN_MESSAGE_setOperationFlags(x,y)\ + _F_setFunc(x,Object.DeviceTID,Object.OperationFlags,y) + +/* + * I2O_EXEC_DEVICE_RELEASE_MESSAGE + */ +#define I2O_EXEC_DEVICE_RELEASE_MESSAGE_getDeviceTID(x)\ + _F_getTID(x,Object.DeviceTID,Object.DeviceTID) +#define I2O_EXEC_DEVICE_RELEASE_MESSAGE_setDeviceTID(x,y)\ + _F_setTID(x,Object.DeviceTID,Object.DeviceTID,y) +#define I2O_EXEC_DEVICE_RELEASE_MESSAGE_getIOP_ID(x)\ + _F_getTID1(x,Object.DeviceTID,Object.IOP_ID) +#define I2O_EXEC_DEVICE_RELEASE_MESSAGE_setIOP_ID(x,y)\ + _F_setTID1(x,Object.DeviceTID,Object.IOP_ID,y) +#define I2O_EXEC_DEVICE_RELEASE_MESSAGE_getOperationFlags(x)\ + _F_getFunc(x,Object.DeviceTID,Object.OperationFlags) +#define I2O_EXEC_DEVICE_RELEASE_MESSAGE_setOperationFlags(x,y)\ + _F_setFunc(x,Object.DeviceTID,Object.OperationFlags,y) + +/* + * I2O_EXEC_IOP_RESET_MESSAGE + */ +#define I2O_EXEC_IOP_RESET_MESSAGE_getTargetAddress(x)\ + _F_getTID(x,TargetAddress,TargetAddress) +#define I2O_EXEC_IOP_RESET_MESSAGE_setTargetAddress(x,y)\ + _F_setTID(x,TargetAddress,TargetAddress,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getInitiatorAddress(x)\ + _F_getTID1(x,TargetAddress,InitiatorAddress) +#define I2O_EXEC_IOP_RESET_MESSAGE_setInitiatorAddress(x,y)\ + _F_setTID1(x,TargetAddress,InitiatorAddress,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getFunction(x)\ + _F_getFunc(x,TargetAddress,Function) +#define I2O_EXEC_IOP_RESET_MESSAGE_setFunction(x,y)\ + _F_setFunc(x,TargetAddress,Function,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getVersionOffset(x)\ + getU1((&(x)->VersionOffset),0) +#define I2O_EXEC_IOP_RESET_MESSAGE_setVersionOffset(x,y)\ + setU1((&(x)->VersionOffset),0,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getMsgFlags(x)\ + getU1((&(x)->VersionOffset),1) +#define I2O_EXEC_IOP_RESET_MESSAGE_setMsgFlags(x,y)\ + setU1((&(x)->VersionOffset),1,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getMessageSize(x)\ + getLU2((&(x)->VersionOffset),2) +#define I2O_EXEC_IOP_RESET_MESSAGE_setMessageSize(x,y)\ + setLU2((&(x)->VersionOffset),2,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getStatusWordLowAddress(x)\ + getLU4((&(x)->StatusWordLowAddress),0) +#define I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordLowAddress(x,y)\ + setLU4((&(x)->StatusWordLowAddress),0,y) +#define I2O_EXEC_IOP_RESET_MESSAGE_getStatusWordHighAddress(x)\ + getLU4((&(x)->StatusWordHighAddress),0) +#define I2O_EXEC_IOP_RESET_MESSAGE_setStatusWordHighAddress(x,y)\ + setLU4((&(x)->StatusWordHighAddress),0,y) + + +/* + * I2O_EXEC_STATUS_GET_MESSAGE + */ +#define I2O_EXEC_STATUS_GET_MESSAGE_getVersionOffset(x)\ + getU1((&(x)->VersionOffset),0) +#define I2O_EXEC_STATUS_GET_MESSAGE_setVersionOffset(x,y)\ + setU1((&(x)->VersionOffset),0,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getMsgFlags(x)\ + getU1((&(x)->VersionOffset),1) +#define I2O_EXEC_STATUS_GET_MESSAGE_setMsgFlags(x,y)\ + setU1((&(x)->VersionOffset),1,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getMessageSize(x)\ + getLU2((&(x)->VersionOffset),2) +#define I2O_EXEC_STATUS_GET_MESSAGE_setMessageSize(x,y)\ + setLU2((&(x)->VersionOffset),2,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getReplyBufferAddressLow(x)\ + getLU4((&(x)->ReplyBufferAddressLow),0) +#define I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressLow(x,y)\ + setLU4((&(x)->ReplyBufferAddressLow),0,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getReplyBufferAddressHigh(x)\ + getLU4((&(x)->ReplyBufferAddressHigh),0) +#define I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferAddressHigh(x,y)\ + setLU4((&(x)->ReplyBufferAddressHigh),0,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getReplyBufferLength(x)\ + getLU4((&(x)->ReplyBufferLength),0) +#define I2O_EXEC_STATUS_GET_MESSAGE_setReplyBufferLength(x,y)\ + setLU4((&(x)->ReplyBufferLength),0,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getTargetAddress(x)\ + _F_getTID(x,TargetAddress,TargetAddress) +#define I2O_EXEC_STATUS_GET_MESSAGE_setTargetAddress(x,y)\ + _F_setTID(x,TargetAddress,TargetAddress,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getInitiatorAddress(x)\ + _F_getTID1(x,TargetAddress,InitiatorAddress) +#define I2O_EXEC_STATUS_GET_MESSAGE_setInitiatorAddress(x,y)\ + _F_setTID1(x,TargetAddress,InitiatorAddress,y) +#define I2O_EXEC_STATUS_GET_MESSAGE_getFunction(x)\ + _F_getFunc(x,TargetAddress,Function) +#define I2O_EXEC_STATUS_GET_MESSAGE_setFunction(x,y)\ + _F_setFunc(x,TargetAddress,Function,y) + +/* + * I2O_MESSAGE_FRAME + */ +#define I2O_MESSAGE_FRAME_getVersionOffset(x)\ + getU1((&((x)->VersionOffset)),0) +#define I2O_MESSAGE_FRAME_setVersionOffset(x,y)\ + setU1(((&(x)->VersionOffset)),0,y) +#define I2O_MESSAGE_FRAME_getMsgFlags(x)\ + getU1((&((x)->VersionOffset)),1) +#define I2O_MESSAGE_FRAME_setMsgFlags(x,y)\ + setU1((&((x)->VersionOffset)),1,y) +#define I2O_MESSAGE_FRAME_getMessageSize(x)\ + getLU2((&((x)->VersionOffset)),2) +#define I2O_MESSAGE_FRAME_setMessageSize(x,y)\ + setLU2((&((x)->VersionOffset)),2,y) +#define I2O_MESSAGE_FRAME_getTargetAddress(x)\ + _F_getTID(x,TargetAddress,TargetAddress) +#define I2O_MESSAGE_FRAME_setTargetAddress(x,y)\ + _F_setTID(x,TargetAddress,TargetAddress,y) +#define I2O_MESSAGE_FRAME_getInitiatorAddress(x)\ + _F_getTID1(x,TargetAddress,InitiatorAddress) +#define I2O_MESSAGE_FRAME_setInitiatorAddress(x,y)\ + _F_setTID1(x,TargetAddress,InitiatorAddress,y) +#define I2O_MESSAGE_FRAME_getFunction(x)\ + _F_getFunc(x,TargetAddress,Function) +#define I2O_MESSAGE_FRAME_setFunction(x,y)\ + _F_setFunc(x,TargetAddress,Function,y) +/* 32 bit only for now */ +#define I2O_MESSAGE_FRAME_getInitiatorContext(x)\ + (x)->InitiatorContext +#define I2O_MESSAGE_FRAME_setInitiatorContext(x,y)\ + ((x)->InitiatorContext = (y)) +/* + * We are spilling the 64 bit Context field into the Transaction + * context of the specific frames. Synchronous commands (resetIop + * et al) do not have this field, so beware. Also, Failed Reply frames + * can not contain the 64 bit context, the software must reference + * the PreservedMFA and pick up the 64 bit context from the incoming + * message frame. The software must make no reference to the + * TransactionContext field at all. + */ +#if defined(_MSC_VER) && _MSC_VER >= 800 +#ifndef u_int64_t +#define u_int64_t unsigned __int64 +#endif +#endif +#define I2O_MESSAGE_FRAME_getInitiatorContext64(x)\ + (*((u_int64_t *)(&((x)->InitiatorContext)))) +#define I2O_MESSAGE_FRAME_setInitiatorContext64(x,y)\ + ((*((u_int64_t *)(&((x)->InitiatorContext))))=(y)) + +/* + * I2O_EXEC_OUTBOUND_INIT_MESSAGE + */ +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_getHostPageFrameSize(x)\ + getLU4((&(x)->HostPageFrameSize),0) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_setHostPageFrameSize(x,y)\ + setLU4((&(x)->HostPageFrameSize),0,y) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_getInitCode(x)\ + getU1((&(x)->InitCode),0) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_setInitCode(x,y)\ + setU1((&(x)->InitCode),0,y) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_getreserved(x)\ + getU1((&(x)->reserved),0) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_setreserved(x,y)\ + setU1((&(x)->reserved),0,y) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_getOutboundMFrameSize(x)\ + getLU2((&(x)->OutboundMFrameSize),0) +#define I2O_EXEC_OUTBOUND_INIT_MESSAGE_setOutboundMFrameSize(x,y)\ + setLU2((&(x)->OutboundMFrameSize),0,y) + +/* + * I2O_EXEC_SYS_TAB_SET_MESSAGE + */ +#define I2O_EXEC_SYS_TAB_SET_MESSAGE_getIOP_ID(x)\ + _F_get12bit(x,IOP_ID,IOP_ID) +#define I2O_EXEC_SYS_TAB_SET_MESSAGE_setIOP_ID(x,y)\ + _F_set12bit(x,IOP_ID,IOP_ID,y) +/* #define I2O_EXEC_SYS_TAB_SET_MESSAGE_getreserved1(x) */ +#define I2O_EXEC_SYS_TAB_SET_MESSAGE_getHostUnitID(x)\ + _F_get16bit(x,IOP_ID,2,HostUnitID) +#define I2O_EXEC_SYS_TAB_SET_MESSAGE_setHostUnitID(x,y)\ + _F_set16bit(x,IOP_ID,2,HostUnitID,y) +#define I2O_EXEC_SYS_TAB_SET_MESSAGE_getSegmentNumber(x)\ + _F_get12bit(x,SegmentNumber,SegmentNumber) +#define I2O_EXEC_SYS_TAB_SET_MESSAGE_setSegmentNumber(x,y)\ + _F_get12bit(x,SegmentNumber,SegmentNumber,y) + +/* later + * I2O_EXEC_SYS_ENABLE_MESSAGE + */ + +/* + * I2O_CLASS_ID + */ +#define I2O_CLASS_ID_getClass(x)\ + _F_get12bit(x,Class,0,Class) +#define I2O_CLASS_ID_setClass(x,y)\ + _F_set12bit(x,Class,0,Class,y) +#define I2O_CLASS_ID_getVersion(x)\ + _F_get4bit4(x,Class,1,Version) +#define I2O_CLASS_ID_setVersion(x,y)\ + _F_set4bit4(x,Class,1,Version,y) +#define I2O_CLASS_ID_getOrganizationID(x)\ + _F_get16bit(x,Class,2,OrganizationID) +#define I2O_CLASS_ID_setOrganizationID(x,y)\ + _F_set16bit(x,Class,2,OrganizationID,y) + +/* + * I2O_SET_SYSTAB_HEADER + */ +#define I2O_SET_SYSTAB_HEADER_getNumberEntries(x)\ + getU1((&((x)->NumberEntries)),0) +#define I2O_SET_SYSTAB_HEADER_setNumberEntries(x,y)\ + setU1((&(x)->NumberEntries),0,y) +#define I2O_SET_SYSTAB_HEADER_getSysTabVersion(x)\ + getU1((&((x)->SysTabVersion)),0) +#define I2O_SET_SYSTAB_HEADER_setSysTabVersion(x,y)\ + setU1((&(x)->SysTabVersion),0,y) +/* U16 reserved */ +/* U32 CurrentChangeIndicator */ + + + + +/* + * I2O_IOP_ENTRY + */ +#define I2O_IOP_ENTRY_getOrganizationID(x)\ + getLU2((&((x)->OrganizationID)),0) +#define I2O_IOP_ENTRY_setOrganizationID(x,y)\ + setLU2((&((x)->OrganizationID)),0,y) +/* #define I2O_IOP_ENTRY_getreserved U16; */ +#define I2O_IOP_ENTRY_getIOP_ID(x)\ + _F_get12bit(x,IOP_ID,0,IOP_ID) +#define I2O_IOP_ENTRY_setIOP_ID(x,y)\ + _F_set12bit(x,IOP_ID,0,IOP_ID,y) +/* BF reserved3:I2O_RESERVED_4BITS; */ +/* BF reserved1:I2O_RESERVED_16BITS; */ +#define I2O_IOP_ENTRY_getSegmentNumber(x)\ + _F_get12bit(x,SegmentNumber,0,SegmentNumber) +#define I2O_IOP_ENTRY_setSegmentNumber(x,y)\ + _F_set12bit(x,SegmentNumber,0,SegmentNumber,y) +#define I2O_IOP_ENTRY_getI2oVersion(x)\ + _F_get4bit4(x,SegmentNumber,1,I2oVersion) +#define I2O_IOP_ENTRY_setI2oVersion(x,y)\ + _F_set4bit4(x,SegmentNumber,1,I2oVersion,y) +#define I2O_IOP_ENTRY_getIopState(x)\ + _F_get8bit(x,SegmentNumber,2,IopState) +#define I2O_IOP_ENTRY_setIopState(x,y)\ + _F_set8bit(x,SegmentNumber,2,IopState,y) +#define I2O_IOP_ENTRY_getMessengerType(x)\ + _F_get8bit(x,SegmentNumber,3,MessengerType) +#define I2O_IOP_ENTRY_setMessengerType(x,y)\ + _F_set8bit(x,SegmentNumber,3,MessengerType,y) +#define I2O_IOP_ENTRY_getInboundMessageFrameSize(x)\ + getLU2((&((x)->InboundMessageFrameSize)),0) +#define I2O_IOP_ENTRY_setInboundMessageFrameSize(x,y)\ + setLU2((&((x)->InboundMessageFrameSize)),0,y) +#define I2O_IOP_ENTRY_getreserved2(x)\ + getLU2((&((x)->reserved2)),0) +#define I2O_IOP_ENTRY_setreserved2(x,y)\ + setLU2((&((x)->reserved2)),0,y) +#define I2O_IOP_ENTRY_getLastChanged(x)\ + getLU4((&((x)->LastChanged)),0) +#define I2O_IOP_ENTRY_setLastChanged(x,y)\ + setLU4((&((x)->LastChanged)),0,y) +#define I2O_IOP_ENTRY_getIopCapabilities(x)\ + getLU4((&((x)->IopCapabilities)),0) +#define I2O_IOP_ENTRY_setIopCapabilities(x,y)\ + setLU4((&((x)->IopCapabilities)),0,y) + +/* might want to declare I2O_MESSENGER_INFO struct */ + +#define I2O_IOP_ENTRY_getInboundMessagePortAddressLow(x)\ + getLU4((&((x)->MessengerInfo.InboundMessagePortAddressLow)),0) +#define I2O_IOP_ENTRY_setInboundMessagePortAddressLow(x,y)\ + setLU4((&((x)->MessengerInfo.InboundMessagePortAddressLow)),0,y) + +#define I2O_IOP_ENTRY_getInboundMessagePortAddressHigh(x)\ + getLU4((&((x)->MessengerInfo.InboundMessagePortAddressHigh)),0) +#define I2O_IOP_ENTRY_setInboundMessagePortAddressHigh(x,y)\ + setLU4((&((x)->MessengerInfo.InboundMessagePortAddressHigh)),0,y) + +/* + * I2O_HRT + */ +#define I2O_HRT_getNumberEntries(x)\ + getLU2((&((x)->NumberEntries)),0) +#define I2O_HRT_setNumberEntries(x,y)\ + setLU2((&(x)->NumberEntries),0,y) +#define I2O_HRT_getEntryLength(x)\ + getU1((&(x)->EntryLength),0) +#define I2O_HRT_setEntryLength(x,y)\ + setU1((&(x)->EntryLength),0,y) +#define I2O_HRT_getHRTVersion(x)\ + getU1((&(x)->HRTVersion),0) +#define I2O_HRT_setHRTVersion(x,y)\ + setU1((&(x)->HRTVersion),0,y) +#define I2O_HRT_getCurrentChangeIndicator(x)\ + getLU4((&(x)->CurrentChangeIndicator),0) +#define I2O_HRT_setCurrentChangeIndicator(x,y)\ + setLU4((&(x)->CurrentChangeIndicator),0,y) +#define I2O_HRT_getHRTEntryPtr(x,y)\ + ((&((x)->HRTEntry[0+y]))) + +/* + * I2O_HRT_ENTRY + */ +#define I2O_HRT_ENTRY_getAdapterID(x)\ + getLU4((&((x)->AdapterID)),0) +#define I2O_HRT_ENTRY_setAdapterID(x,y)\ + setLU4((&(x)->AdapterID),0,y) +#define I2O_HRT_ENTRY_getControllingTID(x)\ + _F_get12bit(x,ControllingTID,ControllingTID) +#define I2O_HRT_ENTRY_setControllingTID(x,y)\ + _F_set12bit(x,ControllingTID,ControllingTID,y) +#define I2O_HRT_ENTRY_getAdapterState(x)\ + _F_get4bit4(x,ControllingTID,1,AdapterState) +#define I2O_HRT_ENTRY_setIAdapterState(x,y)\ + _F_set4bit4(x,ControllingTID,1,AdapterState,y) +#define I2O_HRT_ENTRY_getBusNumber(x)\ + _F_get8bit(x,ControllingTID,2,BusNumber) +#define I2O_HRT_ENTRY_setBusNumber(x,y)\ + _F_set8bit(x,ControllingTID,2,BusNumber,y) +#define I2O_HRT_ENTRY_getBusType(x)\ + _F_get8bit(x,ControllingTID,3,BusType) +#define I2O_HRT_ENTRY_setBusType(x,y)\ + _F_set8bit(x,ControllingTID,3,BusType,y) +#define I2O_HRT_ENTRY_getPCIBusPtr(x,y)\ + (&((x)->uBus.PCIBus)) + +/* + * I2O_LCT + */ +#define I2O_LCT_getTableSize(x)\ + _F_get16bit(x,TableSize,0,TableSize) +#define I2O_LCT_setTableSize(x,y)\ + _F_set16bit(x,TableSize,0,TableSize,y) +#define I2O_LCT_getBootDeviceTID(x)\ + _F_get12bit(x,TableSize,2,BootDeviceTID) +#define I2O_LCT_setBootDeviceTID(x,y)\ + _F_set12bit(x,TableSize,2,BootDeviceTID,y) +#define I2O_LCT_getLctVer(x)\ + _F_get4bit4(x,TableSize,3,LctVer) +#define I2O_LCT_setLctVer(x,y)\ + _F_set4bit4(x,TableSize,3,LctVer,y) +#define I2O_LCT_getIopFlags(x)\ + getLU4((&(x)->IopFlags),0) +#define I2O_LCT_setIopFlags(x,y)\ + setLU4((&(x)->IopFlags),0,y) +#define I2O_LCT_getCurrentChangeIndicator(x)\ + getLU4((&(x)->CurrentChangeIndicator),0) +#define I2O_LCT_setCurrentChangeIndicator(x,y)\ + setLU4((&(x)->CurrentChangeIndicator),0,y) +#define I2O_LCT_getLCTEntryPtr(x,y)\ + (&((x)->LCTEntry[0+y])) + +/* + * I2O_LCT_ENTRY + */ +#define I2O_LCT_ENTRY_getTableEntrySize(x)\ + _F_get16bit(x,TableEntrySize,0,TableEntrySize) +#define I2O_LCT_ENTRY_setTableEntrySize(x,y)\ + _F_set16bit(x,TableEntrySize,0,TableEntrySize,y) +#define I2O_LCT_ENTRY_getLocalTID(x)\ + _F_get12bit(x,TableEntrySize,2,LocalTID) +#define I2O_LCT_ENTRY_setLocalTID(x,y)\ + _F_set12bit(x,TableEntrySize,2,LocalTID,y) +/* BF 4 reserved:I2O_4BIT_VERSION_SZ; */ +#define I2O_LCT_ENTRY_getChangeIndicator(x)\ + getLU4((&(x)->ChangeIndicator),0) +#define I2O_LCT_ENTRY_setChangeIndicator(x,y)\ + setLU4((&(x)->ChangeIndicator),0,y) +#define I2O_LCT_ENTRY_getDeviceFlags(x)\ + getLU4((&(x)->DeviceFlags),0) +#define I2O_LCT_ENTRY_setDeviceFlags(x,y)\ + setLU4((&(x)->DeviceFlags),0,y) +#define I2O_LCT_ENTRY_getClassIDPtr(x)\ + (&((x)->ClassID)) +#define I2O_LCT_ENTRY_getSubClassInfo(x)\ + getLU4((&(x)->SubClassInfo),0) +#define I2O_LCT_ENTRY_setSubClassInfo(x,y)\ + setLU4((&(x)->SubClassInfo),0,y) +#define I2O_LCT_ENTRY_getUserTID(x)\ + _F_getTID(x,UserTID,UserTID) +#define I2O_LCT_ENTRY_setUserTID(x,y)\ + _F_setTID(x,UserTID,UserTID,y) +#define I2O_LCT_ENTRY_getParentTID(x)\ + _F_getTID1(x,UserTID,ParentTID) +#define I2O_LCT_ENTRY_setParentTID(x,y)\ + _F_getTID1(x,UserTID,ParentTID,y) +#define I2O_LCT_ENTRY_getBiosInfo(x)\ + _F_getFunc(x,UserTID,BiosInfo) +#define I2O_LCT_ENTRY_setBiosInfo(x,y)\ + _F_setFunc(x,UserTID,BiosInfo,y) +/* 2 ulong U8 8 IdentityTag[I2O_IDENTITY_TAG_SZ]; */ +#define I2O_LCT_ENTRY_getEventCapabilities(x)\ + getLU4((&(x)->EventCapabilities),0) +#define I2O_LCT_ENTRY_setEventCapabilities(x,y)\ + setLU4((&(x)->EventCapabilities),0,y) + +/* + * I2O_PARAM_OPERATIONS_LIST_HEADER + */ +#define I2O_PARAM_OPERATIONS_LIST_HEADER_getOperationCount(x)\ + getLU2((&(x)->OperationCount),0) +#define I2O_PARAM_OPERATIONS_LIST_HEADER_setOperationCount(x,y)\ + setLU2((&(x)->OperationCount),0,y) +#define I2O_PARAM_OPERATIONS_LIST_HEADER_getReserved(x)\ + getLU2((&(x)->Reserved),0) +#define I2O_PARAM_OPERATIONS_LIST_HEADER_setReserved(x,y)\ + setLU2((&(x)->Reserved),0,y) + +/* + * I2O_PARAM_OPERATION_ALL_TEMPLATE + */ +#define I2O_PARAM_OPERATION_ALL_TEMPLATE_getOperation(x)\ + getLU2((&(x)->Operation),0) +#define I2O_PARAM_OPERATION_ALL_TEMPLATE_setOperation(x,y)\ + setLU2((&(x)->Operation),0,y) +#define I2O_PARAM_OPERATION_ALL_TEMPLATE_getGroupNumber(x)\ + getLU2((&(x)->GroupNumber),0) +#define I2O_PARAM_OPERATION_ALL_TEMPLATE_setGroupNumber(x,y)\ + setLU2((&(x)->GroupNumber),0,y) +#define I2O_PARAM_OPERATION_ALL_TEMPLATE_getFieldCount(x)\ + getLU2((&(x)->FieldCount),0) +#define I2O_PARAM_OPERATION_ALL_TEMPLATE_setFieldCount(x,y)\ + setLU2((&(x)->FieldCount),0,y) + +/* + * I2O_PARAM_RESULTS_LIST_HEADER + */ +#define I2O_PARAM_RESULTS_LIST_HEADER_getResultCount(x)\ + getLU2((&(x)->ResultCount),0) +#define I2O_PARAM_RESULTS_LIST_HEADER_setResultCount(x,y)\ + setLU2((&(x)->ResultCount),0,y) +#define I2O_PARAM_RESULTS_LIST_HEADER_getReserved(x)\ + getLU2((&(x)->Reserved),0) +#define I2O_PARAM_RESULTS_LIST_HEADER_setReserved(x,y)\ + setLU2((&(x)->Reserved),0,y) + +/* later + * I2O_HBA_ADAPTER_RESET_MESSAGE + */ + + +/* LATER + * I2O_SCSI_DEVICE_RESET_MESSAGE + */ + + +/* LATER + * I2O_HBA_BUS_RESET_MESSAGE + */ + + +/* + * I2O_EXEC_LCT_NOTIFY_MESSAGE + */ +/* I2O_MESSAGE_FRAME StdMessageFrame; */ +/* I2O_TRANSACTION_CONTEXT TransactionContext; */ +#define I2O_EXEC_LCT_NOTIFY_MESSAGE_getClassIdentifier(x)\ + getLU4((&(x)->ClassIdentifier),0) +#define I2O_EXEC_LCT_NOTIFY_MESSAGE_setClassIdentifier(x,y)\ + setLU4((&(x)->ClassIdentifier),0,y) +#define I2O_EXEC_LCT_NOTIFY_MESSAGE_getLastReportedChangeIndicator(x)\ + getLU4((&(x)->LastReportedChangeIndicator),0) +#define I2O_EXEC_LCT_NOTIFY_MESSAGE_setLastReportedChangeIndicator(x,y)\ + setLU4((&(x)->LastReportedChangeIndicator),0,y) +/* I2O_SG_ELEMENT SGL; */ + + + +/* + * I2O_UTIL_PARAMS_GET_MESSAGE + */ +/* I2O_MESSAGE_FRAME StdMessageFrame; */ +/* I2O_TRANSACTION_CONTEXT TransactionContext; */ +#define I2O_UTIL_PARAMS_GET_MESSAGE_getOperationFlags(x)\ + getLU4((&(x)->OperationFlags),0) +#define I2O_UTIL_PARAMS_GET_MESSAGE_setOperationFlags(x,y)\ + setLU4((&(x)->OperationFlags),0,y) +/* I2O_SG_ELEMENT SGL; */ + + +/* + * I2O_SCSI_SCB_ABORT_MESSAGE + */ +#define I2O_SCSI_SCB_ABORT_MESSAGE_getStdMessageFramePtr(x)\ + (&((x)->StdMessageFrame)) +#define I2O_SCSI_SCB_ABORT_MESSAGE_getTransactionContext(x)\ + (x)->TransactionContext +#define I2O_SCSI_SCB_ABORT_MESSAGE_setTransactionContext(x,y)\ + ((x)->TransactionContext = (y)) +#define I2O_SCSI_SCB_ABORT_MESSAGE_getTransactionContextToAbort(x)\ + (x)->TransactionContextToAbort +#define I2O_SCSI_SCB_ABORT_MESSAGE_setTransactionContextToAbort(x,y)\ + ((x)->TransactionContextToAbort = (y)) + + +/* + * I2O_DPT_DEVICE_INFO_SCALAR + */ +#define I2O_DPT_DEVICE_INFO_SCALAR_getDeviceType(x)\ + getU1((&(x)->DeviceType),0) +#define I2O_DPT_DEVICE_INFO_SCALAR_setDeviceType(x,y)\ + setU1((&(x)->DeviceType),0,y) +#define I2O_DPT_DEVICE_INFO_SCALAR_getFlags(x)\ + getU1((&(x)->Flags),0) +#define I2O_DPT_DEVICE_INFO_SCALAR_setFlags(x,y)\ + setU1((&(x)->Flags),0,y) +#define I2O_DPT_DEVICE_INFO_SCALAR_getBus(x)\ + getLU2((&(x)->Bus),0) +#define I2O_DPT_DEVICE_INFO_SCALAR_setBus(x,y)\ + setLU2((&(x)->Bus),0,y) +#define I2O_DPT_DEVICE_INFO_SCALAR_getIdentifier(x)\ + getLU4((&(x)->Identifier),0) +#define I2O_DPT_DEVICE_INFO_SCALAR_setIdentifier(x,y)\ + setLU4((&(x)->Identifier),0,y) +/* U8 LunInfo[8]; // SCSI-2 8-bit scalar LUN goes into offset 1 */ +#define I2O_DPT_DEVICE_INFO_SCALAR_getLunInfo(x)\ + getU1((&(x)->LunInfo[0]),1) +#define I2O_DPT_DEVICE_INFO_SCALAR_setLunInfo(x,y)\ + setU1((&(x)->LunInfo[0]),1,y) + +/* + * I2O_DPT_EXEC_IOP_BUFFERS_SCALAR + */ +#define I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputOffset(x)\ + getLU4((&(x)->SerialOutputOffset),0) +#define I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialOutputSizet(x)\ + getLU4((&(x)->SerialOutputSize),0) +#define I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialHeaderSize(x)\ + getLU4((&(x)->SerialHeaderSize),0) +#define I2O_DPT_EXEC_IOP_BUFFERS_SCALAR_getSerialFlagsSupported(x)\ + getLU4((&(x)->SerialFlagsSupported),0) + +/* + * I2O_PRIVATE_MESSAGE_FRAME + */ +/* typedef struct _I2O_PRIVATE_MESSAGE_FRAME { */ +/* I2O_MESSAGE_FRAME StdMessageFrame; */ +/* I2O_TRANSACTION_CONTEXT TransactionContext; */ +/* U16 XFunctionCode; */ +/* U16 OrganizationID; */ +/* PrivatePayload[]; */ +/* } I2O_PRIVATE_MESSAGE_FRAME, *PI2O_PRIVATE_MESSAGE_FRAME; */ +#define I2O_PRIVATE_MESSAGE_FRAME_getTransactionContext(x) \ + (x)->TransactionContext +#define I2O_PRIVATE_MESSAGE_FRAME_setTransactionContext(x,y) \ + ((x)->TransactionContext = (y)) +#define I2O_PRIVATE_MESSAGE_FRAME_getXFunctionCode(x) \ + getLU2((&(x)->XFunctionCode),0) +#define I2O_PRIVATE_MESSAGE_FRAME_setXFunctionCode(x,y) \ + setLU2((&(x)->XFunctionCode),0,y) +#define I2O_PRIVATE_MESSAGE_FRAME_getOrganizationID(x) \ + getLU2((&(x)->OrganizationID),0) +#define I2O_PRIVATE_MESSAGE_FRAME_setOrganizationID(x,y) \ + setLU2((&(x)->OrganizationID),0,y) +/* typedef struct _PRIVATE_SCSI_SCB_EXECUTE_MESSAGE { + * I2O_PRIVATE_MESSAGE_FRAME PRIVATE_SCSI_SCB_EXECUTE_MESSAGE; + * BF TID:16; // Upper four bits currently are zero + * // Command is interpreted by the host + * BF Interpret:1; + * // if TRUE, deal with Physical Firmware Array information + * BF Physical:1; + * BF Reserved1:14; + * U8 CDBLength; + * U8 Reserved; + * I2O_SCB_FLAGS SCBFlags; + * U8 CDB[ I2O_SCSI_CDB_LENGTH=16 ]; + * U32 ByteCount; + * I2O_SG_ELEMENT SGL; + * } PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, * PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE; + */ +/* + * PRIVATE_SCSI_SCB_EXECUTE_MESSAGE + */ +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getPRIVATE_SCSI_SCB_EXECUTE_MESSAGEPtr(x)\ + (&((x)->PRIVATE_SCSI_SCB_EXECUTE_MESSAGE)) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getCDBLength(x)\ + getU1((&(x)->CDBLength),0) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(x,y)\ + setU1((&(x)->CDBLength),0,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getReserved(x)\ + getU1((&(x)->Reserved),0) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setReserved(x,y)\ + setU1((&(x)->Reserved),0,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getSCBFlags(x)\ + getLU2((&(x)->SCBFlags),0) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags(x,y)\ + setLU2((&(x)->SCBFlags),0,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getByteCount(x)\ + getLU4((&((x)->ByteCount)),0) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(x,y)\ + setLU4((&((x)->ByteCount)),0,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getTID(x)\ + _F_get16bit(x,TID,0,TID) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setTID(x,y)\ + _F_set16bit(x,TID,0,TID,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getInterpret(x)\ + _F_get1bit(x,TID,2,Interpret) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setInterpret(x,y)\ + _F_set1bit(x,TID,2,Interpret,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getPhysical(x)\ + _F_get1bit1(x,TID,2,Physical) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_setPhysical(x,y)\ + _F_set1bit1(x,TID,2,Physical,y) +#define PRIVATE_SCSI_SCB_EXECUTE_MESSAGE_getCDBPtr(x)\ + (&((x)->CDB[0])) + + +/* + * PRIVATE_FLASH_REGION_MESSAGE + */ +#define PRIVATE_FLASH_REGION_MESSAGE_getFlashRegion(x) \ + getLU4((&((x)->FlashRegion)),0) +#define PRIVATE_FLASH_REGION_MESSAGE_setFlashRegion(x,y) \ + setLU4((&((x)->FlashRegion)),0,y) +#define PRIVATE_FLASH_REGION_MESSAGE_getRegionOffset(x) \ + getLU4((&((x)->RegionOffset)),0) +#define PRIVATE_FLASH_REGION_MESSAGE_setRegionOffset(x,y) \ + setLU4((&((x)->RegionOffset)),0,y) +#define PRIVATE_FLASH_REGION_MESSAGE_getByteCount(x) \ + getLU4((&((x)->ByteCount)),0) +#define PRIVATE_FLASH_REGION_MESSAGE_setByteCount(x,y) \ + setLU4((&((x)->ByteCount)),0,y) + +/* + * I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR + */ +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getSCSIType(x)\ + getU1((&(x)->SCSIType),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setSCSIType(x,y)\ + setU1((&(x)->SCSIType),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getProtectionManagement(x)\ + getU1((&(x)->ProtectionManagement),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setProtectionManagement(x,y)\ + setU1((&(x)->ProtectionManagement),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getSettings(x)\ + getU1((&(x)->Settings),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setSettings(x,y)\ + setU1((&(x)->Settings),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getReserved1(x)\ + getU1((&(x)->Reserved1),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setReserved1(x,y)\ + setU1((&(x)->Reserved1),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getInitiatorID(x)\ + getLU4((&(x)->InitiatorID),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setInitiatorID(x,y)\ + setLU4((&(x)->InitiatorID),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getScanLun0Only(x)\ + getLU4((&(x)->ScanLun0Only),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setScanLun0Only(x,y)\ + setLU4((&(x)->ScanLun0Only),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getDisableDevice(x)\ + getLU2((&(x)->DisableDevice),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setDisableDevice(x,y)\ + setLU2((&(x)->DisableDevice),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getMaxOffset(x)\ + getU1((&(x)->MaxOffset),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setMaxOffset(x,y)\ + setU1((&(x)->MaxOffset),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getMaxDataWidth(x)\ + getU1((&(x)->MaxDataWidth),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setMaxDataWidth(x,y)\ + setU1((&(x)->MaxDataWidth),0,y) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_getMaxSyncRate(x)\ + getLU4((&(x)->MaxSyncRate),0) +#define I2O_HBA_SCSI_CONTROLLER_INFO_SCALAR_setMaxSyncRate(x,y)\ + setLU4((&(x)->MaxSyncRate),0,y) + +/* + * I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME + */ +#define I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getStdReplyFramePtr(x)\ + (&((x)->StdReplyFrame)) +#define I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getTransferCount(x)\ + getLU4((&(x)->TransferCount),0) +#define I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setTransferCount(x,y)\ + setLU4((&(x)->TransferCount),0,y) +#define I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_getAutoSenseTransferCount(x)\ + getLU4((&(x)->AutoSenseTransferCount),0) +#define I2O_SCSI_ERROR_REPLY_MESSAGE_FRAME_setAutoSenseTransferCount(x,y)\ + setLU4((&(x)->AutoSenseTransferCount),0,y) + +/* + * I2O_SINGLE_REPLY_MESSAGE_FRAME + */ +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_getStdMessageFramePtr(x)\ + (&((x)->StdMessageFrame)) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_getTransactionContext(x)\ + (x)->TransactionContext +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_setTransactionContext(x,y)\ + ((x)->TransactionContext = (y)) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_getDetailedStatusCode(x)\ + getLU2((&((x)->DetailedStatusCode)),0) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_setDetailedStatusCode(x,y)\ + setLU2((&((x)->DetailedStatusCode)),0,y) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_getreserved(x)\ + getU1((&((x)->reserved)),0) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_setreserved(x,y)\ + setU1((&((x)->reserved)),0,y) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_getReqStatus(x)\ + getU1((&((x)->ReqStatus)),0) +#define I2O_SINGLE_REPLY_MESSAGE_FRAME_setReqStatus(x,y)\ + setU1((&((x)->ReqStatus)),0,y) + + +/* + * I2O_SCSI_SCB_EXECUTE_MESSAGE + */ +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_getStdMessageFramePtr(x)\ + (&((x)->StdMessageFrame)) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_getTransactionContext(x)\ + (x)->TransactionContext +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_setTransactionContext(x,y)\ + ((x)->TransactionContext = (y)) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_getCDBLength(x)\ + getU1((&((x)->CDBLength)),0) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_setCDBLength(x,y)\ + setU1((&((x)->CDBLength)),0,y) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_getReserved(x)\ + getU1((&((x)->Reserved)),0) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_setReserved(x,y)\ + setU1((&((x)->Reserved)),0,y) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_getSCBFlags(x)\ + getLU2((&((x)->SCBFlags)),0) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_setSCBFlags(x,y)\ + setLU2((&((x)->SCBFlags)),0,y) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_getByteCount(x)\ + getLU2((&((x)->ByteCount)),0) +#define I2O_SCSI_SCB_EXECUTE_MESSAGE_setByteCount(x,y)\ + setLU2((&((x)->ByteCount)),0,y) +/* define for these */ +/* U8 CDB[16]; */ +/* I2O_SG_ELEMENT SGL; */ + + +/* + * I2O_FAILURE_REPLY_MESSAGE_FRAME + */ +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getStdMessageFramePtr(x)\ + (&((x)->StdMessageFrame)) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getTransactionContext(x)\ + (x)->TransactionContext +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setTransactionContext(x,y)\ + ((x)->TransactionContext = (y)) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getLowestVersion(x)\ + getU1((&((x)->LowestVersion)),0) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setLowestVersion(x,y)\ + setU1((&((x)->LowestVersion)),0,y) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getHighestVersion(x)\ + getU1((&((x)->HighestVersion)),0) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setHighestVersion(x,y)\ + setU1((&((x)->HighestVersion)),0,y) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getAgeLimit(x)\ + getLU4((&((x)->AgeLimit)),0) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setAgeLimit(x,y)\ + setLU4((&((x)->AgeLimit)),0,y) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getSeverity(x)\ + _F_get8bit(x,Severity,0,Severity) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setSeverity(x,y)\ + _F_set8bit(x,Severity,0,Severity,y) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getFailureCode(x)\ + _F_get8bit(x,Severity,1,FailureCode) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setFailureCode(x,y)\ + _F_get8bit(x,Severity,1,FailureCode,y) +/* + * #define I2O_FAILURE_REPLY_MESSAGE_FRAME_getFailingHostUnitID(x)\ + * _F_get16bit(x,reserved,1,FailingHostUnitID) + * #define I2O_FAILURE_REPLY_MESSAGE_FRAME_setFailingHostUnitID(x,y)\ + * _F_set16bit(x,reserved,1,FailingHostUnitID,y) + */ +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_getPreservedMFA(x)\ + getLU4((&((x)->PreservedMFA)),0) +#define I2O_FAILURE_REPLY_MESSAGE_FRAME_setPreservedMFA(x,y)\ + setLU4((&((x)->PreservedMFA)),0,y) + + + +/* + * I2O_EXEC_STATUS_GET_REPLY + */ +#define I2O_EXEC_STATUS_GET_REPLY_getOrganizationID(x)\ + getLU2((&(x)->OrganizationID),0) +#define I2O_EXEC_STATUS_GET_REPLY_setOrganizationID(x,y)\ + setLU2((&(x)->OrganizationID),0,y) +/* #define I2O_EXEC_STATUS_GET_REPLY_getreserved; */ +#define I2O_EXEC_STATUS_GET_REPLY_getIOP_ID(x)\ + _F_get12bit(x,IOP_ID,0,IOP_ID) +#define I2O_EXEC_STATUS_GET_REPLY_setIOP_ID(x,y)\ + _F_set12bit(x,IOP_ID,0,IOP_ID,y) +/* #define I2O_EXEC_STATUS_GET_REPLY_getreserved1(x) */ +#define I2O_EXEC_STATUS_GET_REPLY_getHostUnitID(x)\ + _F_get16bit(x,IOP_ID,2,HostUnitID) +#define I2O_EXEC_STATUS_GET_REPLY_setHostUnitID(x,y)\ + _F_set16bit(x,IOP_ID,2,HostUnitID,y) +#define I2O_EXEC_STATUS_GET_REPLY_getSegmentNumber(x)\ + _F_get12bit(x,SegmentNumber,0,SegmentNumber) +#define I2O_EXEC_STATUS_GET_REPLY_setSegmentNumber(x,y)\ + _F_set12bit(x,SegmentNumber,0,SegmentNumber,y) +#define I2O_EXEC_STATUS_GET_REPLY_getI2oVersion(x)\ + _F_get4bit4(x,SegmentNumber,1,I2oVersion) +#define I2O_EXEC_STATUS_GET_REPLY_setI2oVersion(x,y)\ + _F_set4bit4(x,SegmentNumber,1,I2oVersion,y) +#define I2O_EXEC_STATUS_GET_REPLY_getIopState(x)\ + _F_get8bit(x,SegmentNumver,2,IopState) +#define I2O_EXEC_STATUS_GET_REPLY_setIopState(x,y)\ + _F_set8bit(x,SegmentNumver,2,IopState,y) +#define I2O_EXEC_STATUS_GET_REPLY_getMessengerType(x)\ + _F_get8bit(x,SegmentNumber,3,MessengerType) +#define I2O_EXEC_STATUS_GET_REPLY_setMessengerType(x,y)\ + _F_get8bit(x,SegmentNumber,3,MessengerType,y) +#define I2O_EXEC_STATUS_GET_REPLY_getInboundMFrameSize(x)\ + getLU2((&(x)->InboundMFrameSize),0) +#define I2O_EXEC_STATUS_GET_REPLY_setInboundMFrameSize(x,y)\ + setLU2((&(x)->InboundMFrameSize),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getInitCode(x)\ + getU1((&(x)->InitCode),0) +#define I2O_EXEC_STATUS_GET_REPLY_setInitCode(x,y)\ + setU1((&(x)->InitCode),0,y) +/* #define I2O_EXEC_STATUS_GET_REPLY_getreserved2(x) */ +#define I2O_EXEC_STATUS_GET_REPLY_getMaxInboundMFrames(x)\ + getLU4((&(x)->MaxInboundMFrames),0) +#define I2O_EXEC_STATUS_GET_REPLY_setMaxInboundMFrames(x,y)\ + setLU4((&(x)->MaxInboundMFrames),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getCurrentInboundMFrames(x)\ + getLU4((&(x)->CurrentInboundMFrames),0) +#define I2O_EXEC_STATUS_GET_REPLY_setCurrentInboundMFrames(x,y)\ + setLU4((&(x)->CurrentInboundMFrames),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getMaxOutboundMFrames(x)\ + getLU4((&(x)->MaxOutboundMFrames),0) +#define I2O_EXEC_STATUS_GET_REPLY_setMaxOutboundMFrames(x,y)\ + setLU4((&(x)->MaxOutboundMFrames),0,y) +/* #define I2O_EXEC_STATUS_GET_REPLY_getProductIDString(x) */ +#define I2O_EXEC_STATUS_GET_REPLY_getExpectedLCTSize(x)\ + getLU4((&(x)->ExpectedLCTSize),0) +#define I2O_EXEC_STATUS_GET_REPLY_setExpectedLCTSize(x,y)\ + setLU4((&(x)->ExpectedLCTSize),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getIopCapabilities(x)\ + getLU4((&(x)->IopCapabilities),0) +#define I2O_EXEC_STATUS_GET_REPLY_setIopCapabilities(x,y)\ + setLU4((&(x)->IopCapabilities),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getDesiredPrivateMemSize(x)\ + getLU4((&(x)->DesiredPrivateMemSize),0) +#define I2O_EXEC_STATUS_GET_REPLY_setDesiredPrivateMemSize(x,y)\ + setLU4((&(x)->DesiredPrivateMemSize),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getCurrentPrivateMemSize(x)\ + getLU4((&(x)->CurrentPrivateMemSize),0) +#define I2O_EXEC_STATUS_GET_REPLY_setCurrentPrivateMemSize(x,y)\ + setLU4((&(x)->CurrentPrivateMemSize),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getCurrentPrivateMemBase(x)\ + getLU4((&(x)->CurrentPrivateMemBase),0) +#define I2O_EXEC_STATUS_GET_REPLY_setCurrentPrivateMemBase(x,y)\ + setLU4((&(x)->CurrentPrivateMemBase),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getDesiredPrivateIOSize(x)\ + getLU4((&(x)->DesiredPrivateIOSize),0) +#define I2O_EXEC_STATUS_GET_REPLY_setDesiredPrivateIOSize(x,y)\ + setLU4((&(x)->DesiredPrivateIOSize),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getCurrentPrivateIOSize(x)\ + getLU4((&(x)->CurrentPrivateIOSize),0) +#define I2O_EXEC_STATUS_GET_REPLY_setCurrentPrivateIOSize(x,y)\ + setLU4((&(x)->CurrentPrivateIOSize),0,y) +#define I2O_EXEC_STATUS_GET_REPLY_getCurrentPrivateIOBase(x)\ + getLU4((&(x)->CurrentPrivateIOBase),0) +#define I2O_EXEC_STATUS_GET_REPLY_setCurrentPrivateIOBase(x,y)\ + setLU4((&(x)->CurrentPrivateIOBase),0,y) +/* #define I2O_EXEC_STATUS_GET_REPLY_getreserved3(x) */ +#define I2O_EXEC_STATUS_GET_REPLY_getSyncByte(x)\ + getU1((&(x)->SyncByte),0) +#define I2O_EXEC_STATUS_GET_REPLY_setSyncByte(x,y)\ + setU1((&(x)->SyncByte),0,y) + + + +/* + * I2O_HBA_BUS_QUIESCE_MESSAGE + */ +#define I2O_HBA_BUS_QUIESCE_MESSAGE_getStdMessageFramePtr(x)\ + (&((x)->StdMessageFrame)) +#define I2O_HBA_BUS_QUIESCE_MESSAGE_getTransactionContext(x)\ + getBU4((&((x)->TransactionContext)),0) +#define I2O_HBA_BUS_QUIESCE_MESSAGE_setTransactionContext(x,y)\ + setBU4((&((x)->TransactionContext)),0,y) +#define I2O_HBA_BUS_QUIESCE_MESSAGE_getFlags(x)\ + getLU4((&(x)->Flags),0) +#define I2O_HBA_BUS_QUIESCE_MESSAGE_setFlags(x,y)\ + setLU4((&(x)->Flags),0,y) + + +#endif /* __INCi2odeph */ diff --git a/sys/dev/asr/i2odpt.h b/sys/dev/asr/i2odpt.h new file mode 100644 index 0000000..0add374 --- /dev/null +++ b/sys/dev/asr/i2odpt.h @@ -0,0 +1,195 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + ****************************************************************/ + +#if !defined(I2O_DPT_HDR) +#define I2O_DPT_HDR + +#define DPT_ORGANIZATION_ID 0x1B /* For Private Messages */ + +/* + * PrivateMessageFrame.StdMessageFrame.Function = I2O_PRIVATE_MESSAGE + * PrivateMessageFrame.XFunctionCode = I2O_SCSI_SCB_EXEC + */ + +typedef struct _PRIVATE_SCSI_SCB_EXECUTE_MESSAGE { + I2O_PRIVATE_MESSAGE_FRAME PrivateMessageFrame; +# if (defined(sparc) || defined(_DPT_BIG_ENDIAN)) + U32 TID; /* Upper four bits currently are zero */ +# else + BF TID:16; /* Upper four bits currently are zero */ + /* Command is interpreted by the host */ + BF Interpret:1; + /* if TRUE, deal with Physical Firmware Array information */ + BF Physical:1; + BF Reserved1:14; +# endif + U8 CDBLength; + U8 Reserved; + I2O_SCB_FLAGS SCBFlags; + U8 CDB[ I2O_SCSI_CDB_LENGTH ]; + U32 ByteCount; + I2O_SG_ELEMENT SGL; +} PRIVATE_SCSI_SCB_EXECUTE_MESSAGE, * PPRIVATE_SCSI_SCB_EXECUTE_MESSAGE; + +/* + * Flash access and programming messages + * PrivateMessageFrame.StdMessageFrame.Function = I2O_PRIVATE_MESSAGE + * PrivateMessageFrame.XFunctionCode = PRIVATE_FLAGS_REGION_* + * + * SIZE returns the total size of a region of flash + * READ copies a region (or portion thereof) into the buffer specified + * by the SGL + * WRITE writes a region (or portion thereof) using the data specified + * by the SGL + * + * Flash regions + * + * 0 operational-mode firmware + * 1 software (bios/utility) + * 2 oem nvram defaults + * 3 hba serial number + * 4 boot-mode firmware + * + * Any combination of RegionOffset and ByteCount can be specified providing + * they fit within the size of the specified region. + * + * Flash messages should be targeted to the Executive TID 0x000 + */ + +#define PRIVATE_FLASH_REGION_SIZE 0x0100 +#define PRIVATE_FLASH_REGION_READ 0x0101 +#define PRIVATE_FLASH_REGION_WRITE 0x0102 +#define PRIVATE_FLASH_REGION_CRC 0x0103 + +typedef struct _PRIVATE_FLASH_REGION_MESSAGE { + I2O_PRIVATE_MESSAGE_FRAME PrivateMessageFrame; + U32 FlashRegion; + U32 RegionOffset; + U32 ByteCount; + I2O_SG_ELEMENT SGL; +} PRIVATE_FLASH_REGION_MESSAGE, * PPRIVATE_FLASH_REGION_MESSAGE; + +/* DPT Driver Printf message */ + +#define PRIVATE_DRIVER_PRINTF 0x0200 + +/* FwPrintFlags */ +#define FW_FIRMWARE_FLAGS_NO_HEADER_B 0x00000001 /* Remove date header */ + +typedef struct _PRIVATE_DRIVER_PRINTF_MESSAGE { + + I2O_PRIVATE_MESSAGE_FRAME PrivateMessageFrame; + + /* total bytes in PrintBuffer, including header */ + U32 PrintBufferByteCount; + /* exact data to be copied into the serial PrintBuffer */ + U8 PrintBuffer[1]; + +} PRIVATE_DRIVER_PRINTF_MESSAGE, * PPRIVATE_DRIVER_PRINTF_MESSAGE; + +/* DPT Enable Diagnostics message 0x0201 */ + +#define PRIVATE_DIAG_ENABLE 0x0201 + +typedef struct _PRIVATE_DIAG_ENABLE_MESSAGE { + I2O_PRIVATE_MESSAGE_FRAME PrivateMessageFrame; +} PRIVATE_DIAG_MESSAGE_FRAME, * PPRIVATE_DIAG_MESSAGE_FRAME; + +/* DPT Driver Get/Put message */ + +#define PRIVATE_DRIVER_GET 0x300 +#define PRIVATE_DRIVER_PUT 0x301 + +typedef struct _PRIVATE_DRIVER_GETPUT_MESSAGE +{ + I2O_PRIVATE_MESSAGE_FRAME PrivateMessageFrame; + U32 Offset; + U32 ByteCount; + I2O_SG_ELEMENT SGL; +} PRIVATE_DRIVER_GETPUT_MESSAGE, * PPRIVATE_DRIVER_GETPUT_MESSAGE; + +/****************************************************************************/ + +/* DPT Peripheral Device Parameter Groups */ + +/****************************************************************************/ + +/* DPT Configuration and Operating Structures and Defines */ + +#define I2O_DPT_DEVICE_INFO_GROUP_NO 0x8000 + +/* - 8000h - DPT Device Information Parameters Group defines */ + +/* Device Type */ + +#define I2O_DPT_DEVICE_TYPE_DIRECT I2O_SCSI_DEVICE_TYPE_DIRECT +#define I2O_DPT_DEVICE_TYPE_SEQUENTIAL I2O_SCSI_DEVICE_TYPE_SEQUENTIAL +#define I2O_DPT_DEVICE_TYPE_PRINTER I2O_SCSI_DEVICE_TYPE_PRINTER +#define I2O_DPT_DEVICE_TYPE_PROCESSOR I2O_SCSI_DEVICE_TYPE_PROCESSOR +#define I2O_DPT_DEVICE_TYPE_WORM I2O_SCSI_DEVICE_TYPE_WORM +#define I2O_DPT_DEVICE_TYPE_CDROM I2O_SCSI_DEVICE_TYPE_CDROM +#define I2O_DPT_DEVICE_TYPE_SCANNER I2O_SCSI_DEVICE_TYPE_SCANNER +#define I2O_DPT_DEVICE_TYPE_OPTICAL I2O_SCSI_DEVICE_TYPE_OPTICAL +#define I2O_DPT_DEVICE_TYPE_MEDIA_CHANGER I2O_SCSI_DEVICE_TYPE_MEDIA_CHANGER +#define I2O_DPT_DEVICE_TYPE_COMM I2O_SCSI_DEVICE_TYPE_COMM +#define I2O_DPT_DEVICE_GRAPHICS_1 I2O_SCSI_DEVICE_GRAPHICS_1 +#define I2O_DPT_DEVICE_GRAPHICS_2 I2O_SCSI_DEVICE_GRAPHICS_2 +#define I2O_DPT_DEVICE_TYPE_ARRAY_CONT I2O_SCSI_DEVICE_TYPE_ARRAY_CONT +#define I2O_DPT_DEVICE_TYPE_UNKNOWN I2O_SCSI_DEVICE_TYPE_UNKNOWN + +/* Flags */ + +#define I2O_DPT_PERIPHERAL_TYPE_FLAG I2O_SCSI_PERIPHERAL_TYPE_FLAG +#define I2O_DPT_PERIPHERAL_TYPE_PARALLEL I2O_SCSI_PERIPHERAL_TYPE_PARALLEL +#define I2O_DPT_PERIPHERAL_TYPE_SERIAL I2O_SCSI_PERIPHERAL_TYPE_SERIAL + +#define I2O_DPT_RESERVED_FLAG I2O_SCSI_RESERVED_FLAG + +#define I2O_DPT_DISCONNECT_FLAG I2O_SCSI_DISCONNECT_FLAG +#define I2O_DPT_DISABLE_DISCONNECT I2O_SCSI_DISABLE_DISCONNECT +#define I2O_DPT_ENABLE_DISCONNECT I2O_SCSI_ENABLE_DISCONNECT + +#define I2O_DPT_MODE_MASK I2O_SCSI_MODE_MASK +#define I2O_DPT_MODE_SET_DATA I2O_SCSI_MODE_SET_DATA +#define I2O_DPT_MODE_SET_DEFAULT I2O_SCSI_MODE_SET_DEFAULT +#define I2O_DPT_MODE_SET_SAFEST I2O_SCSI_MODE_SET_SAFEST + +#define I2O_DPT_DATA_WIDTH_MASK I2O_SCSI_DATA_WIDTH_MASK +#define I2O_DPT_DATA_WIDTH_8 I2O_SCSI_DATA_WIDTH_8 +#define I2O_DPT_DATA_WIDTH_16 I2O_SCSI_DATA_WIDTH_16 +#define I2O_DPT_DATA_WIDTH_32 I2O_SCSI_DATA_WIDTH_32 + +#define I2O_DPT_SYNC_NEGOTIATION_FLAG I2O_SCSI_SYNC_NEGOTIATION_FLAG +#define I2O_DPT_DISABLE_SYNC_NEGOTIATION I2O_SCSI_DISABLE_SYNC_NEGOTIATION +#define I2O_DPT_ENABLE_SYNC_NEGOTIATION I2O_SCSI_ENABLE_SYNC_NEGOTIATION + +/* DPT Device Group 8000h - Device Information Parameter Group */ + +typedef struct _I2O_DPT_DEVICE_INFO_SCALAR { + U8 DeviceType; /* Identical to I2O_SCSI_DEVICE_INFO SCALAR */ + U8 Flags; /* Identical to I2O_SCSI_DEVICE_INFO SCALAR */ + U16 Bus; + U32 Identifier; + U8 LunInfo[8]; /* SCSI-2 8-bit scalar LUN goes into offset 1 */ + +} I2O_DPT_DEVICE_INFO_SCALAR, *PI2O_DPT_DEVICE_INFO_SCALAR; + +#define I2O_DPT_EXEC_IOP_BUFFERS_GROUP_NO 0x8000 + +/* DPT Exec Iop Buffers Group 8000h */ + +typedef struct _I2O_DPT_EXEC_IOP_BUFFERS_SCALAR { + U32 SerialOutputOffset; /* offset from base address to header */ + U32 SerialOutputSize; /* size of data buffer in bytes */ + U32 SerialHeaderSize; /* size of data buffer header in bytes */ + U32 SerialFlagsSupported; /* Mask of debug flags supported */ + +} I2O_DPT_EXEC_IOP_BUFFERS_SCALAR, *PI2O_DPT_EXEC_IOP_BUFFERS_SCALAR; + + +#endif /* I2O_DPT_HDR */ diff --git a/sys/dev/asr/i2oexec.h b/sys/dev/asr/i2oexec.h new file mode 100644 index 0000000..eb04135 --- /dev/null +++ b/sys/dev/asr/i2oexec.h @@ -0,0 +1,1265 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved. + * All rights reserved + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This header file, and any modifications of this header file, are provided + * contingent upon your agreement and adherence to the here-listed terms and + * conditions. By accepting and/or using this header file, you agree to abide + * by these terms and conditions and that these terms and conditions will be + * construed and governed in accordance with the laws of the State of California, + * without reference to conflict-of-law provisions. If you do not agree + * to these terms and conditions, please delete this file, and any copies, + * permanently, without making any use thereof. + * + * THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT + * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE + * USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR + * ERROR-FREE. + * + * I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF + * ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O + * SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH + * IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS. + * + * THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY + * ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA + * OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM. + * + * I2O SIG grants the user of this header file a license to copy, distribute, + * and modify it, for any purpose, under the following terms. Any copying, + * distribution, or modification of this header file must not delete or alter + * the copyright notice of I2O SIG or any of these Terms and Conditions. + * + * Any distribution of this header file must not include a charge for the + * header file (unless such charges are strictly for the physical acts of + * copying or transferring copies). However, distribution of a product in + * which this header file is embedded may include a charge so long as any + * such charge does not include any charge for the header file itself. + * + * Any modification of this header file constitutes a derivative work based + * on this header file. Any distribution of such derivative work: (1) must + * include prominent notices that the header file has been changed from the + * original, together with the dates of any changes; (2) automatically includes + * this same license to the original header file from I2O SIG, without any + * restriction thereon from the distributing user; and (3) must include a + * grant of license of the modified file under the same terms and conditions + * as these Terms and Conditions. + * + * The I2O SIG Web site can be found at: http://www.i2osig.org + * + * The I2O SIG encourages you to deposit derivative works based on this + * header file at the I2O SIG Web site. Furthermore, to become a Registered + * Developer of the I2O SIG, sign up at the Web site or call 415.750.8352 + * (United States). + ****************************************************************/ + +/********************************************************************* + * I2OExec.h -- I2O Executive Class Message definition file + * + * This file contains information presented in Chapter 4 of the I2O(tm) + * Specification. + **********************************************************************/ + +#if !defined(I2O_EXECUTIVE_HDR) +#define I2O_EXECUTIVE_HDR + +#define I2OEXEC_REV 1_5_4 /* I2OExec header file revision string */ + +#if ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (!defined(KERN_VERSION)) +# include +# endif +# if (KERN_VERSION < 3) +# include "i386/pci/i2omsg.h" /* Include the Base Message file */ +# include "i386/pci/i2outil.h" +# else +# include "dev/asr/i2omsg.h" /* Include the Base Message file */ +# include "dev/asr/i2outil.h" +# endif +#else +# include "i2omsg.h" /* Include the Base Message file */ +# include "i2outil.h" +#endif + + +/* + NOTES: + + Gets, reads, receives, etc. are all even numbered functions. + Sets, writes, sends, etc. are all odd numbered functions. + Functions that both send and receive data can be either but an attempt is made + to use the function number that indicates the greater transfer amount. + Functions that do not send or receive data use odd function numbers. + + Some functions are synonyms like read, receive and send, write. + + All common functions will have a code of less than 0x80. + Unique functions to a class will start at 0x80. + Executive Functions start at 0xA0. + + Utility Message function codes range from 0 - 0x1f + Base Message function codes range from 0x20 - 0xfe + Private Message function code is 0xff. +*/ + +PRAGMA_ALIGN_PUSH +PRAGMA_PACK_PUSH + +/* I2O Executive Function Codes. */ + +#define I2O_EXEC_ADAPTER_ASSIGN 0xB3 +#define I2O_EXEC_ADAPTER_READ 0xB2 +#define I2O_EXEC_ADAPTER_RELEASE 0xB5 +#define I2O_EXEC_BIOS_INFO_SET 0xA5 +#define I2O_EXEC_BOOT_DEVICE_SET 0xA7 +#define I2O_EXEC_CONFIG_VALIDATE 0xBB +#define I2O_EXEC_CONN_SETUP 0xCA +#define I2O_EXEC_DDM_DESTROY 0xB1 +#define I2O_EXEC_DDM_ENABLE 0xD5 +#define I2O_EXEC_DDM_QUIESCE 0xC7 +#define I2O_EXEC_DDM_RESET 0xD9 +#define I2O_EXEC_DDM_SUSPEND 0xAF +#define I2O_EXEC_DEVICE_ASSIGN 0xB7 +#define I2O_EXEC_DEVICE_RELEASE 0xB9 +#define I2O_EXEC_HRT_GET 0xA8 +#define I2O_EXEC_IOP_CLEAR 0xBE +#define I2O_EXEC_IOP_CONNECT 0xC9 +#define I2O_EXEC_IOP_RESET 0xBD +#define I2O_EXEC_LCT_NOTIFY 0xA2 +#define I2O_EXEC_OUTBOUND_INIT 0xA1 +#define I2O_EXEC_PATH_ENABLE 0xD3 +#define I2O_EXEC_PATH_QUIESCE 0xC5 +#define I2O_EXEC_PATH_RESET 0xD7 +#define I2O_EXEC_STATIC_MF_CREATE 0xDD +#define I2O_EXEC_STATIC_MF_RELEASE 0xDF +#define I2O_EXEC_STATUS_GET 0xA0 +#define I2O_EXEC_SW_DOWNLOAD 0xA9 +#define I2O_EXEC_SW_UPLOAD 0xAB +#define I2O_EXEC_SW_REMOVE 0xAD +#define I2O_EXEC_SYS_ENABLE 0xD1 +#define I2O_EXEC_SYS_MODIFY 0xC1 +#define I2O_EXEC_SYS_QUIESCE 0xC3 +#define I2O_EXEC_SYS_TAB_SET 0xA3 + + +/* I2O Get Status State values */ + +#define I2O_IOP_STATE_INITIALIZING 0x01 +#define I2O_IOP_STATE_RESET 0x02 +#define I2O_IOP_STATE_HOLD 0x04 +#define I2O_IOP_STATE_READY 0x05 +#define I2O_IOP_STATE_OPERATIONAL 0x08 +#define I2O_IOP_STATE_FAILED 0x10 +#define I2O_IOP_STATE_FAULTED 0x11 + + +/* Event Indicator Assignments for the Executive Class. */ + +#define I2O_EVENT_IND_RESOURCE_LIMIT 0x00000001 +#define I2O_EVENT_IND_CONNECTION_FAIL 0x00000002 +#define I2O_EVENT_IND_ADAPTER_FAULT 0x00000004 +#define I2O_EVENT_IND_POWER_FAIL 0x00000008 +#define I2O_EVENT_IND_RESET_PENDING 0x00000010 +#define I2O_EVENT_IND_RESET_IMMINENT 0x00000020 +#define I2O_EVENT_IND_HARDWARE_FAIL 0x00000040 +#define I2O_EVENT_IND_XCT_CHANGE 0x00000080 +#define I2O_EVENT_IND_NEW_LCT_ENTRY 0x00000100 +#define I2O_EVENT_IND_MODIFIED_LCT 0x00000200 +#define I2O_EVENT_IND_DDM_AVAILABILITY 0x00000400 + +/* Resource Limit Event Data */ + +#define I2O_EVENT_RESOURCE_LIMIT_LOW_MEMORY 0x00000001 +#define I2O_EVENT_RESOURCE_LIMIT_INBOUND_POOL_LOW 0x00000002 +#define I2O_EVENT_RESOURCE_LIMIT_OUTBOUND_POOL_LOW 0x00000004 + +/* Connection Fail Event Data */ + +#define I2O_EVENT_CONNECTION_FAIL_REPOND_NORMAL 0x00000000 +#define I2O_EVENT_CONNECTION_FAIL_NOT_REPONDING 0x00000001 +#define I2O_EVENT_CONNECTION_FAIL_NO_AVAILABLE_FRAMES 0x00000002 + +/* Reset Pending Event Data */ + +#define I2O_EVENT_RESET_PENDING_POWER_LOSS 0x00000001 +#define I2O_EVENT_RESET_PENDING_CODE_VIOLATION 0x00000002 + +/* Reset Imminent Event Data */ + +#define I2O_EVENT_RESET_IMMINENT_UNKNOWN_CAUSE 0x00000000 +#define I2O_EVENT_RESET_IMMINENT_POWER_LOSS 0x00000001 +#define I2O_EVENT_RESET_IMMINENT_CODE_VIOLATION 0x00000002 +#define I2O_EVENT_RESET_IMMINENT_PARITY_ERROR 0x00000003 +#define I2O_EVENT_RESET_IMMINENT_CODE_EXCEPTION 0x00000004 +#define I2O_EVENT_RESET_IMMINENT_WATCHDOG_TIMEOUT 0x00000005 + +/* Hardware Fail Event Data */ + +#define I2O_EVENT_HARDWARE_FAIL_UNKNOWN_CAUSE 0x00000000 +#define I2O_EVENT_HARDWARE_FAIL_CPU_FAILURE 0x00000001 +#define I2O_EVENT_HARDWARE_FAIL_MEMORY_FAULT 0x00000002 +#define I2O_EVENT_HARDWARE_FAIL_DMA_FAILURE 0x00000003 +#define I2O_EVENT_HARDWARE_FAIL_IO_BUS_FAILURE 0x00000004 + +/* DDM Availability Event Data */ + +#define I2O_EVENT_DDM_AVAILIBILITY_RESPOND_NORMAL 0x00000000 +#define I2O_EVENT_DDM_AVAILIBILITY_CONGESTED 0x00000001 +#define I2O_EVENT_DDM_AVAILIBILITY_NOT_RESPONDING 0x00000002 +#define I2O_EVENT_DDM_AVAILIBILITY_PROTECTION_VIOLATION 0x00000003 +#define I2O_EVENT_DDM_AVAILIBILITY_CODE_VIOLATION 0x00000004 + +/****************************************************************************/ + +#define I2O_OPERATION_FLAG_ASSIGN_PERMANENT 0x01 + +/* ExecAdapterAssign Function Message Frame structure. */ + +typedef struct _I2O_EXEC_ADAPTER_ASSIGN_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +#if (defined(__BORLANDC__)) + U32 DdmTID; +#else + BF DdmTID:I2O_TID_SZ; + BF reserved:I2O_RESERVED_12BITS; + BF OperationFlags:I2O_8BIT_FLAGS_SZ; +#endif + I2O_HRT_ENTRY HRTEntry; +} I2O_EXEC_ADAPTER_ASSIGN_MESSAGE, *PI2O_EXEC_ADAPTER_ASSIGN_MESSAGE; + + +/****************************************************************************/ + +#define I2O_REQUEST_FLAG_CONFIG_REGISTER 0x00000000 +#define I2O_REQUEST_FLAG_IO_REGISTER 0x00000001 +#define I2O_REQUEST_FLAG_ADAPTER_MEMORY 0x00000002 + +/* ExecAdapterRead Function Message Frame structure. */ + +typedef struct _I2O_EXEC_ADAPTER_READ_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 AdapterID; + U32 RequestFlags; + U32 Offset; + U32 Length; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_ADAPTER_READ_MESSAGE, *PI2O_EXEC_ADAPTER_READ_MESSAGE; + + +/****************************************************************************/ + +#define I2O_OPERATION_FLAG_RELEASE_PERMANENT 0x01 + +/* ExecAdapterRelease Function Message Frame structure. */ + +typedef struct _I2O_EXEC_ADAPTER_RELEASE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U8 reserved[3]; + U8 OperationFlags; + I2O_HRT_ENTRY HRTEntry; +} I2O_EXEC_ADAPTER_RELEASE_MESSAGE, *PI2O_EXEC_ADAPTER_RELEASE_MESSAGE; + + +/****************************************************************************/ + +/* ExecBiosInfoSet Function Message Frame structure. */ + +typedef struct _I2O_EXEC_BIOS_INFO_SET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +#if (defined(__BORLANDC__)) + U32 DeviceTID; +#else + BF DeviceTID:I2O_TID_SZ; + BF reserved:I2O_RESERVED_12BITS; + BF BiosInfo:I2O_BIOS_INFO_SZ; +#endif +} I2O_EXEC_BIOS_INFO_SET_MESSAGE, *PI2O_EXEC_BIOS_INFO_SET_MESSAGE; + + +/****************************************************************************/ + +/* ExecBootDeviceSet Function Message Frame structure. */ + +typedef struct _I2O_EXEC_BOOT_DEVICE_SET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF BootDevice:I2O_TID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; +} I2O_EXEC_BOOT_DEVICE_SET_MESSAGE, *PI2O_EXEC_BOOT_DEVICE_SET_MESSAGE; + + +/****************************************************************************/ + +/* ExecConfigValidate Function Message Frame structure. */ + +typedef struct _I2O_EXEC_CONFIG_VALIDATE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_EXEC_CONFIG_VALIDATE_MESSAGE, *PI2O_EXEC_CONFIG_VALIDATE_MESSAGE; + + +/****************************************************************************/ + +/* ExecConnSetup Requestor */ + +typedef struct _I2O_ALIAS_CONNECT_SETUP { +#if (defined(__BORLANDC__)) + U32 IOP1AliasForTargetDevice; +#else + BF IOP1AliasForTargetDevice:I2O_TID_SZ; + BF IOP2AliasForInitiatorDevice:I2O_TID_SZ; + BF reserved:I2O_RESERVED_8BITS; +#endif +} I2O_ALIAS_CONNECT_SETUP, *PI2O_ALIAS_CONNECT_SETUP; + +#define I2O_OPERATION_FLAG_PEER_TO_PEER_BIDIRECTIONAL 0x01 + +/* ExecConnSetup Object */ + +typedef struct _I2O_OBJECT_CONNECT_SETUP { +#if (defined(__BORLANDC__)) + U32 TargetDevice; +#else + BF TargetDevice:I2O_TID_SZ; + BF InitiatorDevice:I2O_TID_SZ; + BF OperationFlags:I2O_8BIT_FLAGS_SZ; +#endif +} I2O_OBJECT_CONNECT_SETUP, *PI2O_OBJECT_CONNECT_SETUP; + + +/* ExecConnSetup Function Message Frame structure. */ + +typedef struct _I2O_EXEC_CONN_SETUP_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + I2O_OBJECT_CONNECT_SETUP ObjectInfo; + I2O_ALIAS_CONNECT_SETUP AliasInfo; + U16 IOP2InboundMFrameSize; + U16 reserved; + U32 MessageClass; +} I2O_EXEC_CONN_SETUP_MESSAGE, *PI2O_EXEC_CONN_SETUP_MESSAGE; + + +/* ExecConnSetup Object Reply */ + +typedef struct _I2O_OBJECT_CONNECT_REPLY { +#if (defined(__BORLANDC__)) + U32 TargetDevice; +#else + BF TargetDevice:I2O_TID_SZ; + BF InitiatorDevice:I2O_TID_SZ; + BF ReplyStatusCode:I2O_8BIT_FLAGS_SZ; +#endif +} I2O_OBJECT_CONNECT_REPLY, *PI2O_OBJECT_CONNECT_REPLY; + + +/* ExecConnSetup reply structure. */ + +typedef struct _I2O_EXEC_CONN_SETUP_REPLY { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + I2O_OBJECT_CONNECT_REPLY ObjectInfo; + I2O_ALIAS_CONNECT_SETUP AliasInfo; + U16 IOP2InboundMFrameSize; + U16 reserved; +} I2O_EXEC_CONN_SETUP_REPLY, *PI2O_EXEC_CONN_SETUP_REPLY; + + +/****************************************************************************/ + +/* ExecDdmDestroy Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DDM_DESTROY_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF DdmTID:I2O_TID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; +} I2O_EXEC_DDM_DESTROY_MESSAGE, *PI2O_EXEC_DDM_DESTROY_MESSAGE; + + +/****************************************************************************/ + +/* ExecDdmEnable Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DDM_ENABLE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF DeviceTID:I2O_TID_SZ; + BF reserved2:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_DDM_ENABLE_MESSAGE, *PI2O_EXEC_DDM_ENABLE_MESSAGE; + + +/****************************************************************************/ + +/* ExecDdmQuiesce Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DDM_QUIESCE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF DeviceTID:I2O_TID_SZ; + BF reserved2:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_DDM_QUIESCE_MESSAGE, *PI2O_EXEC_DDM_QUIESCE_MESSAGE; + + +/****************************************************************************/ + +/* ExecDdmReset Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DDM_RESET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF DeviceTID:I2O_TID_SZ; + BF reserved2:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_DDM_RESET_MESSAGE, *PI2O_EXEC_DDM_RESET_MESSAGE; + + +/****************************************************************************/ + +/* ExecDdmSuspend Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DDM_SUSPEND_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF DdmTID:I2O_TID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; +} I2O_EXEC_DDM_SUSPEND_MESSAGE, *PI2O_EXEC_DDM_SUSPEND_MESSAGE; + + +/****************************************************************************/ + +#define I2O_OPERATION_FLAG_ASSIGN_PERMANENT 0x01 + +/* ExecDeviceAssign Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DEVICE_ASSIGN_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +#if (defined(__BORLANDC__)) + U32 DeviceTID; +#else + BF DeviceTID:I2O_TID_SZ; + BF DdmTID:I2O_TID_SZ; + BF OperationFlags:I2O_8BIT_FLAGS_SZ; +#endif + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_DEVICE_ASSIGN_MESSAGE, *PI2O_EXEC_DEVICE_ASSIGN_MESSAGE; + + +/****************************************************************************/ + +#define I2O_OPERATION_FLAG_RELEASE_PERMANENT 0x01 + +/* ExecDeviceRelease Function Message Frame structure. */ + +typedef struct _I2O_EXEC_DEVICE_RELEASE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +#if (defined(__BORLANDC__)) + U32 DeviceTID; +#else + BF DeviceTID:I2O_TID_SZ; + BF DdmTID:I2O_TID_SZ; + BF OperationFlags:I2O_8BIT_FLAGS_SZ; +#endif + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_DEVICE_RELEASE_MESSAGE, *PI2O_EXEC_DEVICE_RELEASE_MESSAGE; + + +/****************************************************************************/ + +/* HRT Entry Structure defined in I2OMSG.H */ + +/* ExecHrtGet Function Message Frame structure. */ + +typedef struct _I2O_EXEC_HRT_GET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_HRT_GET_MESSAGE, *PI2O_EXEC_HRT_GET_MESSAGE; + + +/****************************************************************************/ + + +/* ExecIopClear Function Message Frame structure. */ + +typedef struct _I2O_EXEC_IOP_CLEAR_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_EXEC_IOP_CLEAR_MESSAGE, *PI2O_EXEC_IOP_CLEAR_MESSAGE; + + +/****************************************************************************/ + + +/* ExecIopConnect Function Message Frame structure. */ + +typedef struct _I2O_EXEC_IOP_CONNECT_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF reserved:I2O_RESERVED_16BITS; + BF reserved3:I2O_RESERVED_8BITS; + BF IOP1MsgerType:I2O_MESSENGER_TYPE_SZ; + U16 IOP1InboundMFrameSize; + BF IOP1AliasForIOP2:I2O_TID_SZ; + U8 reserved1; + BF IOP_ID1:I2O_IOP_ID_SZ; + BF reserved2:I2O_RESERVED_4BITS; + BF HostUnitID1:I2O_UNIT_ID_SZ; +} I2O_EXEC_IOP_CONNECT_MESSAGE, *PI2O_EXEC_IOP_CONNECT_MESSAGE; + + + /* ExecIopConnect reply structure */ + +typedef struct _I2O_EXEC_IOP_CONNECT_IOP_REPLY { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 DetailedStatusCode; + U8 reserved; + U8 ReqStatus; + U16 IOP2InboundMFrameSize; + BF IOP2AliasForIOP1:I2O_TID_SZ; + U8 reserved1; + BF IOP_ID2:I2O_IOP_ID_SZ; + BF reserved2:I2O_RESERVED_4BITS; + BF HostUnitID2:I2O_UNIT_ID_SZ; +} I2O_EXEC_IOP_CONNECT_REPLY, *PI2O_EXEC_IOP_CONNECT_REPLY; + + +/****************************************************************************/ + + +#define I2O_EXEC_IOP_RESET_RESERVED_SZ 16 + +#define I2O_EXEC_IOP_RESET_IN_PROGRESS 0x01 +#define I2O_EXEC_IOP_RESET_REJECTED 0x02 + +#define I2O_EXEC_IOP_RESET_STATUS_RESERVED_SZ 3 + +typedef struct _I2O_EXEC_IOP_RESET_STATUS { +# if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 ResetStatus; +# else + U8 ResetStatus; + U8 reserved[I2O_EXEC_IOP_RESET_STATUS_RESERVED_SZ]; +# endif +} I2O_EXEC_IOP_RESET_STATUS, *PI2O_EXEC_IOP_RESET_STATUS; + + +/* ExecIopReset Function Message Frame structure. */ + +typedef struct _I2O_EXEC_IOP_RESET_MESSAGE { + U8 VersionOffset; + U8 MsgFlags; + U16 MessageSize; +#if (defined(__BORLANDC__) || defined(sparc)) + U32 TargetAddress; +#else + BF TargetAddress:I2O_TID_SZ; + BF InitiatorAddress:I2O_TID_SZ; + BF Function:I2O_FUNCTION_SZ; +#endif + U8 Reserved[I2O_EXEC_IOP_RESET_RESERVED_SZ]; + U32 StatusWordLowAddress; + U32 StatusWordHighAddress; +} I2O_EXEC_IOP_RESET_MESSAGE, *PI2O_EXEC_IOP_RESET_MESSAGE; + + +/****************************************************************************/ + +/* LCT Entry Structure defined in I2OMSG.H */ + +/* ExecLCTNotify Function Message Frame structure. */ + +typedef struct _I2O_EXEC_LCT_NOTIFY_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 ClassIdentifier; + U32 LastReportedChangeIndicator; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_LCT_NOTIFY_MESSAGE, *PI2O_EXEC_LCT_NOTIFY_MESSAGE; + + +/****************************************************************************/ + + +/* ExecOutboundInit Function Message Frame structure. */ + +typedef struct _I2O_EXEC_OUTBOUND_INIT_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 HostPageFrameSize; + U8 InitCode; + U8 reserved; + U16 OutboundMFrameSize; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_OUTBOUND_INIT_MESSAGE, *PI2O_EXEC_OUTBOUND_INIT_MESSAGE; + + +#define I2O_EXEC_OUTBOUND_INIT_IN_PROGRESS 0x01 +#define I2O_EXEC_OUTBOUND_INIT_REJECTED 0x02 +#define I2O_EXEC_OUTBOUND_INIT_FAILED 0x03 +#define I2O_EXEC_OUTBOUND_INIT_COMPLETE 0x04 + +#define I2O_EXEC_OUTBOUND_INIT_RESERVED_SZ 3 + + +typedef struct _I2O_EXEC_OUTBOUND_INIT_STATUS { + U8 InitStatus; + U8 reserved[I2O_EXEC_OUTBOUND_INIT_RESERVED_SZ]; +} I2O_EXEC_OUTBOUND_INIT_STATUS, *PI2O_EXEC_OUTBOUND_INIT_STATUS; + + +typedef struct _I2O_EXEC_OUTBOUND_INIT_RECLAIM_LIST { + U32 MFACount; + U32 MFAReleaseCount; + U32 MFAAddress[1]; +} I2O_EXEC_OUTBOUND_INIT_RECLAIM_LIST, *PI2O_EXEC_OUTBOUND_INIT_RECLAIM_LIST; + + +/****************************************************************************/ + +/* ExecPathEnable Function Message Frame structure. */ + +typedef struct _I2O_EXEC_PATH_ENABLE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_PATH_ENABLE_MESSAGE, *PI2O_EXEC_PATH_ENABLE_MESSAGE; + + +/****************************************************************************/ + +/* ExecPathQuiesce Function Message Frame structure. */ + +typedef struct _I2O_EXEC_PATH_QUIESCE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_PATH_QUIESCE_MESSAGE, *PI2O_EXEC_PATH_QUIESCE_MESSAGE; + + +/****************************************************************************/ + +/* ExecPathReset Function Message Frame structure. */ + +typedef struct _I2O_EXEC_PATH_RESET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +} I2O_EXEC_PATH_RESET_MESSAGE, *PI2O_EXEC_PATH_RESET_MESSAGE; + + +/****************************************************************************/ + +#define I2O_EXEC_STATIC_MF_CREATE_RESERVED_SZ 3 + +/* ExecStaticMfCreate Message Frame structure */ + +typedef struct _I2O_EXEC_STATIC_MF_CREATE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U8 MaxOutstanding; + U8 reserved[I2O_EXEC_STATIC_MF_CREATE_RESERVED_SZ]; + I2O_MESSAGE_FRAME StaticMessageFrame; +} I2O_EXEC_STATIC_MF_CREATE_MESSAGE, *PI2O_EXEC_STATIC_MF_CREATE_MESSAGE; + + +/* ExecStaticMfCreate Message Frame reply */ + +typedef struct _I2O_EXEC_STATIC_MF_CREATE_REPLY { + I2O_SINGLE_REPLY_MESSAGE_FRAME StdReplyFrame; + PI2O_MESSAGE_FRAME StaticMFA; +} I2O_EXEC_STATIC_MF_CREATE_REPLY, *PI2O_EXEC_STATIC_MF_CREATE_REPLY; + + +/* ExecStaticMfRelease Message Frame structure */ + +typedef struct _I2O_EXEC_STATIC_MF_RELEASE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + PI2O_MESSAGE_FRAME StaticMFA; +} I2O_EXEC_STATIC_MF_RELEASE_MESSAGE, *PI2O_EXEC_STATIC_MF_RELEASE_MESSAGE; + + +/****************************************************************************/ + +#define I2O_EXEC_STATUS_GET_RESERVED_SZ 16 + +/* ExecStatusGet Function Message Frame structure. */ + +typedef struct _I2O_EXEC_STATUS_GET_MESSAGE { + U8 VersionOffset; + U8 MsgFlags; + U16 MessageSize; +#if (defined(__BORLANDC__) || defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 TargetAddress; +#else + BF TargetAddress:I2O_TID_SZ; + BF InitiatorAddress:I2O_TID_SZ; + BF Function:I2O_FUNCTION_SZ; +#endif + U8 Reserved[I2O_EXEC_STATUS_GET_RESERVED_SZ]; + U32 ReplyBufferAddressLow; + U32 ReplyBufferAddressHigh; + U32 ReplyBufferLength; +} I2O_EXEC_STATUS_GET_MESSAGE, *PI2O_EXEC_STATUS_GET_MESSAGE; + + +#define I2O_IOP_STATUS_PROD_ID_STR_SZ 24 +#define I2O_EXEC_STATUS_GET_REPLY_RESERVED_SZ 6 + +/* ExecStatusGet reply Structure */ + +#define I2O_IOP_CAP_CONTEXT_32_ONLY 0x00000000 +#define I2O_IOP_CAP_CONTEXT_64_ONLY 0x00000001 +#define I2O_IOP_CAP_CONTEXT_32_64_NOT_CURRENTLY 0x00000002 +#define I2O_IOP_CAP_CONTEXT_32_64_CURRENTLY 0x00000003 +#define I2O_IOP_CAP_CURRENT_CONTEXT_NOT_CONFIG 0x00000000 +#define I2O_IOP_CAP_CURRENT_CONTEXT_32_ONLY 0x00000004 +#define I2O_IOP_CAP_CURRENT_CONTEXT_64_ONLY 0x00000008 +#define I2O_IOP_CAP_CURRENT_CONTEXT_32_64 0x0000000C +#define I2O_IOP_CAP_INBOUND_PEER_SUPPORT 0x00000010 +#define I2O_IOP_CAP_OUTBOUND_PEER_SUPPORT 0x00000020 +#define I2O_IOP_CAP_PEER_TO_PEER_SUPPORT 0x00000040 + +typedef struct _I2O_EXEC_STATUS_GET_REPLY { + U16 OrganizationID; + U16 reserved; +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 IOP_ID; +#else + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved1:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +#endif +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 SegmentNumber; +#else + BF SegmentNumber:I2O_SEGMENT_NUMBER_SZ; + BF I2oVersion:I2O_4BIT_VERSION_SZ; + BF IopState:I2O_IOP_STATE_SZ; + BF MessengerType:I2O_MESSENGER_TYPE_SZ; +#endif + U16 InboundMFrameSize; + U8 InitCode; + U8 reserved2; + U32 MaxInboundMFrames; + U32 CurrentInboundMFrames; + U32 MaxOutboundMFrames; + U8 ProductIDString[I2O_IOP_STATUS_PROD_ID_STR_SZ]; + U32 ExpectedLCTSize; + U32 IopCapabilities; + U32 DesiredPrivateMemSize; + U32 CurrentPrivateMemSize; + U32 CurrentPrivateMemBase; + U32 DesiredPrivateIOSize; + U32 CurrentPrivateIOSize; + U32 CurrentPrivateIOBase; + U8 reserved3[3]; + U8 SyncByte; +} I2O_EXEC_STATUS_GET_REPLY, *PI2O_EXEC_STATUS_GET_REPLY; + + +/****************************************************************************/ + +#define I2O_EXEC_SW_DOWNLOAD_FLAG_LOAD_MEMORY 0x00 +#define I2O_EXEC_SW_DOWNLOAD_FLAG_PERMANENT_STORE 0x01 +#define I2O_EXEC_SW_DOWNLOAD_FLAG_EXPERIMENTAL 0x00 +#define I2O_EXEC_SW_DOWNLOAD_FLAG_OVERRIDE 0x02 + +#define I2O_EXEC_SW_TYPE_DDM 0x01 +#define I2O_EXEC_SW_TYPE_DDM_MPB 0x02 +#define I2O_EXEC_SW_TYPE_DDM_CONFIG_TABLE 0x03 +#define I2O_EXEC_SW_TYPE_IRTOS 0x11 +#define I2O_EXEC_SW_TYPE_IRTOS_PRIVATE_MODULE 0x12 +#define I2O_EXEC_SW_TYPE_IRTOS_DIALOG_TABLE 0x13 +#define I2O_EXEC_SW_TYPE_IOP_PRIVATE_MODULE 0x22 +#define I2O_EXEC_SW_TYPE_IOP_DIALOG_TABLE 0x23 + + +/* I2O ExecSwDownload/Upload/Remove SwID Structure */ + +typedef struct _I2O_SW_ID { + U16 ModuleID; + U16 OrganizationID; +} I2O_SW_ID, *PI2O_SW_ID; + + +/* ExecSwDownload Function Message Frame structure. */ + +typedef struct _I2O_EXEC_SW_DOWNLOAD_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U8 CurrentFragment; + U8 TotalFragments; + U8 SwType; + U8 DownloadFlags; + U32 SWSize; + I2O_SW_ID SwID; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_SW_DOWNLOAD_MESSAGE, *PI2O_EXEC_SW_DOWNLOAD_MESSAGE; + + +/****************************************************************************/ + + +/* ExecSwUpload Function Message Frame structure. */ + +typedef struct _I2O_EXEC_SW_UPLOAD_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U8 CurrentFragment; + U8 TotalFragments; + U8 SwType; + U8 UploadFlags; + U32 SWSize; + I2O_SW_ID SwID; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_SW_UPLOAD_MESSAGE, *PI2O_EXEC_SW_UPLOAD_MESSAGE; + + +/****************************************************************************/ + + +/* ExecSwRemove Function Message Frame structure. */ + +typedef struct _I2O_EXEC_SW_REMOVE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 reserved; + U8 SwType; + U8 RemoveFlags; + U32 SWSize; + I2O_SW_ID SwID; +} I2O_EXEC_SW_REMOVE_MESSAGE, *PI2O_EXEC_SW_REMOVE_MESSAGE; + + +/****************************************************************************/ + + +/* ExecSysEnable Function Message Frame structure. */ + +typedef struct _I2O_EXEC_SYS_ENABLE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_EXEC_SYS_ENABLE_MESSAGE, *PI2O_EXEC_SYS_ENABLE_MESSAGE; + + +/****************************************************************************/ + + +/* ExecSysModify Function Message Frame structure. */ + +typedef struct _I2O_EXEC_SYS_MODIFY_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + I2O_SG_ELEMENT SGL; +} I2O_EXEC_SYS_MODIFY_MESSAGE, *PI2O_EXEC_SYS_MODIFY_MESSAGE; + + +/****************************************************************************/ + + +/* ExecSysQuiesce Function Message Frame structure. */ + +typedef struct _I2O_EXEC_SYS_QUIESCE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_EXEC_SYS_QUIESCE_MESSAGE, *PI2O_EXEC_SYS_QUIESCE_MESSAGE; + + +/****************************************************************************/ + + +/* ExecSysTabSet (System Table) Function Message Frame structure. */ + +#define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_IOP 0x000 +#define I2O_EXEC_SYS_TAB_IOP_ID_LOCAL_HOST 0x001 +#define I2O_EXEC_SYS_TAB_IOP_ID_UNKNOWN_IOP 0xFFF +#define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_LOCAL_UNIT 0x0000 +#define I2O_EXEC_SYS_TAB_HOST_UNIT_ID_UNKNOWN_UNIT 0xffff +#define I2O_EXEC_SYS_TAB_SEG_NUMBER_LOCAL_SEGMENT 0x000 +#define I2O_EXEC_SYS_TAB_SEG_NUMBER_UNKNOWN_SEGMENT 0xfff + +typedef struct _I2O_EXEC_SYS_TAB_SET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 IOP_ID; +#else + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF HostUnitID:I2O_UNIT_ID_SZ; +#endif +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 SegmentNumber; +#else + BF SegmentNumber:I2O_SEGMENT_NUMBER_SZ; + BF reserved2:I2O_RESERVED_4BITS; + BF reserved3:I2O_RESERVED_16BITS; +#endif + I2O_SG_ELEMENT SGL; +} I2O_EXEC_SYS_TAB_SET_MESSAGE, *PI2O_EXEC_SYS_TAB_SET_MESSAGE; + + +/* ExecSysTabSet (System Table) Header Reply structure. */ + +#define I2O_SET_SYSTAB_RESERVED_SZ 8 + +typedef struct _I2O_SET_SYSTAB_HEADER { + U8 NumberEntries; + U8 SysTabVersion; + U16 reserved; + U32 CurrentChangeIndicator; + U8 reserved1[I2O_SET_SYSTAB_RESERVED_SZ]; +/* I2O_SYSTAB_ENTRY SysTabEntry[1]; */ +} I2O_SET_SYSTAB_HEADER, *PI2O_SET_SYSTAB_HEADER; + + +#define I2O_RESOURCE_MANAGER_VERSION 0 + +typedef struct _MESSENGER_INFO { + U32 InboundMessagePortAddressLow; + U32 InboundMessagePortAddressHigh; + } I2O_MESSENGER_INFO, *PI2O_MESSENGER_INFO; + +/* ExecSysTabSet IOP Descriptor Entry structure. */ + +typedef struct _I2O_IOP_ENTRY { + U16 OrganizationID; + U16 reserved; +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 IOP_ID; +#else + BF IOP_ID:I2O_IOP_ID_SZ; + BF reserved3:I2O_RESERVED_4BITS; + BF reserved1:I2O_RESERVED_16BITS; +#endif +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 SegmentNumber; +#else + BF SegmentNumber:I2O_SEGMENT_NUMBER_SZ; + BF I2oVersion:I2O_4BIT_VERSION_SZ; + BF IopState:I2O_IOP_STATE_SZ; + BF MessengerType:I2O_MESSENGER_TYPE_SZ; +#endif + U16 InboundMessageFrameSize; + U16 reserved2; + U32 LastChanged; + U32 IopCapabilities; + I2O_MESSENGER_INFO MessengerInfo; +} I2O_IOP_ENTRY, *PI2O_IOP_ENTRY; + + +/****************************************************************************/ +/* Executive Parameter Groups */ +/****************************************************************************/ + + +#define I2O_EXEC_IOP_HARDWARE_GROUP_NO 0x0000 +#define I2O_EXEC_IOP_MESSAGE_IF_GROUP_NO 0x0001 +#define I2O_EXEC_EXECUTING_ENVIRONMENT_GROUP_NO 0x0002 +#define I2O_EXEC_EXECUTING_DDM_LIST_GROUP_NO 0x0003 +#define I2O_EXEC_DRIVER_STORE_GROUP_NO 0x0004 +#define I2O_EXEC_DRIVER_STORE_TABLE_GROUP_NO 0x0005 +#define I2O_EXEC_IOP_BUS_ATTRIBUTES_GROUP_NO 0x0006 +#define I2O_EXEC_IOP_SW_ATTRIBUTES_GROUP_NO 0x0007 +#define I2O_EXEC_HARDWARE_RESOURCE_TABLE_GROUP_NO 0x0100 +#define I2O_EXEC_LCT_SCALAR_GROUP_NO 0x0101 +#define I2O_EXEC_LCT_TABLE_GROUP_NO 0x0102 +#define I2O_EXEC_SYSTEM_TABLE_GROUP_NO 0x0103 +#define I2O_EXEC_EXTERNAL_CONN_TABLE_GROUP_NO 0x0104 + + +/* EXEC Group 0000h - IOP Hardware Parameter Group */ + +/* IOP HardWare Capabilities defines */ + +#define I2O_IOP_HW_CAP_SELF_BOOT 0x00000001 +#define I2O_IOP_HW_CAP_IRTOS_UPGRADEABLE 0x00000002 +#define I2O_IOP_HW_CAP_DOWNLOADABLE_DDM 0x00000004 +#define I2O_IOP_HW_CAP_INSTALLABLE_DDM 0x00000008 +#define I2O_IOP_HW_CAP_BATTERY_BACKUP_RAM 0x00000010 + +/* IOP Processor Type defines */ + +#define I2O_IOP_PROC_TYPE_INTEL_80960 0x00 +#define I2O_IOP_PROC_TYPE_AMD_29000 0x01 +#define I2O_IOP_PROC_TYPE_MOTOROLA_68000 0x02 +#define I2O_IOP_PROC_TYPE_ARM 0x03 +#define I2O_IOP_PROC_TYPE_MIPS 0x04 +#define I2O_IOP_PROC_TYPE_SPARC 0x05 +#define I2O_IOP_PROC_TYPE_POWER_PC 0x06 +#define I2O_IOP_PROC_TYPE_ALPHA 0x07 +#define I2O_IOP_PROC_TYPE_INTEL_X86 0x08 +#define I2O_IOP_PROC_TYPE_OTHER 0xFF + + +typedef struct _I2O_EXEC_IOP_HARDWARE_SCALAR { + U16 I2oVendorID; + U16 ProductID; + U32 ProcessorMemory; + U32 PermMemory; + U32 HWCapabilities; + U8 ProcessorType; + U8 ProcessorVersion; +} I2O_EXEC_IOP_HARDWARE_SCALAR, *PI2O_EXEC_IOP_HARDWARE_SCALAR; + + +/* EXEC Group 0001h - IOP Message Interface Parameter Group */ + +/* InitCode defines */ +#define I2O_MESSAGE_IF_INIT_CODE_NO_OWNER 0x00 +#define I2O_MESSAGE_IF_INIT_CODE_BIOS 0x10 +#define I2O_MESSAGE_IF_INIT_CODE_OEM_BIOS_EXTENSION 0x20 +#define I2O_MESSAGE_IF_INIT_CODE_ROM_BIOS_EXTENSION 0x30 +#define I2O_MESSAGE_IF_INIT_CODE_OS 0x80 + +typedef struct _I2O_EXEC_IOP_MESSAGE_IF_SCALAR { + U32 InboundFrameSize; + U32 InboundSizeTarget; + U32 InboundMax; + U32 InboundTarget; + U32 InboundPoolCount; + U32 InboundCurrentFree; + U32 InboundCurrentPost; + U16 StaticCount; + U16 StaticInstanceCount; + U16 StaticLimit; + U16 StaticInstanceLimit; + U32 OutboundFrameSize; + U32 OutboundMax; + U32 OutboundMaxTarget; + U32 OutboundCurrentFree; + U32 OutboundCurrentPost; + U8 InitCode; +} I2O_EXEC_IOP_MESSAGE_IF_SCALAR, *PI2O_EXEC_IOP_MESSAGE_IF_SCALAR; + + +/* EXEC Group 0002h - Executing Environment Parameter Group */ + +typedef struct _I2O_EXEC_EXECUTE_ENVIRONMENT_SCALAR { + U32 MemTotal; + U32 MemFree; + U32 PageSize; + U32 EventQMax; + U32 EventQCurrent; + U32 DDMLoadMax; +} I2O_EXEC_EXECUTE_ENVIRONMENT_SCALAR, *PI2O_EXEC_EXECUTE_ENVIRONMENT_SCALAR; + + +/* EXEC Group 0003h - Executing DDM's Parameter Group */ + +/* ModuleType Defines */ + +#define I2O_EXEC_DDM_MODULE_TYPE_OTHER 0x00 +#define I2O_EXEC_DDM_MODULE_TYPE_DOWNLOAD 0x01 +#define I2O_EXEC_DDM_MODULE_TYPE_EMBEDDED 0x22 + + +typedef struct _I2O_EXEC_EXECUTE_DDM_TABLE { + U16 DdmTID; + U8 ModuleType; + U8 reserved; + U16 I2oVendorID; + U16 ModuleID; + U8 ModuleName[I2O_MODULE_NAME_SZ]; + U32 ModuleVersion; + U32 DataSize; + U32 CodeSize; +} I2O_EXEC_EXECUTE_DDM_TABLE, *PI2O_EXEC_EXECUTE_DDM_TABLE; + + +/* EXEC Group 0004h - Driver Store Environment Parameter Group */ + + +typedef struct _I2O_EXEC_DRIVER_STORE_SCALAR { + U32 ModuleLimit; + U32 ModuleCount; + U32 CurrentSpace; + U32 FreeSpace; +} I2O_EXEC_DRIVER_STORE_SCALAR, *PI2O_EXEC_DRIVER_STORE_SCALAR; + + +/* EXEC Group 0005h - Driver Store Parameter Group */ + + +typedef struct _I2O_EXEC_DRIVER_STORE_TABLE { + U16 StoredDdmIndex; + U8 ModuleType; + U8 reserved; + U16 I2oVendorID; + U16 ModuleID; + U8 ModuleName[I2O_MODULE_NAME_SZ]; + U32 ModuleVersion; + U16 DateDay; + U16 DateMonth; + U32 DateYear; + U32 ModuleSize; + U32 MpbSize; + U32 ModuleFlags; +} I2O_EXEC_DRIVER_STORE_TABLE, *PI2O_EXEC_DRIVER_STORE_TABLE; + + +/* EXEC Group 0006h - IOP's Bus Attributes Parameter Group */ + +#define I2O_EXEC_IOP_BUS_ATTRIB_SYSTEM_BUS 0x00 +#define I2O_EXEC_IOP_BUS_ATTRIB_BRIDGED_SYSTEM_BUS 0x01 +#define I2O_EXEC_IOP_BUS_ATTRIB_PRIVATE 0x02 + +typedef struct _I2O_EXEC_IOP_BUS_ATTRIBUTE_TABLE { + U32 BusID; + U8 BusType; + U8 MaxAdapters; + U8 AdapterCount; + U8 BusAttributes; +} I2O_EXEC_IOP_BUS_ATTRIBUTE_TABLE, *PI2O_EXEC_IOP_BUS_ATTRIBUTE_TABLE; + + +/* EXEC Group 0007h - IOP's Bus Attributes Parameter Group */ + +#define I2O_EXEC_IOP_SW_CAP_IRTOS_I2O_COMPLIANT 0x00000001 +#define I2O_EXEC_IOP_SW_CAP_IRTOS_UPGRADEABLE 0x00000002 +#define I2O_EXEC_IOP_SW_CAP_DOWNLOADABLE_DDM 0x00000004 +#define I2O_EXEC_IOP_SW_CAP_INSTALLABLE_DDM 0x00000008 + +typedef struct _I2O_EXEC_IOP_SW_ATTRIBUTES_SCALAR { + U16 I2oVendorID; + U16 ProductID; + U32 CodeSize; + U32 SWCapabilities; +} I2O_EXEC_IOP_SW_ATTRIBUTES_SCALAR, *PI2O_EXEC_IOP_SW_ATTRIBUTES_SCALAR; + + +/* EXEC Group 0100h - Hardware Resource Table Parameter Group */ + +typedef struct _I2O_EXEC_HARDWARE_RESOURCE_TABLE { + U32 AdapterID; + U16 StateInfo; /* AdapterState plus Local TID */ + U8 BusNumber; + U8 BusType; + U64 PhysicalLocation; + U32 MemorySpace; + U32 IoSpace; +} I2O_EXEC_HARDWARE_RESOURCE_TABLE, *PI2O_EXEC_HARDWARE_RESOURCE_TABLE; + +/* EXEC Group 0101h - Logical Configuration Table Scalar Parameter Group */ + +typedef struct _I2O_EXEC_LCT_SCALAR { + U16 BootDevice; + U32 IopFlags; + U32 CurrentChangeIndicator; +} I2O_EXEC_LCT_SCALAR, *PI2O_EXEC_LCT_SCALAR; + +/* EXEC Group 0102h - Logical Configuration Table Parameter Group */ + +typedef struct _I2O_EXEC_LCT_TABLE { + U16 LocalTID; + U16 UserTID; + U16 ParentTID; + U16 DdmTID; + U32 ChangeIndicator; + U32 DeviceFlags; + U32 ClassID; + U32 SubClass; + U8 IdentityTag[I2O_IDENTITY_TAG_SZ]; + U32 EventCapabilities; + U8 BiosInfo; +} I2O_EXEC_LCT_TABLE, *PI2O_EXEC_LCT_TABLE; + +/* EXEC Group 0103h - System Table Parameter Group */ + +#define I2O_MESSENGER_TYPE_MEMORY_MAPPED_MESSAGE_UNIT 0x0 + +typedef struct _I2O_EXEC_SYSTEM_TABLE { + U16 IOP_ID; + U16 OrganizationID; + U16 SegmentNumber; + U8 Version; + U8 IopState; + U8 MessengerType; + U8 reserved; + U32 InboundMessagePortAddress; + U16 InboundMessageFrameSize; + U32 IopCapabilities; + I2O_MESSENGER_INFO MessengerInfo; +} I2O_EXEC_SYSTEM_TABLE, *PI2O_EXEC_SYSTEM_TABLE; + + +/* EXEC Group 0104h - External Connection Table Parameter Group */ + +#define I2O_EXEC_XCT_FLAGS_REMOTE_IOP_CREATED_CONNECTION 0x00 +#define I2O_EXEC_XCT_FLAGS_THIS_IOP_CREATED_CONNECTION 0x01 + +typedef struct _I2O_EXEC_EXTERNAL_CONNECTION_TABLE { + U16 LocalAliasTID; + U16 RemoteTID; + U16 RemoteIOP; + U16 RemoteUnitID; + U8 Flags; + U8 reserved; +} I2O_EXEC_EXTERNAL_CONNECTION_TABLE, *PI2O_EXEC_EXTERNAL_CONNECTION_TABLE; + + +/****************************************************************************/ + +PRAGMA_PACK_POP + +PRAGMA_ALIGN_POP + +#endif /* I2O_EXECUTIVE_HDR */ diff --git a/sys/dev/asr/i2omsg.h b/sys/dev/asr/i2omsg.h new file mode 100644 index 0000000..bb28d62 --- /dev/null +++ b/sys/dev/asr/i2omsg.h @@ -0,0 +1,1290 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved. + * All rights reserved + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This header file, and any modifications of this header file, are provided + * contingent upon your agreement and adherence to the here-listed terms and + * conditions. By accepting and/or using this header file, you agree to abide + * by these terms and conditions and that these terms and conditions will be + * construed and governed in accordance with the laws of the State of California, + * without reference to conflict-of-law provisions. If you do not agree + * to these terms and conditions, please delete this file, and any copies, + * permanently, without making any use thereof. + * + * THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT + * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE + * USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR + * ERROR-FREE. + * + * I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF + * ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O + * SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH + * IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS. + * + * THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY + * ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA + * OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM. + * + * I2O SIG grants the user of this header file a license to copy, distribute, + * and modify it, for any purpose, under the following terms. Any copying, + * distribution, or modification of this header file must not delete or alter + * the copyright notice of I2O SIG or any of these Terms and Conditions. + * + * Any distribution of this header file must not include a charge for the + * header file (unless such charges are strictly for the physical acts of + * copying or transferring copies). However, distribution of a product in + * which this header file is embedded may include a charge so long as any + * such charge does not include any charge for the header file itself. + * + * Any modification of this header file constitutes a derivative work based + * on this header file. Any distribution of such derivative work: (1) must + * include prominent notices that the header file has been changed from the + * original, together with the dates of any changes; (2) automatically includes + * this same license to the original header file from I2O SIG, without any + * restriction thereon from the distributing user; and (3) must include a + * grant of license of the modified file under the same terms and conditions + * as these Terms and Conditions. + * + * The I2O SIG Web site can be found at: http://www.i2osig.org + * + * The I2O SIG encourages you to deposit derivative works based on this + * header file at the I2O SIG Web site. Furthermore, to become a Registered + * Developer of the I2O SIG, sign up at the Web site or call 415.750.8352 + * (United States). + ****************************************************************/ + +/********************************************************************* + * I2OMsg.h -- I2O Message defintion file + * + * This file contains information presented in Chapter 3, 4 and 6 of + * the I2O(tm) Specification and most of the I2O Global defines and + * Typedefs. + **********************************************************************/ + +#if !defined(I2O_MESSAGE_HDR) +#define I2O_MESSAGE_HDR + +#define I2OMSG_REV 1_5_4 /* I2OMsg header file revision string */ + +/* + + NOTES: + + Gets, reads, receives, etc. are all even numbered functions. + Sets, writes, sends, etc. are all odd numbered functions. + Functions that both send and receive data can be either but an attempt is + made to use the function number that indicates the greater transfer amount. + Functions that do not send or receive data use odd function numbers. + + Some functions are synonyms like read, receive and send, write. + + All common functions will have a code of less than 0x80. + Unique functions to a class will start at 0x80. + Executive Functions start at 0xA0. + + Utility Message function codes range from 0 - 0x1f + Base Message function codes range from 0x20 - 0xfe + Private Message function code is 0xff. +*/ + + + +#if ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/pci/i2otypes.h" +# else +# include "dev/asr/i2otypes.h" +# endif +#else +# include "i2otypes.h" +#endif + + +PRAGMA_ALIGN_PUSH + +PRAGMA_PACK_PUSH + +/* Set to 1 for 64 bit Context Fields */ +#define I2O_64BIT_CONTEXT 0 + +/****************************************************************************/ + +/* Common functions accross all classes. */ + +#define I2O_PRIVATE_MESSAGE 0xFF + +/****************************************************************************/ +/* Class ID and Code Assignments */ + + +#define I2O_CLASS_VERSION_10 0x00 +#define I2O_CLASS_VERSION_11 0x01 + +/* Class Code Names: Table 6-1 Class Code Assignments. */ +#define I2O_CLASS_EXECUTIVE 0x000 +#define I2O_CLASS_DDM 0x001 +#define I2O_CLASS_RANDOM_BLOCK_STORAGE 0x010 +#define I2O_CLASS_SEQUENTIAL_STORAGE 0x011 +#define I2O_CLASS_LAN 0x020 +#define I2O_CLASS_WAN 0x030 +#define I2O_CLASS_FIBRE_CHANNEL_PORT 0x040 +#define I2O_CLASS_FIBRE_CHANNEL_PERIPHERAL 0x041 +#define I2O_CLASS_SCSI_PERIPHERAL 0x051 +#define I2O_CLASS_ATE_PORT 0x060 +#define I2O_CLASS_ATE_PERIPHERAL 0x061 +#define I2O_CLASS_FLOPPY_CONTROLLER 0x070 +#define I2O_CLASS_FLOPPY_DEVICE 0x071 +#define I2O_CLASS_BUS_ADAPTER_PORT 0x080 +/* Class Codes 0x090 - 0x09f are reserved for Peer-to-Peer classes */ +#define I2O_CLASS_MATCH_ANYCLASS 0xffffffff + +#define I2O_SUBCLASS_i960 0x001 +#define I2O_SUBCLASS_HDM 0x020 +#define I2O_SUBCLASS_ISM 0x021 + + +/****************************************************************************/ +/* Message Frame defines and structures */ + +/* Defines for the Version_Status field. */ + +#define I2O_VERSION_10 0x00 +#define I2O_VERSION_11 0x01 + +#define I2O_VERSION_OFFSET_NUMBER_MASK 0x07 +#define I2O_VERSION_OFFSET_SGL_TRL_OFFSET_MASK 0xF0 + +/* Defines for the Message Flags Field. */ +/* Please Note the the FAIL bit is only set in the Transport Fail Message. */ +#define I2O_MESSAGE_FLAGS_STATIC 0x01 +#define I2O_MESSAGE_FLAGS_64BIT_CONTEXT 0x02 +#define I2O_MESSAGE_FLAGS_MULTIPLE 0x10 +#define I2O_MESSAGE_FLAGS_FAIL 0x20 +#define I2O_MESSAGE_FLAGS_LAST 0x40 +#define I2O_MESSAGE_FLAGS_REPLY 0x80 + +/* Defines for Request Status Codes: Table 3-1 Reply Status Codes. */ + +#define I2O_REPLY_STATUS_SUCCESS 0x00 +#define I2O_REPLY_STATUS_ABORT_DIRTY 0x01 +#define I2O_REPLY_STATUS_ABORT_NO_DATA_TRANSFER 0x02 +#define I2O_REPLY_STATUS_ABORT_PARTIAL_TRANSFER 0x03 +#define I2O_REPLY_STATUS_ERROR_DIRTY 0x04 +#define I2O_REPLY_STATUS_ERROR_NO_DATA_TRANSFER 0x05 +#define I2O_REPLY_STATUS_ERROR_PARTIAL_TRANSFER 0x06 +#define I2O_REPLY_STATUS_PROCESS_ABORT_DIRTY 0x08 +#define I2O_REPLY_STATUS_PROCESS_ABORT_NO_DATA_TRANSFER 0x09 +#define I2O_REPLY_STATUS_PROCESS_ABORT_PARTIAL_TRANSFER 0x0A +#define I2O_REPLY_STATUS_TRANSACTION_ERROR 0x0B +#define I2O_REPLY_STATUS_PROGRESS_REPORT 0x80 + +/* DetailedStatusCode defines for ALL messages: Table 3-2 Detailed Status Codes. */ + +#define I2O_DETAIL_STATUS_SUCCESS 0x0000 +#define I2O_DETAIL_STATUS_BAD_KEY 0x0002 +#define I2O_DETAIL_STATUS_TCL_ERROR 0x0003 +#define I2O_DETAIL_STATUS_REPLY_BUFFER_FULL 0x0004 +#define I2O_DETAIL_STATUS_NO_SUCH_PAGE 0x0005 +#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_SOFT 0x0006 +#define I2O_DETAIL_STATUS_INSUFFICIENT_RESOURCE_HARD 0x0007 +#define I2O_DETAIL_STATUS_CHAIN_BUFFER_TOO_LARGE 0x0009 +#define I2O_DETAIL_STATUS_UNSUPPORTED_FUNCTION 0x000A +#define I2O_DETAIL_STATUS_DEVICE_LOCKED 0x000B +#define I2O_DETAIL_STATUS_DEVICE_RESET 0x000C +#define I2O_DETAIL_STATUS_INAPPROPRIATE_FUNCTION 0x000D +#define I2O_DETAIL_STATUS_INVALID_INITIATOR_ADDRESS 0x000E +#define I2O_DETAIL_STATUS_INVALID_MESSAGE_FLAGS 0x000F +#define I2O_DETAIL_STATUS_INVALID_OFFSET 0x0010 +#define I2O_DETAIL_STATUS_INVALID_PARAMETER 0x0011 +#define I2O_DETAIL_STATUS_INVALID_REQUEST 0x0012 +#define I2O_DETAIL_STATUS_INVALID_TARGET_ADDRESS 0x0013 +#define I2O_DETAIL_STATUS_MESSAGE_TOO_LARGE 0x0014 +#define I2O_DETAIL_STATUS_MESSAGE_TOO_SMALL 0x0015 +#define I2O_DETAIL_STATUS_MISSING_PARAMETER 0x0016 +#define I2O_DETAIL_STATUS_TIMEOUT 0x0017 +#define I2O_DETAIL_STATUS_UNKNOWN_ERROR 0x0018 +#define I2O_DETAIL_STATUS_UNKNOWN_FUNCTION 0x0019 +#define I2O_DETAIL_STATUS_UNSUPPORTED_VERSION 0x001A +#define I2O_DEATIL_STATUS_DEVICE_BUSY 0x001B +#define I2O_DETAIL_STATUS_DEVICE_NOT_AVAILABLE 0x001C + +/* Common I2O Field sizes */ + +#define I2O_TID_SZ 12 +#define I2O_FUNCTION_SZ 8 +#define I2O_UNIT_ID_SZ 16 +#define I2O_SEGMENT_NUMBER_SZ 12 + +#define I2O_IOP_ID_SZ 12 +#define I2O_GROUP_ID_SZ 16 +#define I2O_IOP_STATE_SZ 8 +#define I2O_MESSENGER_TYPE_SZ 8 + +#define I2O_CLASS_ID_SZ 12 +#define I2O_CLASS_ORGANIZATION_ID_SZ 16 + +#define I2O_4BIT_VERSION_SZ 4 +#define I2O_8BIT_FLAGS_SZ 8 +#define I2O_COMMON_LENGTH_FIELD_SZ 16 + +#define I2O_DEVID_DESCRIPTION_SZ 16 +#define I2O_DEVID_VENDOR_INFO_SZ 16 +#define I2O_DEVID_PRODUCT_INFO_SZ 16 +#define I2O_DEVID_REV_LEVEL_SZ 8 +#define I2O_MODULE_NAME_SZ 24 + +#define I2O_BIOS_INFO_SZ 8 + +#define I2O_RESERVED_4BITS 4 +#define I2O_RESERVED_8BITS 8 +#define I2O_RESERVED_12BITS 12 +#define I2O_RESERVED_16BITS 16 +#define I2O_RESERVED_20BITS 20 +#define I2O_RESERVED_24BITS 24 +#define I2O_RESERVED_28BITS 28 + + +typedef U32 I2O_PARAMETER_TID; + + +#if I2O_64BIT_CONTEXT +typedef U64 I2O_INITIATOR_CONTEXT; +typedef U64 I2O_TRANSACTION_CONTEXT; +#else +typedef U32 I2O_INITIATOR_CONTEXT; +typedef U32 I2O_TRANSACTION_CONTEXT; +#endif + +/* Serial Number format defines */ + +#define I2O_SERIAL_FORMAT_UNKNOWN 0 +#define I2O_SERIAL_FORMAT_BINARY 1 +#define I2O_SERIAL_FORMAT_ASCII 2 +#define I2O_SERIAL_FORMAT_UNICODE 3 +#define I2O_SERIAL_FORMAT_LAN_MAC 4 +#define I2O_SERIAL_FORMAT_WAN 5 + +/* Special TID Assignments */ + +#define I2O_IOP_TID 0 +#define I2O_HOST_TID 1 + + +/****************************************************************************/ + +/* I2O Message Frame common for all messages */ + +typedef struct _I2O_MESSAGE_FRAME { + U8 VersionOffset; + U8 MsgFlags; + U16 MessageSize; +#if (defined(__BORLANDC__)) || defined(_DPT_BIG_ENDIAN) || (defined(sparc)) + U32 TargetAddress; +#else + BF TargetAddress:I2O_TID_SZ; + BF InitiatorAddress:I2O_TID_SZ; + BF Function:I2O_FUNCTION_SZ; +#endif + I2O_INITIATOR_CONTEXT InitiatorContext; +} I2O_MESSAGE_FRAME, *PI2O_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* Transaction Reply Lists (TRL) Control Word structure */ + +#define I2O_TRL_FLAGS_SINGLE_FIXED_LENGTH 0x00 +#define I2O_TRL_FLAGS_SINGLE_VARIABLE_LENGTH 0x40 +#define I2O_TRL_FLAGS_MULTIPLE_FIXED_LENGTH 0x80 + +typedef struct _I2O_TRL_CONTROL_WORD { + U8 TrlCount; + U8 TrlElementSize; + U8 reserved; + U8 TrlFlags; +#if I2O_64BIT_CONTEXT + U32 Padding; /* Padding for 64 bit */ +#endif +} I2O_TRL_CONTROL_WORD, *PI2O_TRL_CONTROL_WORD; + +/****************************************************************************/ + +/* I2O Successful Single Transaction Reply Message Frame structure. */ + +typedef struct _I2O_SINGLE_REPLY_MESSAGE_FRAME { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 DetailedStatusCode; + U8 reserved; + U8 ReqStatus; +/* ReplyPayload */ +} I2O_SINGLE_REPLY_MESSAGE_FRAME, *PI2O_SINGLE_REPLY_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* I2O Successful Multiple Transaction Reply Message Frame structure. */ + +typedef struct _I2O_MULTIPLE_REPLY_MESSAGE_FRAME { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRL_CONTROL_WORD TrlControlWord; + U16 DetailedStatusCode; + U8 reserved; + U8 ReqStatus; +/* TransactionDetails[] */ +} I2O_MULTIPLE_REPLY_MESSAGE_FRAME, *PI2O_MULTIPLE_REPLY_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* I2O Private Message Frame structure. */ + +typedef struct _I2O_PRIVATE_MESSAGE_FRAME { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 XFunctionCode; + U16 OrganizationID; +/* PrivatePayload[] */ +} I2O_PRIVATE_MESSAGE_FRAME, *PI2O_PRIVATE_MESSAGE_FRAME; + + +/****************************************************************************/ + +/* Message Failure Severity Codes */ + +#define I2O_SEVERITY_FORMAT_ERROR 0x1 +#define I2O_SEVERITY_PATH_ERROR 0x2 +#define I2O_SEVERITY_PATH_STATE 0x4 +#define I2O_SEVERITY_CONGESTION 0x8 + +/* Transport Failure Codes: Table 3-3 Mesasge Failure Codes */ + +#define I2O_FAILURE_CODE_TRANSPORT_SERVICE_SUSPENDED 0x81 +#define I2O_FAILURE_CODE_TRANSPORT_SERVICE_TERMINATED 0x82 +#define I2O_FAILURE_CODE_TRANSPORT_CONGESTION 0x83 +#define I2O_FAILURE_CODE_TRANSPORT_FAIL 0x84 +#define I2O_FAILURE_CODE_TRANSPORT_STATE_ERROR 0x85 +#define I2O_FAILURE_CODE_TRANSPORT_TIME_OUT 0x86 +#define I2O_FAILURE_CODE_TRANSPORT_ROUTING_FAILURE 0x87 +#define I2O_FAILURE_CODE_TRANSPORT_INVALID_VERSION 0x88 +#define I2O_FAILURE_CODE_TRANSPORT_INVALID_OFFSET 0x89 +#define I2O_FAILURE_CODE_TRANSPORT_INVALID_MSG_FLAGS 0x8A +#define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_SMALL 0x8B +#define I2O_FAILURE_CODE_TRANSPORT_FRAME_TOO_LARGE 0x8C +#define I2O_FAILURE_CODE_TRANSPORT_INVALID_TARGET_ID 0x8D +#define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_ID 0x8E +#define I2O_FAILURE_CODE_TRANSPORT_INVALID_INITIATOR_CONTEXT 0x8F +#define I2O_FAILURE_CODE_TRANSPORT_UNKNOWN_FAILURE 0xFF + +/* IOP_ID and Severity sizes */ + +#define I2O_FAILCODE_SEVERITY_SZ 8 +#define I2O_FAILCODE_CODE_SZ 8 + +/* I2O Transport Message Reply for Message Failure. */ + +typedef struct _I2O_FAILURE_REPLY_MESSAGE_FRAME { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +# if (defined(_DPT_BIG_ENDIAN) || defined(sparc) || defined(__BORLANDC__)) + U32 LowestVersion; + U32 reserved; +# else + U8 LowestVersion; + U8 HighestVersion; +/* BF Severity:I2O_FAILCODE_SEVERITY_SZ; +// BF FailureCode:I2O_FAILCODE_CODE_SZ; +// +// Due to our compiler padding this structure and making it larger than +// it really is (4 bytes larger), we are re-defining these two fields +*/ + U8 Severity; + U8 FailureCode; + BF reserved:I2O_RESERVED_4BITS; + BF FailingHostUnitID:I2O_UNIT_ID_SZ; + BF reserved1:12; +# endif + U32 AgeLimit; +/* i2odep.h looks after this, but for portability sake ... */ +#if (!defined(__FAR__)) +# if (defined(__BORLANDC__)) +# define __FAR__ far +# else +# define __FAR__ +# endif +#endif +/* Not really `far, but it is a *long* physical pointer reference */ + I2O_MESSAGE_FRAME __FAR__ * PreservedMFA; +} I2O_FAILURE_REPLY_MESSAGE_FRAME, *PI2O_FAILURE_REPLY_MESSAGE_FRAME; + +/* I2O Transport Message Reply for Transaction Error. */ + +typedef struct _I2O_TRANSACTION_ERROR_REPLY_MESSAGE_FRAME { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 DetailedStatusCode; + U8 reserved; + U8 ReqStatus; /* Should always be Transaction Error */ + U32 ErrorOffset; + U8 BitOffset; + U8 reserved1; + U16 reserved2; +} I2O_TRANSACTION_ERROR_REPLY_MESSAGE_FRAME, *PI2O_TRANSACTION_ERROR_REPLY_MESSAGE_FRAME; + +/****************************************************************************/ + +/* Misc. commonly used structures */ + +/* Class ID Block */ + +typedef struct _I2O_CLASS_ID { +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 Class; +#else + BF Class:I2O_CLASS_ID_SZ; + BF Version:I2O_4BIT_VERSION_SZ; + BF OrganizationID:I2O_CLASS_ORGANIZATION_ID_SZ; +#endif +} I2O_CLASS_ID, *PI2O_CLASS_ID; + + +#define I2O_MAX_SERIAL_NUMBER_SZ 256 + +typedef struct _I2O_SERIAL_INFO { + U8 SerialNumberLength; + U8 SerialNumberFormat; + U8 SerialNumber[I2O_MAX_SERIAL_NUMBER_SZ]; +} I2O_SERIAL_INFO, *PI2O_SERIAL_INFO; + + +/****************************************************************************/ +/* Hardware Resource Table (HRT) and Logical Configuration Table (LCT) */ +/****************************************************************************/ + +/* Bus Type Code defines */ + +#define I2O_LOCAL_BUS 0 +#define I2O_ISA_BUS 1 +#define I2O_EISA_BUS 2 +#define I2O_MCA_BUS 3 +#define I2O_PCI_BUS 4 +#define I2O_PCMCIA_BUS 5 +#define I2O_NUBUS_BUS 6 +#define I2O_CARDBUS_BUS 7 +#define I2O_OTHER_BUS 0x80 + +#define I2O_HRT_STATE_SZ 4 +#define I2O_HRT_BUS_NUMBER_SZ 8 +#define I2O_HRT_BUS_TYPE_SZ 8 + + +/* Bus Structures */ + +/* PCI Bus */ +typedef struct _I2O_PCI_BUS_INFO { + U8 PciFunctionNumber; + U8 PciDeviceNumber; + U8 PciBusNumber; + U8 reserved; + U16 PciVendorID; + U16 PciDeviceID; +} I2O_PCI_BUS_INFO, *PI2O_PCI_BUS_INFO; + +/* Local Bus */ +typedef struct _I2O_LOCAL_BUS_INFO { + U16 LbBaseIOPort; + U16 reserved; + U32 LbBaseMemoryAddress; +} I2O_LOCAL_BUS_INFO, *PI2O_LOCAL_BUS_INFO; + +/* ISA Bus */ +typedef struct _I2O_ISA_BUS_INFO { + U16 IsaBaseIOPort; + U8 CSN; + U8 reserved; + U32 IsaBaseMemoryAddress; +} I2O_ISA_BUS_INFO, *PI2O_ISA_BUS_INFO; + +/* EISA Bus */ +typedef struct _I2O_EISA_BUS_INFO { + U16 EisaBaseIOPort; + U8 reserved; + U8 EisaSlotNumber; + U32 EisaBaseMemoryAddress; +} I2O_EISA_BUS_INFO, *PI2O_EISA_BUS_INFO; + +/* MCA Bus */ +typedef struct _I2O_MCA_BUS_INFO { + U16 McaBaseIOPort; + U8 reserved; + U8 McaSlotNumber; + U32 McaBaseMemoryAddress; +} I2O_MCA_BUS_INFO, *PI2O_MCA_BUS_INFO; + +/* Other Bus */ +typedef struct _I2O_OTHER_BUS_INFO { + U16 BaseIOPort; + U16 reserved; + U32 BaseMemoryAddress; +} I2O_OTHER_BUS_INFO, *PI2O_OTHER_BUS_INFO; + + +/* HRT Entry Block */ + +typedef struct _I2O_HRT_ENTRY { + U32 AdapterID; +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 ControllingTID; +#else + BF ControllingTID:I2O_TID_SZ; + BF AdapterState:I2O_HRT_STATE_SZ; + BF BusNumber:I2O_HRT_BUS_NUMBER_SZ; + BF BusType:I2O_HRT_BUS_TYPE_SZ; +#endif + union { + /* PCI Bus */ + I2O_PCI_BUS_INFO PCIBus; + + /* Local Bus */ + I2O_LOCAL_BUS_INFO LocalBus; + + /* ISA Bus */ + I2O_ISA_BUS_INFO ISABus; + + /* EISA Bus */ + I2O_EISA_BUS_INFO EISABus; + + /* MCA Bus */ + I2O_MCA_BUS_INFO MCABus; + + /* Other. */ + I2O_OTHER_BUS_INFO OtherBus; + }uBus; +} I2O_HRT_ENTRY, *PI2O_HRT_ENTRY; + + +/* I2O Hardware Resource Table structure. */ + +typedef struct _I2O_HRT { + U16 NumberEntries; + U8 EntryLength; + U8 HRTVersion; + U32 CurrentChangeIndicator; + I2O_HRT_ENTRY HRTEntry[1]; +} I2O_HRT, *PI2O_HRT; + + +/****************************************************************************/ +/* Logical Configuration Table */ +/****************************************************************************/ + +/* I2O Logical Configuration Table structures. */ + +#define I2O_IDENTITY_TAG_SZ 8 + +/* I2O Logical Configuration Table Device Flags */ + +#define I2O_LCT_DEVICE_FLAGS_CONF_DIALOG_REQUEST 0x01 +#define I2O_LCT_DEVICE_FLAGS_MORE_THAN_1_USER 0x02 +#define I2O_LCT_DEVICE_FLAGS_PEER_SERVICE_DISABLED 0x10 +#define I2O_LCT_DEVICE_FLAGS_MANAGEMENT_SERVICE_DISABLED 0x20 + +/* LCT Entry Block */ + +typedef struct _I2O_LCT_ENTRY { +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 TableEntrySize; +#else + BF TableEntrySize:I2O_COMMON_LENGTH_FIELD_SZ; + BF LocalTID:I2O_TID_SZ; + BF reserved:I2O_4BIT_VERSION_SZ; +#endif + U32 ChangeIndicator; + U32 DeviceFlags; + I2O_CLASS_ID ClassID; + U32 SubClassInfo; +#if (defined(__BORLANDC__)) || defined(_DPT_BIG_ENDIAN) || (defined(sparc)) + U32 UserTID; +#else + BF UserTID:I2O_TID_SZ; + BF ParentTID:I2O_TID_SZ; + BF BiosInfo:I2O_BIOS_INFO_SZ; +#endif + U8 IdentityTag[I2O_IDENTITY_TAG_SZ]; + U32 EventCapabilities; +} I2O_LCT_ENTRY, *PI2O_LCT_ENTRY; + + +/* I2O Logical Configuration Table structure. */ + +typedef struct _I2O_LCT { +#if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 TableSize; +#else + BF TableSize:I2O_COMMON_LENGTH_FIELD_SZ; + BF BootDeviceTID:I2O_TID_SZ; + BF LctVer:I2O_4BIT_VERSION_SZ; +#endif + U32 IopFlags; + U32 CurrentChangeIndicator; + I2O_LCT_ENTRY LCTEntry[1]; +} I2O_LCT, *PI2O_LCT; + + +/****************************************************************************/ + +/* Memory Addressing structures and defines. */ + +/* SglFlags defines. */ + +#define I2O_SGL_FLAGS_LAST_ELEMENT 0x80 +#define I2O_SGL_FLAGS_END_OF_BUFFER 0x40 + +#define I2O_SGL_FLAGS_IGNORE_ELEMENT 0x00 +#define I2O_SGL_FLAGS_TRANSPORT_ELEMENT 0x04 +#define I2O_SGL_FLAGS_BIT_BUCKET_ELEMENT 0x08 +#define I2O_SGL_FLAGS_IMMEDIATE_DATA_ELEMENT 0x0C +#define I2O_SGL_FLAGS_SIMPLE_ADDRESS_ELEMENT 0x10 +#define I2O_SGL_FLAGS_PAGE_LIST_ADDRESS_ELEMENT 0x20 +#define I2O_SGL_FLAGS_CHAIN_POINTER_ELEMENT 0x30 +#define I2O_SGL_FLAGS_LONG_TRANSACTION_ELEMENT 0x40 +#define I2O_SGL_FLAGS_SHORT_TRANSACTION_ELEMENT 0x70 +#define I2O_SGL_FLAGS_SGL_ATTRIBUTES_ELEMENT 0x7C + +#define I2O_SGL_FLAGS_BC0 0x01 +#define I2O_SGL_FLAGS_BC1 0x02 +#define I2O_SGL_FLAGS_DIR 0x04 +#define I2O_SGL_FLAGS_LOCAL_ADDRESS 0x08 + +#define I2O_SGL_FLAGS_CONTEXT_COUNT_MASK 0x03 +#define I2O_SGL_FLAGS_ADDRESS_MODE_MASK 0x3C +#define I2O_SGL_FLAGS_NO_CONTEXT 0x00 + +/* Scatter/Gather Truth Table */ + +/* + +typedef enum _SG_TYPE { + INVALID, + Ignore, + TransportDetails, + BitBucket, + ImmediateData, + Simple, + PageList, + ChainPointer, + ShortTransaction, + LongTransaction, + SGLAttributes, + INVALID/ReservedLongFormat, + INVALID/ReservedShortFormat +} SG_TYPE, *PSG_TYPE; + + + 0x00 Ignore; + 0x04 TransportDetails; + 0x08 BitBucket; + 0x0C ImmediateData; + 0x10 Simple; + 0x14 Simple; + 0x18 Simple; + 0x1C Simple; + 0x20 PageList; + 0x24 PageList; + 0x28 PageList; + 0x2C PageList; + 0x30 ChainPointer; + 0x34 INVALID; + 0x38 ChainPointer; + 0x3C INVALID; + 0x40 LongTransaction; + 0x44 INVALID/ReservedLongFormat; + 0x48 BitBucket; + 0x4C ImmediateData; + 0x50 Simple; + 0x54 Simple; + 0x58 Simple; + 0x5C Simple; + 0x60 PageList; + 0x64 PageList; + 0x68 PageList; + 0x6C PageList; + 0x70 ShortTransaction; + 0x74 INVALID/ReservedShortFormat; + 0x78 INVALID/ReservedShortFormat; + 0x7C SGLAttributes; +*/ + + +/* 32 Bit Context Field defines */ + +#define I2O_SGL_FLAGS_CONTEXT32_NULL 0x00 +#define I2O_SGL_FLAGS_CONTEXT32_U32 0x01 +#define I2O_SGL_FLAGS_CONTEXT32_U64 0x02 +#define I2O_SGL_FLAGS_CONTEXT32_U96 0x03 + +#define I2O_SGL_FLAGS_CONTEXT32_NULL_SZ 0x00 +#define I2O_SGL_FLAGS_CONTEXT32_U32_SZ 0x04 +#define I2O_SGL_FLAGS_CONTEXT32_U64_SZ 0x08 +#define I2O_SGL_FLAGS_CONTEXT32_U96_SZ 0x0C + +/* 64 Bit Context Field defines */ + +#define I2O_SGL_FLAGS_CONTEXT64_NULL 0x00 +#define I2O_SGL_FLAGS_CONTEXT64_U64 0x01 +#define I2O_SGL_FLAGS_CONTEXT64_U128 0x02 +#define I2O_SGL_FLAGS_CONTEXT64_U192 0x03 + +#define I2O_SGL_FLAGS_CONTEXT64_NULL_SZ 0x00 +#define I2O_SGL_FLAGS_CONTEXT64_U64_SZ 0x08 +#define I2O_SGL_FLAGS_CONTEXT64_U128_SZ 0x10 +#define I2O_SGL_FLAGS_CONTEXT64_U192_SZ 0x18 + +/* SGL Attribute Element defines */ + +#define I2O_SGL_ATTRIBUTE_FLAGS_BIT_BUCKET_HINT 0x0400 +#define I2O_SGL_ATTRIBUTE_FLAGS_IMMEDIATE_DATA_HINT 0x0200 +#define I2O_SGL_ATTRIBUTE_FLAGS_LOCAL_ADDRESS_HINT 0x0100 +#define I2O_SGL_ATTRIBUTE_FLAGS_32BIT_TRANSACTION 0x0000 +#define I2O_SGL_ATTRIBUTE_FLAGS_64BIT_TRANSACTION 0x0004 +#define I2O_SGL_ATTRIBUTE_FLAGS_32BIT_LOCAL_ADDRESS 0x0000 + +/* SG Size defines */ + +#define I2O_SG_COUNT_SZ 24 +#define I2O_SG_FLAGS_SZ 8 + +/* Standard Flags and Count fields for SG Elements */ + +typedef struct _I2O_FLAGS_COUNT { +#if (defined(__BORLANDC__)) || defined(_DPT_BIG_ENDIAN) || (defined(sparc)) + U32 Count; +#else + BF Count:I2O_SG_COUNT_SZ; + BF Flags:I2O_SG_FLAGS_SZ; +#endif +} I2O_FLAGS_COUNT, *PI2O_FLAGS_COUNT; + +/* Bit Bucket Element */ + +typedef struct _I2O_SGE_BIT_BUCKET_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 BufferContext; +} I2O_SGE_BIT_BUCKET_ELEMENT, *PI2O_SGE_BIT_BUCKET_ELEMENT; + +/* Chain Addressing Scatter-Gather Element */ + +typedef struct _I2O_SGE_CHAIN_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 PhysicalAddress; +} I2O_SGE_CHAIN_ELEMENT, *PI2O_SGE_CHAIN_ELEMENT; + +/* Chain Addressing with Context Scatter-Gather Element */ + +typedef struct _I2O_SGE_CHAIN_CONTEXT_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 Context[1]; + U32 PhysicalAddress; +} I2O_SGE_CHAIN_CONTEXT_ELEMENT, *PI2O_SGE_CHAIN_CONTEXT_ELEMENT; + +/* Ignore Scatter-Gather Element */ + +typedef struct _I2O_SGE_IGNORE_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; +} I2O_SGE_IGNORE_ELEMENT, *PI2O_SGE_IGNORE_ELEMENT; + +/* Immediate Data Element */ + +typedef struct _I2O_SGE_IMMEDIATE_DATA_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; +} I2O_SGE_IMMEDIATE_DATA_ELEMENT, *PI2O_SGE_IMMEDIATE_DATA_ELEMENT; + +/* Immediate Data with Context Element */ + +typedef struct _I2O_SGE_IMMEDIATE_DATA_CONTEXT_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 BufferContext; +} I2O_SGE_IMMEDIATE_DATA_CONTEXT_ELEMENT, *PI2O_SGE_IMMEDIATE_DATA_CONTEXT_ELEMENT; + +/* Long Transaction Parameters Element */ + +typedef struct _I2O_SGE_LONG_TRANSACTION_ELEMENT { +#if (defined(__BORLANDC__)) + U32 LongElementLength; +#else + BF LongElementLength:I2O_SG_COUNT_SZ; + BF Flags:I2O_SG_FLAGS_SZ; +#endif + U32 BufferContext; +} I2O_SGE_LONG_TRANSACTION_ELEMENT, *PI2O_SGE_LONG_TRANSACTION_ELEMENT; + +/* Page List Scatter-Gather Element */ + +typedef struct _I2O_SGE_PAGE_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 PhysicalAddress[1]; +} I2O_SGE_PAGE_ELEMENT , *PI2O_SGE_PAGE_ELEMENT ; + +/* Page List with Context Scatter-Gather Element */ + +typedef struct _I2O_SGE_PAGE_CONTEXT_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 BufferContext[1]; + U32 PhysicalAddress[1]; +} I2O_SGE_PAGE_CONTEXT_ELEMENT, *PI2O_SGE_PAGE_CONTEXT_ELEMENT; + +/* SGL Attribute Element */ + +typedef struct _I2O_SGE_SGL_ATTRIBUTES_ELEMENT { + U16 SglAttributeFlags; + U8 ElementLength; + U8 Flags; + U32 PageFrameSize; +} I2O_SGE_SGL_ATTRIBUTES_ELEMENT, *PI2O_SGE_SGL_ATTRIBUTES_ELEMENT; + +/* Short Transaction Parameters Element */ + +typedef struct _I2O_SGE_SHORT_TRANSACTION_ELEMENT { + U16 ClassFields; + U8 ElementLength; + U8 Flags; + U32 BufferContext; +} I2O_SGE_SHORT_TRANSACTION_ELEMENT, *PI2O_SGE_SHORT_TRANSACTION_ELEMENT; + +/* Simple Addressing Scatter-Gather Element */ + +typedef struct _I2O_SGE_SIMPLE_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 PhysicalAddress; +} I2O_SGE_SIMPLE_ELEMENT, *PI2O_SGE_SIMPLE_ELEMENT; + +/* Simple Addressing with Context Scatter-Gather Element */ + +typedef struct _I2O_SGE_SIMPLE_CONTEXT_ELEMENT { + I2O_FLAGS_COUNT FlagsCount; + U32 BufferContext[1]; + U32 PhysicalAddress; +} I2O_SGE_SIMPLE_CONTEXT_ELEMENT, *PI2O_SGE_SIMPLE_CONTEXT_ELEMENT; + +/* Transport Detail Element */ + +typedef struct _I2O_SGE_TRANSPORT_ELEMENT { +#if (defined(__BORLANDC__)) + U32 LongElementLength; +#else + BF LongElementLength:I2O_SG_COUNT_SZ; + BF Flags:I2O_SG_FLAGS_SZ; +#endif +} I2O_SGE_TRANSPORT_ELEMENT, *PI2O_SGE_TRANSPORT_ELEMENT; + +typedef struct _I2O_SG_ELEMENT { + union { + /* Bit Bucket Element */ + I2O_SGE_BIT_BUCKET_ELEMENT BitBucket; + + /* Chain Addressing Element */ + I2O_SGE_CHAIN_ELEMENT Chain; + + /* Chain Addressing with Context Element */ + I2O_SGE_CHAIN_CONTEXT_ELEMENT ChainContext; + + /* Ignore Scatter-Gather Element */ + I2O_SGE_IGNORE_ELEMENT Ignore; + + /* Immediate Data Element */ + I2O_SGE_IMMEDIATE_DATA_ELEMENT ImmediateData; + + /* Immediate Data with Context Element */ + I2O_SGE_IMMEDIATE_DATA_CONTEXT_ELEMENT ImmediateDataContext; + + /* Long Transaction Parameters Element */ + I2O_SGE_LONG_TRANSACTION_ELEMENT LongTransaction; + + /* Page List Element */ + I2O_SGE_PAGE_ELEMENT Page; + + /* Page List with Context Element */ + I2O_SGE_PAGE_CONTEXT_ELEMENT PageContext; + + /* SGL Attribute Element */ + I2O_SGE_SGL_ATTRIBUTES_ELEMENT SGLAttribute; + + /* Short Transaction Parameters Element */ + I2O_SGE_SHORT_TRANSACTION_ELEMENT ShortTransaction; + + /* Simple Addressing Element */ + I2O_SGE_SIMPLE_ELEMENT Simple[1]; + + /* Simple Addressing with Context Element */ + I2O_SGE_SIMPLE_CONTEXT_ELEMENT SimpleContext[1]; + + /* Transport Detail Element */ + I2O_SGE_TRANSPORT_ELEMENT Transport; +#if (defined(sun) && defined(u)) +// there is a macro defined in Solaris sys/user.h for u, rename this to uSG + } uSG ; +#else + } u ; +#endif +} I2O_SG_ELEMENT, *PI2O_SG_ELEMENT; + +/****************************************************************************/ +/* Basic Parameter Group Access */ +/****************************************************************************/ + +/* Operation Function Numbers */ + +#define I2O_PARAMS_OPERATION_FIELD_GET 0x0001 +#define I2O_PARAMS_OPERATION_LIST_GET 0x0002 +#define I2O_PARAMS_OPERATION_MORE_GET 0x0003 +#define I2O_PARAMS_OPERATION_SIZE_GET 0x0004 +#define I2O_PARAMS_OPERATION_TABLE_GET 0x0005 +#define I2O_PARAMS_OPERATION_FIELD_SET 0x0006 +#define I2O_PARAMS_OPERATION_LIST_SET 0x0007 +#define I2O_PARAMS_OPERATION_ROW_ADD 0x0008 +#define I2O_PARAMS_OPERATION_ROW_DELETE 0x0009 +#define I2O_PARAMS_OPERATION_TABLE_CLEAR 0x000A + +/* Operations List Header */ + +typedef struct _I2O_PARAM_OPERATIONS_LIST_HEADER { + U16 OperationCount; + U16 Reserved; +} I2O_PARAM_OPERATIONS_LIST_HEADER, *PI2O_PARAM_OPERATIONS_LIST_HEADER; + +/* Results List Header */ + +typedef struct _I2O_PARAM_RESULTS_LIST_HEADER { + U16 ResultCount; + U16 Reserved; +} I2O_PARAM_RESULTS_LIST_HEADER, *PI2O_PARAM_RESULTS_LIST_HEADER; + +/* Read Operation Result Block Template Structure */ + +typedef struct _I2O_PARAM_READ_OPERATION_RESULT { + U16 BlockSize; + U8 BlockStatus; + U8 ErrorInfoSize; + /* Operations Results */ + /* Pad (if any) */ + /* ErrorInformation (if any) */ +} I2O_PARAM_READ_OPERATION_RESULT, *PI2O_PARAM_READ_OPERATION_RESULT; + +typedef struct _I2O_TABLE_READ_OPERATION_RESULT { + U16 BlockSize; + U8 BlockStatus; + U8 ErrorInfoSize; + U16 RowCount; + U16 MoreFlag; + /* Operations Results */ + /* Pad (if any) */ + /* ErrorInformation (if any) */ +} I2O_TABLE_READ_OPERATION_RESULT, *PI2O_TABLE_READ_OPERATION_RESULT; + +/* Error Information Template Structure */ + +typedef struct _I2O_PARAM_ERROR_INFO_TEMPLATE { + U16 OperationCode; + U16 GroupNumber; + U16 FieldIdx; + U8 AdditionalStatus; + U8 NumberKeys; + /* List of Key Values (variable) */ + /* Pad (if any) */ +} I2O_PARAM_ERROR_INFO_TEMPLATE, *PI2O_PARAM_ERROR_INFO_TEMPLATE; + +/* Operation Template for Specific Fields */ + +typedef struct _I2O_PARAM_OPERATION_SPECIFIC_TEMPLATE { + U16 Operation; + U16 GroupNumber; + U16 FieldCount; + U16 FieldIdx[1]; + /* Pad (if any) */ +} I2O_PARAM_OPERATION_SPECIFIC_TEMPLATE, *PI2O_PARAM_OPERATION_SPECIFIC_TEMPLATE; + +/* Operation Template for All Fields */ + +typedef struct _I2O_PARAM_OPERATION_ALL_TEMPLATE { + U16 Operation; + U16 GroupNumber; + U16 FieldCount; + /* Pad (if any) */ +} I2O_PARAM_OPERATION_ALL_TEMPLATE, *PI2O_PARAM_OPERATION_ALL_TEMPLATE; + +/* Operation Template for All List Fields */ + +typedef struct _I2O_PARAM_OPERATION_ALL_LIST_TEMPLATE { + U16 Operation; + U16 GroupNumber; + U16 FieldCount; + U16 KeyCount; + U8 KeyValue; + /* Pad (if any) */ +} I2O_PARAM_OPERATION_ALL_LIST_TEMPLATE, *PI2O_PARAM_OPERATION_ALL_LIST_TEMPLATE; + +/* Modify Operation Result Block Template Structure */ + +typedef struct _I2O_PARAM_MODIFY_OPERATION_RESULT { + U16 BlockSize; + U8 BlockStatus; + U8 ErrorInfoSize; + /* ErrorInformation (if any) */ +} I2O_PARAM_MODIFY_OPERATION_RESULT, *PI2O_PARAM_MODIFY_OPERATION_RESULT; + +/* Operation Template for Row Delete */ + +typedef struct _I2O_PARAM_OPERATION_ROW_DELETE_TEMPLATE { + U16 Operation; + U16 GroupNumber; + U16 RowCount; + U8 KeyValue; +} I2O_PARAM_OPERATION_ROW_DELETE_TEMPLATE, *PI2O_PARAM_OPERATION_ROW_DELETE_TEMPLATE; + +/* Operation Template for Table Clear */ + +typedef struct _I2O_PARAM_OPERATION_TABLE_CLEAR_TEMPLATE { + U16 Operation; + U16 GroupNumber; +} I2O_PARAM_OPERATION_TABLE_CLEAR_TEMPLATE, *PI2O_PARAM_OPERATION_TABLE_CLEAR_TEMPLATE; + +/* Status codes and Error Information for Parameter functions */ + +#define I2O_PARAMS_STATUS_SUCCESS 0x00 +#define I2O_PARAMS_STATUS_BAD_KEY_ABORT 0x01 +#define I2O_PARAMS_STATUS_BAD_KEY_CONTINUE 0x02 +#define I2O_PARAMS_STATUS_BUFFER_FULL 0x03 +#define I2O_PARAMS_STATUS_BUFFER_TOO_SMALL 0x04 +#define I2O_PARAMS_STATUS_FIELD_UNREADABLE 0x05 +#define I2O_PARAMS_STATUS_FIELD_UNWRITEABLE 0x06 +#define I2O_PARAMS_STATUS_INSUFFICIENT_FIELDS 0x07 +#define I2O_PARAMS_STATUS_INVALID_GROUP_ID 0x08 +#define I2O_PARAMS_STATUS_INVALID_OPERATION 0x09 +#define I2O_PARAMS_STATUS_NO_KEY_FIELD 0x0A +#define I2O_PARAMS_STATUS_NO_SUCH_FIELD 0x0B +#define I2O_PARAMS_STATUS_NON_DYNAMIC_GROUP 0x0C +#define I2O_PARAMS_STATUS_OPERATION_ERROR 0x0D +#define I2O_PARAMS_STATUS_SCALAR_ERROR 0x0E +#define I2O_PARAMS_STATUS_TABLE_ERROR 0x0F +#define I2O_PARAMS_STATUS_WRONG_GROUP_TYPE 0x10 + + +/****************************************************************************/ +/* GROUP Parameter Groups */ +/****************************************************************************/ + +/* GROUP Configuration and Operating Structures and Defines */ + +/* Groups Numbers */ + +#define I2O_UTIL_PARAMS_DESCRIPTOR_GROUP_NO 0xF000 +#define I2O_UTIL_PHYSICAL_DEVICE_TABLE_GROUP_NO 0xF001 +#define I2O_UTIL_CLAIMED_TABLE_GROUP_NO 0xF002 +#define I2O_UTIL_USER_TABLE_GROUP_NO 0xF003 +#define I2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_GROUP_NO 0xF005 +#define I2O_UTIL_AUTHORIZED_USER_TABLE_GROUP_NO 0xF006 +#define I2O_UTIL_DEVICE_IDENTITY_GROUP_NO 0xF100 +#define I2O_UTIL_DDM_IDENTITY_GROUP_NO 0xF101 +#define I2O_UTIL_USER_INFORMATION_GROUP_NO 0xF102 +#define I2O_UTIL_SGL_OPERATING_LIMITS_GROUP_NO 0xF103 +#define I2O_UTIL_SENSORS_GROUP_NO 0xF200 + +/* UTIL Group F000h - GROUP DESCRIPTORS Parameter Group */ + +#define I2O_UTIL_GROUP_PROPERTIES_GROUP_TABLE 0x01 +#define I2O_UTIL_GROUP_PROPERTIES_ROW_ADDITION 0x02 +#define I2O_UTIL_GROUP_PROPERTIES_ROW_DELETION 0x04 +#define I2O_UTIL_GROUP_PROPERTIES_CLEAR_OPERATION 0x08 + +typedef struct _I2O_UTIL_GROUP_DESCRIPTOR_TABLE { + U16 GroupNumber; + U16 FieldCount; + U16 RowCount; + U8 Properties; + U8 reserved; +} I2O_UTIL_GROUP_DESCRIPTOR_TABLE, *PI2O_UTIL_GROUP_DESCRIPTOR_TABLE; + +/* UTIL Group F001h - Physical Device Table Parameter Group */ + +typedef struct _I2O_UTIL_PHYSICAL_DEVICE_TABLE { + U32 AdapterID; +} I2O_UTIL_PHYSICAL_DEVICE_TABLE, *PI2O_UTIL_PHYSICAL_DEVICE_TABLE; + +/* UTIL Group F002h - Claimed Table Parameter Group */ + +typedef struct _I2O_UTIL_CLAIMED_TABLE { + U16 ClaimedTID; +} I2O_UTIL_CLAIMED_TABLE, *PI2O_UTIL_CLAIMED_TABLE; + +/* UTIL Group F003h - User Table Parameter Group */ + +typedef struct _I2O_UTIL_USER_TABLE { + U16 Instance; + U16 UserTID; + U8 ClaimType; + U8 reserved1; + U16 reserved2; +} I2O_UTIL_USER_TABLE, *PI2O_UTIL_USER_TABLE; + +/* UTIL Group F005h - Private Message Extensions Parameter Group */ + +typedef struct _I2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_TABLE { + U16 ExtInstance; + U16 OrganizationID; + U16 XFunctionCode; +} I2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_TABLE, *PI2O_UTIL_PRIVATE_MESSAGE_EXTENSIONS_TABLE; + +/* UTIL Group F006h - Authorized User Table Parameter Group */ + +typedef struct _I2O_UTIL_AUTHORIZED_USER_TABLE { + U16 AlternateTID; +} I2O_UTIL_AUTHORIZED_USER_TABLE, *PI2O_UTIL_AUTHORIZED_USER_TABLE; + +/* UTIL Group F100h - Device Identity Parameter Group */ + +typedef struct _I2O_UTIL_DEVICE_IDENTITY_SCALAR { + U32 ClassID; + U16 OwnerTID; + U16 ParentTID; + U8 VendorInfo[I2O_DEVID_VENDOR_INFO_SZ]; + U8 ProductInfo[I2O_DEVID_PRODUCT_INFO_SZ]; + U8 Description[I2O_DEVID_DESCRIPTION_SZ]; + U8 ProductRevLevel[I2O_DEVID_REV_LEVEL_SZ]; + U8 SNFormat; + U8 SerialNumber[I2O_MAX_SERIAL_NUMBER_SZ]; +} I2O_UTIL_DEVICE_IDENTITY_SCALAR, *PI2O_UTIL_DEVICE_IDENTITY_SCALAR; + +/* UTIL Group F101h - DDM Identity Parameter Group */ + +typedef struct _I2O_UTIL_DDM_IDENTITY_SCALAR { + U16 DdmTID; + U8 ModuleName[I2O_MODULE_NAME_SZ]; + U8 ModuleRevLevel[I2O_DEVID_REV_LEVEL_SZ]; + U8 SNFormat; + U8 SerialNumber[I2O_MAX_SERIAL_NUMBER_SZ]; +} I2O_UTIL_DDM_IDENTITY_SCALAR, *PI2O_UTIL_DDM_IDENTITY_SCALAR; + +/* UTIL Group F102h - User Information Parameter Group */ + +#define I2O_USER_DEVICE_NAME_SZ 64 +#define I2O_USER_SERVICE_NAME_SZ 64 +#define I2O_USER_PHYSICAL_LOCATION_SZ 64 + +typedef struct _I2O_UTIL_USER_INFORMATION_SCALAR { + U8 DeviceName[I2O_USER_DEVICE_NAME_SZ]; + U8 ServiceName[I2O_USER_SERVICE_NAME_SZ]; + U8 PhysicalLocation[I2O_USER_PHYSICAL_LOCATION_SZ]; + U32 InstanceNumber; +} I2O_UTIL_USER_INFORMATION_SCALAR, *PI2O_UTIL_USER_INFORMATION_SCALAR; + +/* UTIL Group F103h - SGL Operating Limits Parameter Group */ + +typedef struct _I2O_UTIL_SGL_OPERATING_LIMITS_SCALAR { + U32 SglChainSize; + U32 SglChainSizeMax; + U32 SglChainSizeTarget; + U16 SglFragCount; + U16 SglFragCountMax; + U16 SglFragCountTarget; +} I2O_UTIL_SGL_OPERATING_LIMITS_SCALAR, *PI2O_UTIL_SGL_OPERATING_LIMITS_SCALAR; + +/* UTIL Group F200h - Sensors Parameter Group */ + +#define I2O_SENSOR_COMPONENT_OTHER 0x00 +#define I2O_SENSOR_COMPONENT_PLANAR_LOGIC_BOARD 0x01 +#define I2O_SENSOR_COMPONENT_CPU 0x02 +#define I2O_SENSOR_COMPONENT_CHASSIS 0x03 +#define I2O_SENSOR_COMPONENT_POWER_SUPPLY 0x04 +#define I2O_SENSOR_COMPONENT_STORAGE 0x05 +#define I2O_SENSOR_COMPONENT_EXTERNAL 0x06 + +#define I2O_SENSOR_SENSOR_CLASS_ANALOG 0x00 +#define I2O_SENSOR_SENSOR_CLASS_DIGITAL 0x01 + +#define I2O_SENSOR_SENSOR_TYPE_OTHER 0x00 +#define I2O_SENSOR_SENSOR_TYPE_THERMAL 0x01 +#define I2O_SENSOR_SENSOR_TYPE_DC_VOLTAGE 0x02 +#define I2O_SENSOR_SENSOR_TYPE_AC_VOLTAGE 0x03 +#define I2O_SENSOR_SENSOR_TYPE_DC_CURRENT 0x04 +#define I2O_SENSOR_SENSOR_TYPE_AC_CURRENT 0x05 +#define I2O_SENSOR_SENSOR_TYPE_DOOR_OPEN 0x06 +#define I2O_SENSOR_SENSOR_TYPE_FAN_OPERATIONAL 0x07 + +#define I2O_SENSOR_SENSOR_STATE_NORMAL 0x00 +#define I2O_SENSOR_SENSOR_STATE_ABNORMAL 0x01 +#define I2O_SENSOR_SENSOR_STATE_UNKNOWN 0x02 +#define I2O_SENSOR_SENSOR_STATE_LOW_CAT 0x03 +#define I2O_SENSOR_SENSOR_STATE_LOW 0x04 +#define I2O_SENSOR_SENSOR_STATE_LOW_WARNING 0x05 +#define I2O_SENSOR_SENSOR_STATE_HIGH_WARNING 0x06 +#define I2O_SENSOR_SENSOR_STATE_HIGH 0x07 +#define I2O_SENSOR_SENSOR_STATE_HIGH_CAT 0x08 + +#define I2O_SENSOR_EVENT_ENABLE_STATE_CHANGE 0x0001 +#define I2O_SENSOR_EVENT_ENABLE_LOW_CATASTROPHIC 0x0002 +#define I2O_SENSOR_EVENT_ENABLE_LOW_READING 0x0004 +#define I2O_SENSOR_EVENT_ENABLE_LOW_WARNING 0x0008 +#define I2O_SENSOR_EVENT_ENABLE_CHANGE_TO_NORMAL 0x0010 +#define I2O_SENSOR_EVENT_ENABLE_HIGH_WARNING 0x0020 +#define I2O_SENSOR_EVENT_ENABLE_HIGH_READING 0x0040 +#define I2O_SENSOR_EVENT_ENABLE_HIGH_CATASTROPHIC 0x0080 + + +typedef struct _I2O_UTIL_SENSORS_TABLE { + U16 SensorInstance; + U8 Component; + U16 ComponentInstance; + U8 SensorClass; + U8 SensorType; + S8 ScalingExponent; + S32 ActualReading; + S32 MinimumReading; + S32 Low2LowCatThreshold; + S32 LowCat2LowThreshold; + S32 LowWarn2LowThreshold; + S32 Low2LowWarnThreshold; + S32 Norm2LowWarnThreshold; + S32 LowWarn2NormThreshold; + S32 NominalReading; + S32 HiWarn2NormThreshold; + S32 Norm2HiWarnThreshold; + S32 High2HiWarnThreshold; + S32 HiWarn2HighThreshold; + S32 HiCat2HighThreshold; + S32 Hi2HiCatThreshold; + S32 MaximumReading; + U8 SensorState; + U16 EventEnable; +} I2O_UTIL_SENSORS_TABLE, *PI2O_UTIL_SENSORS_TABLE; + + +PRAGMA_PACK_POP + +PRAGMA_ALIGN_POP + +#endif /* I2O_MESSAGE_HDR */ diff --git a/sys/dev/asr/i2otypes.h b/sys/dev/asr/i2otypes.h new file mode 100644 index 0000000..18511e6 --- /dev/null +++ b/sys/dev/asr/i2otypes.h @@ -0,0 +1,134 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved. + * All rights reserved + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This header file, and any modifications of this header file, are provided + * contingent upon your agreement and adherence to the here-listed terms and + * conditions. By accepting and/or using this header file, you agree to abide + * by these terms and conditions and that these terms and conditions will be + * construed and governed in accordance with the laws of the State of California, + * without reference to conflict-of-law provisions. If you do not agree + * to these terms and conditions, please delete this file, and any copies, + * permanently, without making any use thereof. + * + * THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT + * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE + * USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR + * ERROR-FREE. + * + * I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF + * ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O + * SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH + * IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS. + * + * THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY + * ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA + * OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM. + * + * I2O SIG grants the user of this header file a license to copy, distribute, + * and modify it, for any purpose, under the following terms. Any copying, + * distribution, or modification of this header file must not delete or alter + * the copyright notice of I2O SIG or any of these Terms and Conditions. + * + * Any distribution of this header file must not include a charge for the + * header file (unless such charges are strictly for the physical acts of + * copying or transferring copies). However, distribution of a product in + * which this header file is embedded may include a charge so long as any + * such charge does not include any charge for the header file itself. + * + * Any modification of this header file constitutes a derivative work based + * on this header file. Any distribution of such derivative work: (1) must + * include prominent notices that the header file has been changed from the + * original, together with the dates of any changes; (2) automatically includes + * this same license to the original header file from I2O SIG, without any + * restriction thereon from the distributing user; and (3) must include a + * grant of license of the modified file under the same terms and conditions + * as these Terms and Conditions. + * + * The I2O SIG Web site can be found at: http://www.i2osig.org + * + * The I2O SIG encourages you to deposit derivative works based on this + * header file at the I2O SIG Web site. Furthermore, to become a Registered + * Developer of the I2O SIG, sign up at the Web site or call 415.750.8352 + * (United States). + ****************************************************************/ + +#ifndef __INCi2otypesh +#define __INCi2otypesh + +#define I2OTYPES_REV 1_5_4 + +/* include architecture/compiler dependencies */ + +#if ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/pci/i2odep.h" +# else +# include "dev/asr/i2odep.h" +# endif +#else +# include "i2odep.h" +#endif + + +/* 64 bit defines */ + +typedef struct _S64 { + U32 LowPart; + S32 HighPart; +} S64; + +typedef struct _U64 { + U32 LowPart; + U32 HighPart; +} U64; + +/* Pointer to Basics */ + +typedef VOID *PVOID; +typedef S8 *PS8; +typedef S16 *PS16; +typedef S32 *PS32; +typedef S64 *PS64; + +/* Pointer to Unsigned Basics */ + +typedef U8 *PU8; +typedef U16 *PU16; +typedef U32 *PU32; +typedef U64 *PU64; + +/* misc */ + +typedef S32 I2O_ARG; +typedef U32 I2O_COUNT; +typedef U32 I2O_USECS; +typedef U32 I2O_ADDR32; +typedef U32 I2O_SIZE; + +#endif /* __INCi2otypesh */ diff --git a/sys/dev/asr/i2outil.h b/sys/dev/asr/i2outil.h new file mode 100644 index 0000000..ee9ba54 --- /dev/null +++ b/sys/dev/asr/i2outil.h @@ -0,0 +1,418 @@ +/* $FreeBSD$ */ +/**************************************************************** + * Copyright (c) 1996-2000 Distributed Processing Technology Corporation + * Copyright (c) 2000 Adaptec Corporation. + * All rights reserved. + * + * Copyright 1999 I2O Special Interest Group (I2O SIG). All rights reserved. + * All rights reserved + * + * TERMS AND CONDITIONS OF USE + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + * This header file, and any modifications of this header file, are provided + * contingent upon your agreement and adherence to the here-listed terms and + * conditions. By accepting and/or using this header file, you agree to abide + * by these terms and conditions and that these terms and conditions will be + * construed and governed in accordance with the laws of the State of California, + * without reference to conflict-of-law provisions. If you do not agree + * to these terms and conditions, please delete this file, and any copies, + * permanently, without making any use thereof. + * + * THIS HEADER FILE IS PROVIDED FREE OF CHARGE ON AN AS-IS BASIS WITHOUT + * WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED + * TO IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE. I2O SIG DOES NOT WARRANT THAT THIS HEADER FILE WILL MEET THE + * USER'S REQUIREMENTS OR THAT ITS OPERATION WILL BE UNINTERRUPTED OR + * ERROR-FREE. + * + * I2O SIG DISCLAIMS ALL LIABILITY, INCLUDING LIABILITY FOR INFRINGEMENT OF + * ANY PROPRIETARY RIGHTS, RELATING TO THE IMPLEMENTATION OF THE I2O + * SPECIFICATIONS. I2O SIG DOES NOT WARRANT OR REPRESENT THAT SUCH + * IMPLEMENTATIONS WILL NOT INFRINGE SUCH RIGHTS. + * + * THE USER OF THIS HEADER FILE SHALL HAVE NO RECOURSE TO I2O SIG FOR ANY + * ACTUAL OR CONSEQUENTIAL DAMAGES INCLUDING, BUT NOT LIMITED TO, LOST DATA + * OR LOST PROFITS ARISING OUT OF THE USE OR INABILITY TO USE THIS PROGRAM. + * + * I2O SIG grants the user of this header file a license to copy, distribute, + * and modify it, for any purpose, under the following terms. Any copying, + * distribution, or modification of this header file must not delete or alter + * the copyright notice of I2O SIG or any of these Terms and Conditions. + * + * Any distribution of this header file must not include a charge for the + * header file (unless such charges are strictly for the physical acts of + * copying or transferring copies). However, distribution of a product in + * which this header file is embedded may include a charge so long as any + * such charge does not include any charge for the header file itself. + * + * Any modification of this header file constitutes a derivative work based + * on this header file. Any distribution of such derivative work: (1) must + * include prominent notices that the header file has been changed from the + * original, together with the dates of any changes; (2) automatically includes + * this same license to the original header file from I2O SIG, without any + * restriction thereon from the distributing user; and (3) must include a + * grant of license of the modified file under the same terms and conditions + * as these Terms and Conditions. + * + * The I2O SIG Web site can be found at: http://www.i2osig.org + * + * The I2O SIG encourages you to deposit derivative works based on this + * header file at the I2O SIG Web site. Furthermore, to become a Registered + * Developer of the I2O SIG, sign up at the Web site or call 415.750.8352 + * (United States). + ****************************************************************/ + +/********************************************************************* + * I2OUtil.h -- I2O Utility Class Message defintion file + * + * This file contains information presented in Chapter 6 of the I2O + * Specification. + **********************************************************************/ + +#if !defined(I2O_UTILITY_HDR) +#define I2O_UTILITY_HDR + +#define I2OUTIL_REV 1_5_4 /* I2OUtil header file revision string */ + +#if ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/pci/i2omsg.h" /* Include the Base Message file */ +# else +# include "dev/asr/i2omsg.h" +# endif +#else +# include "i2omsg.h" /* Include the Base Message file */ +#endif + + +/* +NOTES: + + Gets, reads, receives, etc. are all even numbered functions. + Sets, writes, sends, etc. are all odd numbered functions. + Functions that both send and receive data can be either but an attempt is made + to use the function number that indicates the greater transfer amount. + Functions that do not send or receive data use odd function numbers. + + Some functions are synonyms like read, receive and send, write. + + All common functions will have a code of less than 0x80. + Unique functions to a class will start at 0x80. + Executive Functions start at 0xA0. + + Utility Message function codes range from 0 - 0x1f + Base Message function codes range from 0x20 - 0xfe + Private Message function code is 0xff. +*/ + +PRAGMA_ALIGN_PUSH + +PRAGMA_PACK_PUSH + +/* Utility Message class functions. */ + +#define I2O_UTIL_NOP 0x00 +#define I2O_UTIL_ABORT 0x01 +#define I2O_UTIL_CLAIM 0x09 +#define I2O_UTIL_CLAIM_RELEASE 0x0B +#define I2O_UTIL_CONFIG_DIALOG 0x10 +#define I2O_UTIL_DEVICE_RESERVE 0x0D +#define I2O_UTIL_DEVICE_RELEASE 0x0F +#define I2O_UTIL_EVENT_ACKNOWLEDGE 0x14 +#define I2O_UTIL_EVENT_REGISTER 0x13 +#define I2O_UTIL_LOCK 0x17 +#define I2O_UTIL_LOCK_RELEASE 0x19 +#define I2O_UTIL_PARAMS_GET 0x06 +#define I2O_UTIL_PARAMS_SET 0x05 +#define I2O_UTIL_REPLY_FAULT_NOTIFY 0x15 + +/****************************************************************************/ + +/* ABORT Abort type defines. */ + +#define I2O_ABORT_TYPE_EXACT_ABORT 0x00 +#define I2O_ABORT_TYPE_FUNCTION_ABORT 0x01 +#define I2O_ABORT_TYPE_TRANSACTION_ABORT 0x02 +#define I2O_ABORT_TYPE_WILD_ABORT 0x03 +#define I2O_ABORT_TYPE_CLEAN_EXACT_ABORT 0x04 +#define I2O_ABORT_TYPE_CLEAN_FUNCTION_ABORT 0x05 +#define I2O_ABORT_TYPE_CLEAN_TRANSACTION_ABORT 0x06 +#define I2O_ABORT_TYPE_CLEAN_WILD_ABORT 0x07 + +/* UtilAbort Function Message Frame structure. */ + +typedef struct _I2O_UTIL_ABORT_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +# if (defined(_DPT_BIG_ENDIAN) || defined(sparc)) + U32 reserved; +# else + U16 reserved; + U8 AbortType; + U8 FunctionToAbort; +# endif + I2O_TRANSACTION_CONTEXT TransactionContextToAbort; +} I2O_UTIL_ABORT_MESSAGE, *PI2O_UTIL_ABORT_MESSAGE; + + +typedef struct _I2O_UTIL_ABORT_REPLY { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 CountOfAbortedMessages; +} I2O_UTIL_ABORT_REPLY, *PI2O_UTIL_ABORT_REPLY; + + +/****************************************************************************/ + +/* Claim Flag defines */ + +#define I2O_CLAIM_FLAGS_EXCLUSIVE 0x0001 /* Reserved */ +#define I2O_CLAIM_FLAGS_RESET_SENSITIVE 0x0002 +#define I2O_CLAIM_FLAGS_STATE_SENSITIVE 0x0004 +#define I2O_CLAIM_FLAGS_CAPACITY_SENSITIVE 0x0008 +#define I2O_CLAIM_FLAGS_PEER_SERVICE_DISABLED 0x0010 +#define I2O_CLAIM_FLAGS_MGMT_SERVICE_DISABLED 0x0020 + +/* Claim Type defines */ + +#define I2O_CLAIM_TYPE_PRIMARY_USER 0x01 +#define I2O_CLAIM_TYPE_AUTHORIZED_USER 0x02 +#define I2O_CLAIM_TYPE_SECONDARY_USER 0x03 +#define I2O_CLAIM_TYPE_MANAGEMENT_USER 0x04 + +/* UtilClaim Function Message Frame structure. */ + +typedef struct _I2O_UTIL_CLAIM_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 ClaimFlags; + U8 reserved; + U8 ClaimType; +} I2O_UTIL_CLAIM_MESSAGE, *PI2O_UTIL_CLAIM_MESSAGE; + + +/****************************************************************************/ + +/* Claim Release Flag defines */ + +#define I2O_RELEASE_FLAGS_CONDITIONAL 0x0001 + +/* UtilClaimRelease Function Message Frame structure. */ + +typedef struct _I2O_UTIL_CLAIM_RELEASE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U16 ReleaseFlags; + U8 reserved; + U8 ClaimType; +} I2O_UTIL_CLAIM_RELEASE_MESSAGE, *PI2O_UTIL_CLAIM_RELEASE_MESSAGE; + + +/****************************************************************************/ + +/* UtilConfigDialog Function Message Frame structure */ + +typedef struct _I2O_UTIL_CONFIG_DIALOG_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 PageNumber; + I2O_SG_ELEMENT SGL; +} I2O_UTIL_CONFIG_DIALOG_MESSAGE, *PI2O_UTIL_CONFIG_DIALOG_MESSAGE; + + +/****************************************************************************/ + +/* Event Acknowledge Function Message Frame structure */ + +typedef struct _I2O_UTIL_EVENT_ACK_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 EventIndicator; + U32 EventData[1]; +} I2O_UTIL_EVENT_ACK_MESSAGE, *PI2O_UTIL_EVENT_ACK_MESSAGE; + +/* Event Ack Reply structure */ + +typedef struct _I2O_UTIL_EVENT_ACK_REPLY { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 EventIndicator; + U32 EventData[1]; +} I2O_UTIL_EVENT_ACK_REPLY, *PI2O_UTIL_EVENT_ACK_REPLY; + + +/****************************************************************************/ + +/* Event Indicator Mask Flags */ + +#define I2O_EVENT_IND_STATE_CHANGE 0x80000000 +#define I2O_EVENT_IND_GENERAL_WARNING 0x40000000 +#define I2O_EVENT_IND_CONFIGURATION_FLAG 0x20000000 +/* #define I2O_EVENT_IND_RESERVE_RELEASE 0x10000000 */ +#define I2O_EVENT_IND_LOCK_RELEASE 0x10000000 +#define I2O_EVENT_IND_CAPABILITY_CHANGE 0x08000000 +#define I2O_EVENT_IND_DEVICE_RESET 0x04000000 +#define I2O_EVENT_IND_EVENT_MASK_MODIFIED 0x02000000 +#define I2O_EVENT_IND_FIELD_MODIFIED 0x01000000 +#define I2O_EVENT_IND_VENDOR_EVENT 0x00800000 +#define I2O_EVENT_IND_DEVICE_STATE 0x00400000 + +/* Event Data for generic Events */ + +#define I2O_EVENT_STATE_CHANGE_NORMAL 0x00 +#define I2O_EVENT_STATE_CHANGE_SUSPENDED 0x01 +#define I2O_EVENT_STATE_CHANGE_RESTART 0x02 +#define I2O_EVENT_STATE_CHANGE_NA_RECOVER 0x03 +#define I2O_EVENT_STATE_CHANGE_NA_NO_RECOVER 0x04 +#define I2O_EVENT_STATE_CHANGE_QUIESCE_REQUEST 0x05 +#define I2O_EVENT_STATE_CHANGE_FAILED 0x10 +#define I2O_EVENT_STATE_CHANGE_FAULTED 0x11 + +#define I2O_EVENT_GEN_WARNING_NORMAL 0x00 +#define I2O_EVENT_GEN_WARNING_ERROR_THRESHOLD 0x01 +#define I2O_EVENT_GEN_WARNING_MEDIA_FAULT 0x02 + +#define I2O_EVENT_CAPABILITY_OTHER 0x01 +#define I2O_EVENT_CAPABILITY_CHANGED 0x02 + +#define I2O_EVENT_SENSOR_STATE_CHANGED 0x01 + + +/* UtilEventRegister Function Message Frame structure */ + +typedef struct _I2O_UTIL_EVENT_REGISTER_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 EventMask; +} I2O_UTIL_EVENT_REGISTER_MESSAGE, *PI2O_UTIL_EVENT_REGISTER_MESSAGE; + +/* UtilEventRegister Reply structure */ + +typedef struct _I2O_UTIL_EVENT_REGISTER_REPLY { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 EventIndicator; + U32 EventData[1]; +} I2O_UTIL_EVENT_REGISTER_REPLY, *PI2O_UTIL_EVENT_REGISTER_REPLY; + + +/****************************************************************************/ + +/* UtilLock Function Message Frame structure. */ + +typedef struct _I2O_UTIL_LOCK_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_UTIL_LOCK_MESSAGE, *PI2O_UTIL_LOCK_MESSAGE; + +/****************************************************************************/ + +/* UtilLockRelease Function Message Frame structure. */ + +typedef struct _I2O_UTIL_LOCK_RELEASE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_UTIL_LOCK_RELEASE_MESSAGE, *PI2O_UTIL_LOCK_RELEASE_MESSAGE; + + +/****************************************************************************/ + +/* UtilNOP Function Message Frame structure. */ + +typedef struct _I2O_UTIL_NOP_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; +} I2O_UTIL_NOP_MESSAGE, *PI2O_UTIL_NOP_MESSAGE; + + +/****************************************************************************/ + +/* UtilParamsGet Message Frame structure. */ + +typedef struct _I2O_UTIL_PARAMS_GET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 OperationFlags; + I2O_SG_ELEMENT SGL; +} I2O_UTIL_PARAMS_GET_MESSAGE, *PI2O_UTIL_PARAMS_GET_MESSAGE; + + +/****************************************************************************/ + +/* UtilParamsSet Message Frame structure. */ + +typedef struct _I2O_UTIL_PARAMS_SET_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U32 OperationFlags; + I2O_SG_ELEMENT SGL; +} I2O_UTIL_PARAMS_SET_MESSAGE, *PI2O_UTIL_PARAMS_SET_MESSAGE; + + +/****************************************************************************/ + +/* UtilReplyFaultNotify Message for Message Failure. */ + +typedef struct _I2O_UTIL_REPLY_FAULT_NOTIFY_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; + U8 LowestVersion; + U8 HighestVersion; + BF Severity:I2O_FAILCODE_SEVERITY_SZ; + BF FailureCode:I2O_FAILCODE_CODE_SZ; + BF FailingIOP_ID:I2O_IOP_ID_SZ; + BF reserved:I2O_RESERVED_4BITS; + BF FailingHostUnitID:I2O_UNIT_ID_SZ; + U32 AgeLimit; +#if I2O_64BIT_CONTEXT + PI2O_MESSAGE_FRAME OriginalMFA; +#else + PI2O_MESSAGE_FRAME OriginalMFALowPart; + U32 OriginalMFAHighPart; /* Always 0000 */ +#endif +} I2O_UTIL_REPLY_FAULT_NOTIFY_MESSAGE, *PI2O_UTIL_REPLY_FAULT_NOTIFY_MESSAGE; + + +/****************************************************************************/ + +/* Device Reserve Function Message Frame structure. */ +/* NOTE: This was previously called the Reserve Message */ + +typedef struct _I2O_UTIL_DEVICE_RESERVE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_UTIL_DEVICE_RESERVE_MESSAGE, *PI2O_UTIL_DEVICE_RESERVE_MESSAGE; + + +/****************************************************************************/ + +/* Device Release Function Message Frame structure. */ +/* NOTE: This was previously called the ReserveRelease Message */ + +typedef struct _I2O_UTIL_DEVICE_RELEASE_MESSAGE { + I2O_MESSAGE_FRAME StdMessageFrame; + I2O_TRANSACTION_CONTEXT TransactionContext; +} I2O_UTIL_DEVICE_RELEASE_MESSAGE, *PI2O_UTIL_DEVICE_RELEASE_MESSAGE; + + +/****************************************************************************/ + +PRAGMA_PACK_POP +PRAGMA_ALIGN_POP + +#endif /* I2O_UTILITY_HDR */ diff --git a/sys/dev/asr/osd_defs.h b/sys/dev/asr/osd_defs.h new file mode 100644 index 0000000..8959134 --- /dev/null +++ b/sys/dev/asr/osd_defs.h @@ -0,0 +1,80 @@ +/* $FreeBSD$ */ +/* BSDI osd_defs.h,v 1.4 1998/06/03 19:14:58 karels Exp */ +/* + * Copyright (c) 1996-1999 Distributed Processing Technology Corporation + * All rights reserved. + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + */ + +#ifndef _OSD_DEFS_H +#define _OSD_DEFS_H + +/*File - OSD_DEFS.H + **************************************************************************** + * + *Description: + * + * This file contains the OS dependent defines. This file is included + *in osd_util.h and provides the OS specific defines for that file. + * + *Copyright Distributed Processing Technology, Corp. + * 140 Candace Dr. + * Maitland, Fl. 32751 USA + * Phone: (407) 830-5522 Fax: (407) 260-5366 + * All Rights Reserved + * + *Author: Doug Anderson + *Date: 1/31/94 + * + *Editors: + * + *Remarks: + * + * + *****************************************************************************/ + + +/*Definitions - Defines & Constants ----------------------------------------- */ + + /* Define the operating system */ +#if (defined(__linux__)) +# define _DPT_LINUX +#elif (defined(__bsdi__)) +# define _DPT_BSDI +#elif (defined(__FreeBSD__)) +# define _DPT_FREE_BSD +#else +# define _DPT_SCO +#endif + +#if defined (ZIL_CURSES) +#define _DPT_CURSES +#else +#define _DPT_MOTIF +#endif + + /* Redefine 'far' to nothing - no far pointer type required in UNIX */ +#define far + + /* Define the mutually exclusive semaphore type */ +#define SEMAPHORE_T unsigned int * + /* Define a handle to a DLL */ +#define DLL_HANDLE_T unsigned int * + +#endif diff --git a/sys/dev/asr/osd_unix.h b/sys/dev/asr/osd_unix.h new file mode 100644 index 0000000..d283aff --- /dev/null +++ b/sys/dev/asr/osd_unix.h @@ -0,0 +1,590 @@ +/* $FreeBSD$ */ +/* BSDI osd_unix.h,v 1.7 1998/06/03 19:14:58 karels Exp */ + +/* + * Copyright (c) 1996-1999 Distributed Processing Technology Corporation + * All rights reserved. + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + */ + +#ifndef __OSD_UNIX_H +#define __OSD_UNIX_H + +/*File - OSD_UNIX.H */ +/*****************************************************************************/ +/* */ +/*Description: */ +/* */ +/* This file contains definitions for the UNIX OS dependent layer of the */ +/*DPT engine. */ +/* */ +/*Copyright Distributed Processing Technology, Corp. */ +/* 140 Candace Dr. */ +/* Maitland, Fl. 32751 USA */ +/* Phone: (407) 830-5522 Fax: (407) 260-5366 */ +/* All Rights Reserved */ +/* */ +/*Author: Bob Pasteur */ +/*Date: 5/28/93 */ +/* */ +/*Editors: */ +/* 3/7/96 salyzyn@dpt.com */ +/* Added BSDi extensions */ +/* 30/9/99 salyzyn@dpt.com */ +/* Added I2ORESCANCMD */ +/* 7/12/99 salyzyn@dpt.com */ +/* Added I2ORESETCMD */ +/* */ +/*Remarks: */ +/* */ +/* */ +/*****************************************************************************/ + +/* Definitions - Defines & Constants ---------------------------------------*/ + +#define DPT_TurnAroundKey 0x01 /* TurnAround Message Type for engine */ +#define DPT_EngineKey 0x02 /* Message Que and Type for engine */ +#define DPT_LoggerKey 0x03 /* Message Type For Logger */ +#define DPT_CommEngineKey 0x04 /* Message Que Type Created */ + +#define MSG_RECEIVE 0x40000000 /* Ored Into Logger PID For Return Msg */ + +#define ENGMSG_ECHO 0x00 /* Turnarround Echo Engine Message */ +#define ENGMSG_OPEN 0x01 /* Turnarround Open Engine Message */ +#define ENGMSG_CLOSE 0x02 /* Turnarround Close Engine Message */ + + /* Message Que Creation Flags */ + +#define MSG_URD 00400 +#define MSG_UWR 00200 +#define MSG_GRD 00040 +#define MSG_GWR 00020 +#define MSG_ORD 00004 +#define MSG_OWR 00002 +#define MSG_ALLRD 00444 +#define MSG_ALLWR 00222 + + /* Message Que Creation Flags */ + +#define SHM_URD 00400 +#define SHM_UWR 00200 +#define SHM_GRD 00040 +#define SHM_GWR 00020 +#define SHM_ORD 00004 +#define SHM_OWR 00002 +#define SHM_ALLRD 00444 +#define SHM_ALLWR 00222 + + /* Program Exit Codes */ + +#define ExitGoodStatus 0 +#define ExitBadParameter 1 +#define ExitSignalFail 3 +#define ExitMsqAllocFail 5 +#define ExitBuffAllocFail 6 +#define ExitMsgSendFail 8 +#define ExitMsgReceiveFail 9 + +#define ExitEngOpenFail 10 +#define ExitDuplicateEngine 11 + +#define ExitCommAllocFail 12 +#define ExitDuplicateCommEng 13 +#define ExitCommConnectFail 14 + +#ifndef MAX_HAS + +#define MAX_HAS 18 +#define MAX_NAME 100 + +#endif /* ifndef MAX_HAS */ + + +typedef struct { + uCHAR ConfigLength[4]; /* Len in bytes after this field. */ + uCHAR EATAsignature[4]; + uCHAR EATAversion; + uCHAR Flags1; + uCHAR PadLength[2]; + uCHAR HBA[4]; + uCHAR CPlength[4]; /* Command Packet Length */ + uCHAR SPlength[4]; /* Status Packet Length */ + uCHAR QueueSize[2]; /* Controller Que depth */ + uCHAR SG_Size[4]; + uCHAR Flags2; + uCHAR Reserved0; /* Reserved Field */ + uCHAR Flags3; + uCHAR ScsiValues; + uCHAR MaxLUN; /* Maximun LUN Supported */ + uCHAR Flags4; + uCHAR RaidNum; /* RAID HBA Number For Stripping */ + uCHAR Reserved3; /* Reserved Field */ + } DptReadConfig_t; + +#if defined ( _DPT_SOLARIS ) + +#include +#include +#include +#include +//#define _KERNEL +#include +#include +#include +//#undef _KERNEL + +#undef MSG_DISCONNECT +#define MSG_DISCONNECT 0x11L + +#define EATAUSRCMD 1 +#define DPT_SIGNATURE 2 +#define DPT_NUMCTRLS 3 +#define DPT_CTRLINFO 4 +#define DPT_SYSINFO 5 +#define DPT_BLINKLED 6 +#define I2OUSRCMD 7 +//#define I2ORESCANCMD 8 /* Use DPT_IO_ACCESS instead */ +//#define I2ORESETCMD 9 /* Use DPT_IO_ACCESS instead */ + +#define DPT_MAX_DMA_SEGS 32 /* Max used Scatter/Gather seg */ + +struct dpt_sg { + paddr_t data_addr; + uLONG data_len; + }; + +typedef struct { + uSHORT NumHBAs; + uLONG IOAddrs[18]; + } GetHbaInfo_t; + +#elif defined(_DPT_DGUX) + +#ifndef _IOWR +# define _IOWR(x,y,z) (0x0fff3900|y) +#endif +#ifndef _IOW +# define _IOW(x,y,z) (0x0fff3900|y) +#endif +#ifndef _IOR +# define _IOR(x,y,z) (0x0fff3900|y) +#endif +#ifndef _IO +# define _IO(x,y) (0x0fff3900|y) +#endif +/* EATA PassThrough Command */ +#define EATAUSRCMD _IOWR('D',65,EATA_CP) +/* Get Signature Structure */ +#define DPT_SIGNATURE _IOR('D',67,dpt_sig_S) +/* Get Number Of DPT Adapters */ +#define DPT_NUMCTRLS _IOR('D',68,int) +/* Get Adapter Info Structure */ +#define DPT_CTRLINFO _IOR('D',69,CtrlInfo) +/* Get System Info Structure */ +#define DPT_SYSINFO _IOR('D',72,sysInfo_S) +/* Get Blink LED Code */ +#define DPT_BLINKLED _IOR('D',75,int) +/* Get Statistical information (if available) */ +#define DPT_STATS_INFO _IOR('D',80,STATS_DATA) +/* Clear the statistical information */ +#define DPT_STATS_CLEAR _IO('D',81) +/* Send an I2O command */ +#define I2OUSRCMD _IO('D',76) +/* Inform driver to re-acquire LCT information */ +#define I2ORESCANCMD _IO('D',77) +/* Inform driver to reset adapter */ +#define I2ORESETCMD _IO('D',78) + +#elif defined (SNI_MIPS) + /* Unix Ioctl Command definitions */ + +#define EATAUSRCMD (('D'<<8)|65) +#define DPT_DEBUG (('D'<<8)|66) +#define DPT_SIGNATURE (('D'<<8)|67) +#define DPT_NUMCTRLS (('D'<<8)|68) +#define DPT_CTRLINFO (('D'<<8)|69) +#define DPT_STATINFO (('D'<<8)|70) +#define DPT_CLRSTAT (('D'<<8)|71) +#define DPT_SYSINFO (('D'<<8)|72) +/* Set Timeout Value */ +#define DPT_TIMEOUT (('D'<<8)|73) +/* Get config Data */ +#define DPT_CONFIG (('D'<<8)|74) +/* Get config Data */ +#define DPT_BLINKLED (('D'<<8)|75) +/* Get Statistical information (if available) */ +#define DPT_STATS_INFO (('D'<<8)|80) +/* Clear the statistical information */ +#define DPT_STATS_CLEAR (('D'<<8)|81) +/* Send an I2O command */ +#define I2OUSRCMD (('D'<<8)|76) +/* Inform driver to re-acquire LCT information */ +#define I2ORESCANCMD (('D'<<8)|77) +/* Inform driver to reset adapter */ +#define I2ORESETCMD (('D'<<8)|78) + +#else + + /* Unix Ioctl Command definitions */ + +#ifdef _DPT_AIX + +#undef _IOWR +#undef _IOW +#undef _IOR +#undef _IO +#endif + +#ifndef _IOWR +# define _IOWR(x,y,z) (((x)<<8)|y) +#endif +#ifndef _IOW +# define _IOW(x,y,z) (((x)<<8)|y) +#endif +#ifndef _IOR +# define _IOR(x,y,z) (((x)<<8)|y) +#endif +#ifndef _IO +# define _IO(x,y) (((x)<<8)|y) +#endif +/* EATA PassThrough Command */ +#define EATAUSRCMD _IOWR('D',65,EATA_CP) +/* Set Debug Level If Enabled */ +#define DPT_DEBUG _IOW('D',66,int) +/* Get Signature Structure */ +#define DPT_SIGNATURE _IOR('D',67,dpt_sig_S) +#if defined __bsdi__ +#define DPT_SIGNATURE_PACKED _IOR('D',67,dpt_sig_S_Packed) +#endif +/* Get Number Of DPT Adapters */ +#define DPT_NUMCTRLS _IOR('D',68,int) +/* Get Adapter Info Structure */ +#define DPT_CTRLINFO _IOR('D',69,CtrlInfo) +/* Get Statistics If Enabled */ +#define DPT_STATINFO _IO('D',70) +/* Clear Stats If Enabled */ +#define DPT_CLRSTAT _IO('D',71) +/* Get System Info Structure */ +#define DPT_SYSINFO _IOR('D',72,sysInfo_S) +/* Set Timeout Value */ +#define DPT_TIMEOUT _IO('D',73) +/* Get config Data */ +#define DPT_CONFIG _IO('D',74) +/* Get Blink LED Code */ +#define DPT_BLINKLED _IOR('D',75,int) +/* Get Statistical information (if available) */ +#define DPT_STATS_INFO _IOR('D',80,STATS_DATA) +/* Clear the statistical information */ +#define DPT_STATS_CLEAR _IO('D',81) +/* Get Performance metrics */ +#define DPT_PERF_INFO _IOR('D',82,dpt_perf_t) +/* Send an I2O command */ +#define I2OUSRCMD _IO('D',76) +/* Inform driver to re-acquire LCT information */ +#define I2ORESCANCMD _IO('D',77) +/* Inform driver to reset adapter */ +#define I2ORESETCMD _IO('D',78) +#if defined _DPT_LINUX +/* See if the target is mounted */ +#define DPT_TARGET_BUSY _IOR('D',79, TARGET_BUSY_T) +#endif + + +#endif /* _DPT_SOLARIS else */ + + /* Adapter Flags Field Bit Definitions */ + +#define CTLR_INSTALLED 0x00000001 /* Adapter Was Installed */ +#define CTLR_DMA 0x00000002 /* DMA Supported */ +#define CTLR_OVERLAP 0x00000004 /* Overlapped Commands Support */ +#define CTLR_SECONDARY 0x00000008 /* I/O Address Not 0x1f0 */ +#define CTLR_BLINKLED 0x00000010 /* Adapter In Blink LED State */ +#define CTLR_HBACI 0x00000020 /* Cache Inhibit Supported */ +#define CTLR_CACHE 0x00000040 /* Adapter Has Cache */ +#define CTLR_SANE 0x00000080 /* Adapter Functioning OK */ +#define CTLR_BUS_QUIET 0x00000100 /* Bus Quite On This Adapter */ +#define CTLR_ABOVE_16 0x00000200 /* Support For Mem. Above 16 MB */ +#define CTLR_SCAT_GATH 0x00000400 /* Scatter Gather Supported */ + + +/* Definitions - Structure & Typedef ---------------------------------------*/ + +typedef struct { + uLONG MsgID; + DPT_TAG_T engineTag; + DPT_TAG_T targetTag; + DPT_MSG_T engEvent; + long BufferID; + uLONG FromEngBuffOffset; + uLONG callerID; + DPT_RTN_T result; + uLONG timeOut; + } MsgHdr; + +#define MsgDataSize sizeof(MsgHdr) - 4 + +#ifndef SNI_MIPS + +/*-------------------------------------------------------------------------*/ +/* EATA Command Packet definition */ +/*-------------------------------------------------------------------------*/ + +typedef struct EATACommandPacket { + +#ifdef _DPT_UNIXWARE + + uCHAR EataID[4]; + uINT EataCmd; + uCHAR *CmdBuffer; + +#endif /* _DPT_UNIXWARE */ + +#ifdef _DPT_AIX + + uCHAR HbaTargetID; + uCHAR HbaLUN; + +#endif /* _DPT_AIX */ + + uCHAR cp_Flags1; /* Command Flags */ + uCHAR cp_Req_Len; /* AutoRequestSense Data length. */ + uCHAR cp_Resv1[3]; /* Reserved Fields */ + uCHAR cp_Flags2; + uCHAR cp_Flags3; + uCHAR cp_ScsiAddr; + uCHAR cp_msg0; /* Identify and Disconnect Message. */ + uCHAR cp_msg1; + uCHAR cp_msg2; + uCHAR cp_msg3; + uCHAR cp_cdb[12]; /* SCSI cdb for command. */ + uLONG cp_dataLen; /* Data length in Bytes for command. */ + uLONG cp_Vue; /* Vendor Unique Area */ + uCHAR *cp_DataAddr; /* Data Address For The Command. */ + uCHAR *cp_SpAddr; /* Status Packet Physical Address. */ + uCHAR *cp_SenseAddr; /* AutoRequestSense Data Phy Address. */ + +#ifdef _DPT_SOLARIS + + uCHAR HostStatus; + uCHAR TargetStatus; + uCHAR CdbLength; + uCHAR SG_Size; + struct scsi_arq_status ReqSenseData; + struct dpt_sg SG_List[DPT_MAX_DMA_SEGS]; + union { + char *b_scratch; + struct scsi_cmd *b_ownerp; + } cc; + paddr_t ccb_paddr; + uSHORT IOAddress; + +#else /* _DPT_SOLARIS */ + + uLONG TimeOut ; + uCHAR HostStatus; + uCHAR TargetStatus; + uCHAR Retries; + +#endif /* _DPT_SOLARIS else */ + + } EATA_CP; +#endif // SNI_MIPS + + + /* Control Flags 1 Definitions */ + +#define SCSI_RESET 0x01 /* Cause a SCSI Bus reset on the cmd */ +#define HBA_INIT 0x02 /* Cause Controller to reInitialize */ +#define AUTO_REQ_SENSE 0x04 /* Do Auto Request Sense on errors */ +#define SCATTER_GATHER 0x08 /* Data Ptr points to a SG Packet */ +#define INTERPRET 0x20 /* Interpret the SCSI cdb of own use */ +#define DATA_OUT 0x04 /* Data Out phase with command */ +#define DATA_IN 0x08 /* Data In phase with command */ + + /* Control Flags 2 Definitions */ + +#define FIRMWARE_NESTED 0x01 + + + /* Control Flags 3 Definitions */ + +#define PHYSICAL_UNIT 0x01 /* Send Command Directly To Target */ +#define IAT 0x02 /* Inhibit Address Translation */ +#define HBACI 0x04 /* Inhibit Caching */ + + + /* Structure Returned From Get Controller Info */ + +typedef struct { + + uCHAR state; /* Operational state */ + uCHAR id; /* Host adapter SCSI id */ + int vect; /* Interrupt vector number */ + int base; /* Base I/O address */ + int njobs; /* # of jobs sent to HA */ + int qdepth; /* Controller queue depth. */ + int wakebase; /* mpx wakeup base index. */ + uLONG SGsize; /* Scatter/Gather list size. */ + unsigned heads; /* heads for drives on cntlr. */ + unsigned sectors; /* sectors for drives on cntlr. */ + uCHAR do_drive32; /* Flag for Above 16 MB Ability */ + uCHAR BusQuiet; /* SCSI Bus Quiet Flag */ + char idPAL[4]; /* 4 Bytes Of The ID Pal */ + uCHAR primary; /* 1 For Primary, 0 For Secondary */ + uCHAR eataVersion; /* EATA Version */ + uLONG cpLength; /* EATA Command Packet Length */ + uLONG spLength; /* EATA Status Packet Length */ + uCHAR drqNum; /* DRQ Index (0,5,6,7) */ + uCHAR flag1; /* EATA Flags 1 (Byte 9) */ + uCHAR flag2; /* EATA Flags 2 (Byte 30) */ + + } CtrlInfo; + +#ifndef SNI_MIPS +#ifdef _DPT_UNIXWARE + +typedef struct { + + uINT state; /* Operational state */ + uCHAR id[4]; /* Host adapter SCSI id */ + uINT vect; /* Interrupt vector number */ + uLONG base; /* Base I/O address */ + int ha_max_jobs; /* Max number of Active Jobs */ + uLONG ha_cacheParams; + int ha_nbus; /* Number Of Busses on HBA */ + int ha_ntargets; /* Number Of Targets Supported */ + int ha_nluns; /* Number Of LUNs Supported */ + int ha_tshift; /* Shift value for target */ + int ha_bshift; /* Shift value for bus */ + uINT ha_npend; /* # of jobs sent to HA */ + int ha_active_jobs; /* Number Of Active Jobs */ + + } HbaInfo; + + /* SDI ioctl prefix for hba specific ioctl's */ + +#define SDI_IOC (('S'<<24)|('D'<<16)|('I'<<8)) + +#define SDI_HBANAME ((SDI_IOC)|0x14) /* Get HBA module name */ +#define SDI_SEND 0x0081 /* Send a SCSI command */ + +#else + +typedef struct { + + uLONG flags; /* Operational State Flags */ + uCHAR id[4]; /* Host Adapter SCSI ID */ + int vect; /* Interrupt Vector Number */ + int base; /* Base I/O Address */ + int njobs; /* # Of CCBs Outstanding To HBA */ + int qdepth; /* Controller Queue depth. */ + uLONG SGsize; /* Scatter/Gather List Size. */ + char idPAL[4]; /* 4 Bytes Of The ID Pal */ + uCHAR eataVersion; /* EATA Version */ + uLONG cpLength; /* EATA Command Packet Length */ + uLONG spLength; /* EATA Status Packet Length */ + uCHAR drqNum; /* DRQ Index (0,5,6,7) */ + uCHAR eataflag1; /* EATA Flags 1 (Byte 9) */ + uCHAR eataflag2; /* EATA Flags 2 (Byte 30) */ + uCHAR maxChannel; /* Maximum Channel Number */ + uCHAR maxID; /* Maximum Target ID */ + uCHAR maxLUN; /* Maximum LUN */ + uCHAR HbaBusType; /* HBA Bus Type, EISA, PCI, etc */ + uCHAR RaidNum; /* Host Adapter RAID Number */ + + } HbaInfo; + +#endif /* _DPT_UNIXWARE */ +#endif // SNI_MIPS + + +#ifdef _DPT_AIX + +/* + * DPT Host Adapter config information structure - this structure contains + * configuration information about an adapter. It is imbedded into the + * dpt_ctl structure. + */ + +typedef struct dpt_cfg { + uchar flags; /* Operational state flags */ + uchar id[4]; /* Host adapter SCSI IDs */ + int vect; /* Interrupt vector number */ + ulong base_addr; /* Base I/O address */ + int qdepth; /* Controller queue depth. */ + ulong SGsize; /* Max scatter/gather list sz */ + ulong SGmax; /* Max s/g we can use per req */ + uchar eataVersion; /* EATA version */ + ushort cpPadLen; /* # of pad bytes sent to HA for + PIO commands */ + ulong cpLength; /* EATA Command Packet length */ + ulong spLength; /* EATA Status Packet length */ + uchar eataflag1; /* EATA Flags 1 (Byte 9) */ + uchar eataflag2; /* EATA Flags 2 (Byte 30) */ + uchar maxChan; /* Maximum Channel number */ + uchar maxID; /* Maximum target ID */ + uchar maxLUN; /* Maximum LUN */ + uchar HbaBusType; /* HBA bus type, EISA, PCI, etc */ + uchar RaidNum; /* Host adapter RAID number */ +} DptCfg_t; + +#endif /* _DPT_AIX */ + + +#define MAX_ELEMENT_COUNT 64 +#define MAX_BUCKET_COUNT 10 + +/* + * DPT statistics structure definitions + */ +typedef struct IO_SIZE_STATS +{ + uLONG TotalIoCount; + uLONG IoCountRead; + uLONG IoCountReadSg; + uLONG IoCountWrite; + uLONG IoCountWriteSg; + uLONG UnalignedIoAddress; + uLONG SgElementCount[MAX_ELEMENT_COUNT]; + +} IO_SIZE_STATS_T, *pIO_SIZE_STATS_T; + +typedef struct STATS_DATA +{ + uLONG TotalIoCount; + uLONG TotalUnCachedIoCount; + uLONG MaxOutstandingIoCount; + uLONG CurrentOutstandingIoCount; + uLONG OutstandingIoRunningCount; + uLONG UnalignedPktCount; + uLONG UnalignedSgCount; + uLONG NonPageListAddressSgCount; + uLONG MaxMessagesPerInterrupt; + IO_SIZE_STATS_T IoSize[MAX_BUCKET_COUNT]; + +} STATS_DATA_T, *pSTATS_DATA_T; + +typedef struct TARGET_BUSY +{ + uLONG channel; + uLONG id; + uLONG lun; + uLONG isBusy; +} TARGET_BUSY_T; +#endif /* __OSD_UNIX_H */ diff --git a/sys/dev/asr/osd_util.h b/sys/dev/asr/osd_util.h new file mode 100644 index 0000000..fb232c7 --- /dev/null +++ b/sys/dev/asr/osd_util.h @@ -0,0 +1,367 @@ +/* $FreeBSD$ */ +/* BSDI osd_util.h,v 1.8 1998/06/03 19:14:58 karels Exp */ + +/* + * Copyright (c) 1996-1999 Distributed Processing Technology Corporation + * All rights reserved. + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + */ + +#ifndef __OSD_UTIL_H +#define __OSD_UTIL_H + +/*File - OSD_UTIL.H + **************************************************************************** + * + *Description: + * + * This file contains defines and function prototypes that are + *operating system dependent. The resources defined in this file + *are not specific to any particular application. + * + *Copyright Distributed Processing Technology, Corp. + * 140 Candace Dr. + * Maitland, Fl. 32751 USA + * Phone: (407) 830-5522 Fax: (407) 260-5366 + * All Rights Reserved + * + *Author: Doug Anderson + *Date: 1/7/94 + * + *Editors: + * + *Remarks: + * + * + *****************************************************************************/ + + +/*Definitions - Defines & Constants ----------------------------------------- */ + +/*----------------------------- */ +/* Operating system selections: */ +/*----------------------------- */ + +/*#define _DPT_MSDOS */ +/*#define _DPT_WIN_3X */ +/*#define _DPT_WIN_4X */ +/*#define _DPT_WIN_NT */ +/*#define _DPT_NETWARE */ +/*#define _DPT_OS2 */ +/*#define _DPT_SCO */ +/*#define _DPT_UNIXWARE */ +/*#define _DPT_SOLARIS */ +/*#define _DPT_NEXTSTEP */ +/*#define _DPT_BANYAN */ + +/*-------------------------------- */ +/* Include the OS specific defines */ +/*-------------------------------- */ + +/*#define OS_SELECTION From Above List */ +/*#define SEMAPHORE_T ??? */ +/*#define DLL_HANDLE_T ??? */ + +#if (defined(KERNEL) && defined(__bsdi__)) +# include "i386/isa/dpt_osd_defs.h" +#elif ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/isa/dpt_osd_defs.h" +# else +# include "dev/asr/osd_defs.h" +# endif +#else +# include "osd_defs.h" +#endif + +#ifndef DPT_UNALIGNED + #define DPT_UNALIGNED +#endif + +#ifndef DPT_EXPORT + #define DPT_EXPORT +#endif + +#ifndef DPT_IMPORT + #define DPT_IMPORT +#endif + +#ifndef DPT_RUNTIME_IMPORT + #define DPT_RUNTIME_IMPORT DPT_IMPORT +#endif + +/*--------------------- */ +/* OS dependent defines */ +/*--------------------- */ + +#if defined (_DPT_MSDOS) || defined (_DPT_WIN_3X) + #define _DPT_16_BIT +#else + #define _DPT_32_BIT +#endif + +#if defined (_DPT_SCO) || defined (_DPT_UNIXWARE) || defined (_DPT_SOLARIS) || defined (_DPT_AIX) || defined (SNI_MIPS) || defined (_DPT_BSDI) || defined (_DPT_FREE_BSD) || defined(_DPT_LINUX) + #define _DPT_UNIX +#endif + +#if defined (_DPT_WIN_3x) || defined (_DPT_WIN_4X) || defined (_DPT_WIN_NT) \ + || defined (_DPT_OS2) + #define _DPT_DLL_SUPPORT +#endif + +#if !defined (_DPT_MSDOS) && !defined (_DPT_WIN_3X) && !defined (_DPT_NETWARE) + #define _DPT_PREEMPTIVE +#endif + +#if !defined (_DPT_MSDOS) && !defined (_DPT_WIN_3X) + #define _DPT_MULTI_THREADED +#endif + +#if !defined (_DPT_MSDOS) + #define _DPT_MULTI_TASKING +#endif + + /* These exist for platforms that */ + /* chunk when accessing mis-aligned */ + /* data */ +#if defined (SNI_MIPS) || defined (_DPT_SOLARIS) + #if defined (_DPT_BIG_ENDIAN) + #if !defined (_DPT_STRICT_ALIGN) + #define _DPT_STRICT_ALIGN + #endif + #endif +#endif + + /* Determine if in C or C++ mode */ +#ifdef __cplusplus + #define _DPT_CPP +#else + #define _DPT_C +#endif + +/*-------------------------------------------------------------------*/ +/* Under Solaris the compiler refuses to accept code like: */ +/* { {"DPT"}, 0, NULL .... }, */ +/* and complains about the {"DPT"} part by saying "cannot use { } */ +/* to initialize char*". */ +/* */ +/* By defining these ugly macros we can get around this and also */ +/* not have to copy and #ifdef large sections of code. I know that */ +/* these macros are *really* ugly, but they should help reduce */ +/* maintenance in the long run. */ +/* */ +/* In the meantime, just pray that we can all move to Win32 as soon */ +/* as possible... */ +/*-------------------------------------------------------------------*/ +#if !defined (DPTSQO) + #if defined (_DPT_SOLARIS) + #define DPTSQO + #define DPTSQC + #else + #define DPTSQO { + #define DPTSQC } + #endif /* solaris */ +#endif /* DPTSQO */ + + +/*---------------------- */ +/* OS dependent typedefs */ +/*---------------------- */ + +#if defined (_DPT_MSDOS) || defined (_DPT_SCO) + #define BYTE unsigned char + #define WORD unsigned short +#endif + +#ifndef _DPT_TYPEDEFS + #define _DPT_TYPEDEFS + typedef unsigned char uCHAR; + typedef unsigned short uSHORT; + typedef unsigned int uINT; + typedef unsigned long uLONG; + + typedef union { + uCHAR u8[4]; + uSHORT u16[2]; + uLONG u32; + } access_U; +#endif + +#if !defined (NULL) + #define NULL 0 +#endif + + +/*Prototypes - function ----------------------------------------------------- */ + +#ifdef __cplusplus + extern "C" { /* Declare all these functions as "C" functions */ +#endif + +/*------------------------ */ +/* Byte reversal functions */ +/*------------------------ */ + + /* Reverses the byte ordering of a 2 byte variable */ +#if (!defined(osdSwap2)) + uSHORT osdSwap2(DPT_UNALIGNED uSHORT *); +#endif // !osdSwap2 + + /* Reverses the byte ordering of a 4 byte variable and shifts left 8 bits */ +#if (!defined(osdSwap3)) + uLONG osdSwap3(DPT_UNALIGNED uLONG *); +#endif // !osdSwap3 + + +#ifdef _DPT_NETWARE + #include "novpass.h" /* For DPT_Bswapl() prototype */ + /* Inline the byte swap */ + #ifdef __cplusplus + inline uLONG osdSwap4(uLONG *inLong) { + return *inLong = DPT_Bswapl(*inLong); + } + #else + #define osdSwap4(inLong) DPT_Bswapl(inLong) + #endif // cplusplus +#else + /* Reverses the byte ordering of a 4 byte variable */ +# if (!defined(osdSwap4)) + uLONG osdSwap4(DPT_UNALIGNED uLONG *); +# endif // !osdSwap4 + + /* The following functions ALWAYS swap regardless of the * + * presence of DPT_BIG_ENDIAN */ + + uSHORT trueSwap2(DPT_UNALIGNED uSHORT *); + uLONG trueSwap4(DPT_UNALIGNED uLONG *); + +#endif // netware + + +/*-------------------------------------* + * Network order swap functions * + * * + * These functions/macros will be used * + * by the structure insert()/extract() * + * functions. * + * + * We will enclose all structure * + * portability modifications inside * + * #ifdefs. When we are ready, we * + * will #define DPT_PORTABLE to begin * + * using the modifications. * + *-------------------------------------*/ +uLONG netSwap4(uLONG val); + +#if defined (_DPT_BIG_ENDIAN) + +// for big-endian we need to swap + +#ifndef NET_SWAP_2 +#define NET_SWAP_2(x) (((x) >> 8) | ((x) << 8)) +#endif // NET_SWAP_2 + +#ifndef NET_SWAP_4 +#define NET_SWAP_4(x) netSwap4((x)) +#endif // NET_SWAP_4 + +#else + +/* for little-endian we don't need to do anything */ + +#ifndef NET_SWAP_2 +#define NET_SWAP_2(x) (x) +#endif // NET_SWAP_2 + +#ifndef NET_SWAP_4 +#define NET_SWAP_4(x) (x) +#endif // NET_SWAP_4 + +#endif // big endian + + + +/*----------------------------------- */ +/* Run-time loadable module functions */ +/*----------------------------------- */ + + /* Loads the specified run-time loadable DLL */ +DLL_HANDLE_T osdLoadModule(uCHAR *); + /* Unloads the specified run-time loadable DLL */ +uSHORT osdUnloadModule(DLL_HANDLE_T); + /* Returns a pointer to a function inside a run-time loadable DLL */ +void * osdGetFnAddr(DLL_HANDLE_T,uCHAR *); + +/*--------------------------------------- */ +/* Mutually exclusive semaphore functions */ +/*--------------------------------------- */ + + /* Create a named semaphore */ +SEMAPHORE_T osdCreateNamedSemaphore(char *); + /* Create a mutually exlusive semaphore */ +SEMAPHORE_T osdCreateSemaphore(void); + /* create an event semaphore */ +SEMAPHORE_T osdCreateEventSemaphore(void); + /* create a named event semaphore */ +SEMAPHORE_T osdCreateNamedEventSemaphore(char *); + + /* Destroy the specified mutually exclusive semaphore object */ +uSHORT osdDestroySemaphore(SEMAPHORE_T); + /* Request access to the specified mutually exclusive semaphore */ +uLONG osdRequestSemaphore(SEMAPHORE_T,uLONG); + /* Release access to the specified mutually exclusive semaphore */ +uSHORT osdReleaseSemaphore(SEMAPHORE_T); + /* wait for a event to happen */ +uLONG osdWaitForEventSemaphore(SEMAPHORE_T, uLONG); + /* signal an event */ +uLONG osdSignalEventSemaphore(SEMAPHORE_T); + /* reset the event */ +uLONG osdResetEventSemaphore(SEMAPHORE_T); + +/*----------------- */ +/* Thread functions */ +/*----------------- */ + + /* Releases control to the task switcher in non-preemptive */ + /* multitasking operating systems. */ +void osdSwitchThreads(void); + + /* Starts a thread function */ +uLONG osdStartThread(void *,void *); + +/* what is my thread id */ +uLONG osdGetThreadID(void); + +/* wakes up the specifed thread */ +void osdWakeThread(uLONG); + +/* osd sleep for x miliseconds */ +void osdSleep(uLONG); + +#define DPT_THREAD_PRIORITY_LOWEST 0x00 +#define DPT_THREAD_PRIORITY_NORMAL 0x01 +#define DPT_THREAD_PRIORITY_HIGHEST 0x02 + +uCHAR osdSetThreadPriority(uLONG tid, uCHAR priority); + +#ifdef __cplusplus + } /* end the xtern "C" declaration */ +#endif + +#endif /* osd_util_h */ diff --git a/sys/dev/asr/sys_info.h b/sys/dev/asr/sys_info.h new file mode 100644 index 0000000..41fba37 --- /dev/null +++ b/sys/dev/asr/sys_info.h @@ -0,0 +1,484 @@ +/* $FreeBSD$ */ +/* BSDI sys_info.h,v 1.6 1998/06/03 19:14:59 karels Exp */ + +/* + * Copyright (c) 1996-1999 Distributed Processing Technology Corporation + * All rights reserved. + * + * Redistribution and use in source form, with or without modification, are + * permitted provided that redistributions of source code must retain the + * above copyright notice, this list of conditions and the following disclaimer. + * + * This software is provided `as is' by Distributed Processing Technology and + * any express or implied warranties, including, but not limited to, the + * implied warranties of merchantability and fitness for a particular purpose, + * are disclaimed. In no event shall Distributed Processing Technology be + * liable for any direct, indirect, incidental, special, exemplary or + * consequential damages (including, but not limited to, procurement of + * substitute goods or services; loss of use, data, or profits; or business + * interruptions) however caused and on any theory of liability, whether in + * contract, strict liability, or tort (including negligence or otherwise) + * arising in any way out of the use of this driver software, even if advised + * of the possibility of such damage. + * + */ + +#ifndef __SYS_INFO_H +#define __SYS_INFO_H + +/*File - SYS_INFO.H + **************************************************************************** + * + *Description: + * + * This file contains structure definitions for the OS dependent + *layer system information buffers. + * + *Copyright Distributed Processing Technology, Corp. + * 140 Candace Dr. + * Maitland, Fl. 32751 USA + * Phone: (407) 830-5522 Fax: (407) 260-5366 + * All Rights Reserved + * + *Author: Don Kemper + *Date: 5/10/94 + * + *Editors: + * + *Remarks: + * + * + *****************************************************************************/ + + +/*Include Files ------------------------------------------------------------- */ + +#if (defined(KERNEL) && defined(__bsdi__)) +# include "i386/isa/dpt_osd_util.h" +#elif ((defined(KERNEL) || defined(_KERNEL)) && defined(__FreeBSD__)) +# if (KERN_VERSION < 3) +# include "i386/isa/dpt_osd_util.h" +# else +# include "dev/asr/osd_util.h" +# endif +#else +# include "osd_util.h" +#endif + +#ifndef NO_PACK +#if defined (_DPT_AIX) +#pragma options align=packed +#else +#pragma pack(1) +#endif /* aix */ +#endif // no unpack + + +/*struct - driveParam_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the drive parameters seen during + *booting. + * + *---------------------------------------------------------------------------*/ + +#ifdef __cplusplus + struct driveParam_S { +#else + typedef struct { +#endif + + uSHORT cylinders; /* Upto 1024 */ + uCHAR heads; /* Upto 255 */ + uCHAR sectors; /* Upto 63 */ + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } driveParam_S; +#endif +/*driveParam_S - end */ + + +/*struct - sysInfo_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the command system information that + *should be returned by every OS dependent layer. + * + *---------------------------------------------------------------------------*/ + +/*flags - bit definitions */ +#define SI_CMOS_Valid 0x0001 +#define SI_NumDrivesValid 0x0002 +#define SI_ProcessorValid 0x0004 +#define SI_MemorySizeValid 0x0008 +#define SI_DriveParamsValid 0x0010 +#define SI_SmartROMverValid 0x0020 +#define SI_OSversionValid 0x0040 +#define SI_OSspecificValid 0x0080 /* 1 if OS structure returned */ +#define SI_BusTypeValid 0x0100 + +#define SI_ALL_VALID 0x0FFF /* All Std SysInfo is valid */ +#define SI_NO_SmartROM 0x8000 + +/*busType - definitions */ +#define SI_ISA_BUS 0x00 +#define SI_MCA_BUS 0x01 +#define SI_EISA_BUS 0x02 +#define SI_PCI_BUS 0x04 + +#ifdef __cplusplus + struct sysInfo_S { +#else + typedef struct { +#endif + + uCHAR drive0CMOS; /* CMOS Drive 0 Type */ + uCHAR drive1CMOS; /* CMOS Drive 1 Type */ + uCHAR numDrives; /* 0040:0075 contents */ + uCHAR processorFamily; /* Same as DPTSIG's definition */ + uCHAR processorType; /* Same as DPTSIG's definition */ + uCHAR smartROMMajorVersion; + uCHAR smartROMMinorVersion; /* SmartROM version */ + uCHAR smartROMRevision; + uSHORT flags; /* See bit definitions above */ + uSHORT conventionalMemSize; /* in KB */ + uLONG extendedMemSize; /* in KB */ + uLONG osType; /* Same as DPTSIG's definition */ + uCHAR osMajorVersion; + uCHAR osMinorVersion; /* The OS version */ + uCHAR osRevision; +#ifdef _SINIX_ADDON + uCHAR busType; /* See defininitions above */ + uSHORT osSubRevision; + uCHAR pad[2]; /* For alignment */ +#else + uCHAR osSubRevision; + uCHAR busType; /* See defininitions above */ + uCHAR pad[3]; /* For alignment */ +#endif + driveParam_S drives[16]; /* SmartROM Logical Drives */ + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } sysInfo_S; +#endif +/*sysInfo_S - end */ + + +/*struct - DOS_Info_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the system information specific to a + *DOS workstation. + * + *---------------------------------------------------------------------------*/ + +/*flags - bit definitions */ +#define DI_DOS_HIGH 0x01 /* DOS is loaded high */ +#define DI_DPMI_VALID 0x02 /* DPMI version is valid */ + +#ifdef __cplusplus + struct DOS_Info_S { +#else + typedef struct { +#endif + + uCHAR flags; /* See bit definitions above */ + uSHORT driverLocation; /* SmartROM BIOS address */ + uSHORT DOS_version; + uSHORT DPMI_version; + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } DOS_Info_S; +#endif +/*DOS_Info_S - end */ + + +/*struct - Netware_Info_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the system information specific to a + *Netware machine. + * + *---------------------------------------------------------------------------*/ + +#ifdef __cplusplus + struct Netware_Info_S { +#else + typedef struct { +#endif + + uCHAR driverName[13]; /* ie PM12NW31.DSK */ + uCHAR serverName[48]; + uCHAR netwareVersion; /* The Netware OS version */ + uCHAR netwareSubVersion; + uCHAR netwareRevision; + uSHORT maxConnections; /* Probably 250 or 1000 */ + uSHORT connectionsInUse; + uSHORT maxVolumes; + uCHAR unused; + uCHAR SFTlevel; + uCHAR TTSlevel; + + uCHAR clibMajorVersion; /* The CLIB.NLM version */ + uCHAR clibMinorVersion; + uCHAR clibRevision; + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } Netware_Info_S; +#endif +/*Netware_Info_S - end */ + + +/*struct - OS2_Info_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the system information specific to an + *OS/2 machine. + * + *---------------------------------------------------------------------------*/ + +#ifdef __cplusplus + struct OS2_Info_S { +#else + typedef struct { +#endif + + uCHAR something; + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } OS2_Info_S; +#endif +/*OS2_Info_S - end */ + + +/*struct - WinNT_Info_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the system information specific to a + *Windows NT machine. + * + *---------------------------------------------------------------------------*/ + +#ifdef __cplusplus + struct WinNT_Info_S { +#else + typedef struct { +#endif + + uCHAR something; + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } WinNT_Info_S; +#endif +/*WinNT_Info_S - end */ + + +/*struct - SCO_Info_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the system information specific to an + *SCO UNIX machine. + * + *---------------------------------------------------------------------------*/ + +#ifdef __cplusplus + struct SCO_Info_S { +#else + typedef struct { +#endif + + uCHAR something; + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } SCO_Info_S; +#endif +/*SCO_Info_S - end */ + + +/*struct - USL_Info_S - start + *=========================================================================== + * + *Description: + * + * This structure defines the system information specific to a + *USL UNIX machine. + * + *---------------------------------------------------------------------------*/ + +#ifdef __cplusplus + struct USL_Info_S { +#else + typedef struct { +#endif + + uCHAR something; + +#ifdef __cplusplus + +//---------- Portability Additions ----------- in sp_sinfo.cpp +#ifdef DPT_PORTABLE + uSHORT netInsert(dptBuffer_S *buffer); + uSHORT netExtract(dptBuffer_S *buffer); +#endif // DPT PORTABLE +//-------------------------------------------- + + }; +#else + } USL_Info_S; +#endif +/*USL_Info_S - end */ + + + /* Restore default structure packing */ +#ifndef NO_UNPACK +#if defined (_DPT_AIX) +#pragma options align=reset +#elif defined (UNPACK_FOUR) +#pragma pack(4) +#else +#pragma pack() +#endif /* aix */ +#endif // no unpack + +#ifdef DPT_MEASURE_PERFORMANCE +typedef struct dpt_metrics { + u_int32_t command_count[256]; /* We assume MAX 256 SCSI commands */ + u_int32_t max_command_time[256]; + u_int32_t min_command_time[256]; + + u_int32_t min_intr_time; + u_int32_t max_intr_time; + u_int32_t max_intr_gap; + u_int32_t max_ht_time; + u_int32_t aborted_interrupts; + u_int32_t spurious_interrupts; + u_int32_t aborted_requests; + u_int32_t retried_requests; + + u_int32_t max_waiting_count; + u_int32_t max_submit_count; + u_int32_t max_complete_count; + + u_int32_t min_waiting_time; + u_int32_t min_submit_time; + u_int32_t min_complete_time; + + u_int32_t max_waiting_time; + u_int32_t max_submit_time; + u_int32_t max_complete_time; + + u_int32_t command_collisions; + u_int32_t command_too_busy; + u_int32_t max_eata_tries; + u_int32_t min_eata_tries; + + u_int32_t read_by_size_count[10]; + u_int32_t write_by_size_count[10]; + u_int32_t read_by_size_min_time[10]; + u_int32_t read_by_size_max_time[10]; + struct timeval read_by_size_total_time[10]; + u_int32_t write_by_size_min_time[10]; + u_int32_t write_by_size_max_time[10]; + struct timeval write_by_size_total_time[10]; + +#define SIZE_512 0 +#define SIZE_1K 1 +#define SIZE_2K 2 +#define SIZE_4K 3 +#define SIZE_8K 4 +#define SIZE_16K 5 +#define SIZE_32K 6 +#define SIZE_64K 7 +#define SIZE_BIGGER 8 +#define SIZE_OTHER 9 + + struct timeval intr_started; +} dpt_perf_t; +#endif + +#endif // __SYS_INFO_H + -- cgit v1.1