From ca829de63359cda67703edd7be3645ce04a56a31 Mon Sep 17 00:00:00 2001 From: yongari Date: Mon, 19 Jan 2009 02:31:27 +0000 Subject: Sometimes RTL8168B seems to take long time to access GMII registers in device attach phase. Double GMII register access timeout value to fix the issue. Reported by: wkoszek Tested by: wkoszek --- sys/dev/re/if_re.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'sys/dev/re/if_re.c') diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c index 21b8251..5ae5cc9 100644 --- a/sys/dev/re/if_re.c +++ b/sys/dev/re/if_re.c @@ -418,14 +418,14 @@ re_gmii_readreg(device_t dev, int phy, int reg) CSR_WRITE_4(sc, RL_PHYAR, reg << 16); - for (i = 0; i < RL_TIMEOUT; i++) { + for (i = 0; i < RL_PHY_TIMEOUT; i++) { rval = CSR_READ_4(sc, RL_PHYAR); if (rval & RL_PHYAR_BUSY) break; DELAY(100); } - if (i == RL_TIMEOUT) { + if (i == RL_PHY_TIMEOUT) { device_printf(sc->rl_dev, "PHY read failed\n"); return (0); } @@ -445,14 +445,14 @@ re_gmii_writereg(device_t dev, int phy, int reg, int data) CSR_WRITE_4(sc, RL_PHYAR, (reg << 16) | (data & RL_PHYAR_PHYDATA) | RL_PHYAR_BUSY); - for (i = 0; i < RL_TIMEOUT; i++) { + for (i = 0; i < RL_PHY_TIMEOUT; i++) { rval = CSR_READ_4(sc, RL_PHYAR); if (!(rval & RL_PHYAR_BUSY)) break; DELAY(100); } - if (i == RL_TIMEOUT) { + if (i == RL_PHY_TIMEOUT) { device_printf(sc->rl_dev, "PHY write failed\n"); return (0); } -- cgit v1.1