From 804dbb21fcfa6e9565452f746b24e4f9f5fa84ec Mon Sep 17 00:00:00 2001 From: jhb Date: Tue, 3 May 2016 19:37:25 +0000 Subject: Use the correct location of the SRIOV capability when enabling ARI. While here, check if ARI was enabled by re-reading the config register after writing it and return an error if the write fails. Reviewed by: rstone, vangyzen --- sys/dev/pci/pci_iov.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'sys/dev/pci') diff --git a/sys/dev/pci/pci_iov.c b/sys/dev/pci/pci_iov.c index 287f5a2..337441d 100644 --- a/sys/dev/pci/pci_iov.c +++ b/sys/dev/pci/pci_iov.c @@ -442,6 +442,7 @@ pci_iov_set_ari(device_t bus) } } } + free(devlist, M_TEMP); /* * If we called this function some device must have the SR-IOV @@ -451,10 +452,14 @@ pci_iov_set_ari(device_t bus) ("Could not find child of %s with SR-IOV capability", device_get_nameunit(bus))); - iov_ctl = pci_read_config(lowest, iov_pos + PCIR_SRIOV_CTL, 2); + iov_ctl = pci_read_config(lowest, lowest_pos + PCIR_SRIOV_CTL, 2); iov_ctl |= PCIM_SRIOV_ARI_EN; - pci_write_config(lowest, iov_pos + PCIR_SRIOV_CTL, iov_ctl, 2); - free(devlist, M_TEMP); + pci_write_config(lowest, lowest_pos + PCIR_SRIOV_CTL, iov_ctl, 2); + if ((pci_read_config(lowest, lowest_pos + PCIR_SRIOV_CTL, 2) & + PCIM_SRIOV_ARI_EN) == 0) { + device_printf(lowest, "failed to enable ARI\n"); + return (ENXIO); + } return (0); } -- cgit v1.1