From 63f525812cee08ddad6461a0acdb49f9ea31ef2f Mon Sep 17 00:00:00 2001 From: adrian Date: Tue, 18 Mar 2008 08:39:11 +0000 Subject: Sign-extend the 48-bit AMD PMC counter before treating it to a 64-bit 2's compliment. The 2's compliment transform is done so a "count down" sampling interval can be converted into a "count up" PMC value. a 2's complimented 'count down' value is written to the PMC counter; then the read-back counter is reverted via another 2's compliment. PR: kern/121660 Reviewed by: jkoshy Approved by: jkoshy MFC after: 1 week --- sys/dev/hwpmc/hwpmc_amd.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'sys/dev/hwpmc') diff --git a/sys/dev/hwpmc/hwpmc_amd.c b/sys/dev/hwpmc/hwpmc_amd.c index 26216be..8f8641e 100644 --- a/sys/dev/hwpmc/hwpmc_amd.c +++ b/sys/dev/hwpmc/hwpmc_amd.c @@ -302,12 +302,15 @@ amd_read_pmc(int cpu, int ri, pmc_value_t *v) #endif tmp = rdmsr(pd->pm_perfctr); /* RDMSR serializes */ - if (PMC_IS_SAMPLING_MODE(mode)) - *v = AMD_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); - else - *v = tmp; + PMCDBG(MDP,REA,2,"amd-read (pre-munge) id=%d -> %jd", ri, tmp); + if (PMC_IS_SAMPLING_MODE(mode)) { + /* Sign extend 48 bit value to 64 bits. */ + tmp = (pmc_value_t) (((int64_t) tmp << 16) >> 16); + tmp = AMD_PERFCTR_VALUE_TO_RELOAD_COUNT(tmp); + } + *v = tmp; - PMCDBG(MDP,REA,2,"amd-read id=%d -> %jd", ri, *v); + PMCDBG(MDP,REA,2,"amd-read (post-munge) id=%d -> %jd", ri, *v); return 0; } -- cgit v1.1