From 1fafbd1bb50e664ea2bb5c119df2e1779e16744e Mon Sep 17 00:00:00 2001 From: jkoshy Date: Mon, 22 Aug 2005 18:20:41 +0000 Subject: On x86 processors, turn off any 'INTERRUPT' capabilities on PMCs if the CPU does not have its local APIC enabled. MFC after: 3 days --- sys/dev/hwpmc/hwpmc_x86.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) (limited to 'sys/dev/hwpmc') diff --git a/sys/dev/hwpmc/hwpmc_x86.c b/sys/dev/hwpmc/hwpmc_x86.c index 089a63e..a742eff 100644 --- a/sys/dev/hwpmc/hwpmc_x86.c +++ b/sys/dev/hwpmc/hwpmc_x86.c @@ -170,10 +170,20 @@ pmc_intel_initialize(void) struct pmc_mdep * pmc_md_initialize() { + int i; + struct pmc_mdep *md; + /* determine the CPU kind */ + md = NULL; if (strcmp(cpu_vendor, "AuthenticAMD") == 0) - return pmc_amd_initialize(); + md = pmc_amd_initialize(); else if (strcmp(cpu_vendor, "GenuineIntel") == 0) - return pmc_intel_initialize(); - return NULL; + md = pmc_intel_initialize(); + + /* disallow sampling if we do not have an LAPIC */ + if (md != NULL && lapic == NULL) + for (i = 1; i < md->pmd_nclass; i++) + md->pmd_classes[i].pm_caps &= ~PMC_CAP_INTERRUPT; + + return md; } -- cgit v1.1