From 4f053b746068039dffb792ad21ebb9873a095484 Mon Sep 17 00:00:00 2001 From: rnoland Date: Sat, 20 Jun 2009 16:45:14 +0000 Subject: The G45 docs indicate that all G4X chips use the new framecount register. Intel agrees with my reading of the docs, make it so for all G4X chips. The new register also has a 32 bit width as opposed to 24 bits. Fix things up so that the counters roll over properly. MFC after: 3 days --- sys/dev/drm/i915_drv.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sys/dev/drm/i915_drv.h') diff --git a/sys/dev/drm/i915_drv.h b/sys/dev/drm/i915_drv.h index 92c8f74..f1300f4 100644 --- a/sys/dev/drm/i915_drv.h +++ b/sys/dev/drm/i915_drv.h @@ -453,7 +453,7 @@ extern int i915_vblank_pipe_get(struct drm_device *dev, void *data, extern int i915_enable_vblank(struct drm_device *dev, int crtc); extern void i915_disable_vblank(struct drm_device *dev, int crtc); extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc); -extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc); +extern u32 g45_get_vblank_counter(struct drm_device *dev, int crtc); extern int i915_vblank_swap(struct drm_device *dev, void *data, struct drm_file *file_priv); -- cgit v1.1