From 84a4152445ffac6f0342b9f2462c5ed6ddc0b6ed Mon Sep 17 00:00:00 2001 From: rnoland Date: Fri, 12 Mar 2010 21:34:23 +0000 Subject: Add support of Intel Pineview chips, aka IGD. MFC after: 3 days --- sys/dev/agp/agp_i810.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) (limited to 'sys/dev/agp') diff --git a/sys/dev/agp/agp_i810.c b/sys/dev/agp/agp_i810.c index 9835663..95a9cc4 100644 --- a/sys/dev/agp/agp_i810.c +++ b/sys/dev/agp/agp_i810.c @@ -70,6 +70,7 @@ enum { CHIP_I915, /* 915G/915GM */ CHIP_I965, /* G965 */ CHIP_G33, /* G33/Q33/Q35 */ + CHIP_IGD, /* Pineview */ CHIP_G4X, /* G45/Q45 */ }; @@ -163,6 +164,10 @@ static const struct agp_i810_match { "Intel G33 SVGA controller"}, {0x29D28086, CHIP_G33, 0x00020000, "Intel Q33 SVGA controller"}, + {0xA0018086, CHIP_IGD, 0x00010000, + "Intel Pineview SVGA controller"}, + {0xA0118086, CHIP_IGD, 0x00010000, + "Intel Pineview (M) SVGA controller"}, {0x2A028086, CHIP_I965, 0x00020000, "Intel GM965 SVGA controller"}, {0x2A128086, CHIP_I965, 0x00020000, @@ -170,7 +175,7 @@ static const struct agp_i810_match { {0x2A428086, CHIP_G4X, 0x00020000, "Intel GM45 SVGA controller"}, {0x2E028086, CHIP_G4X, 0x00020000, - "Intel 4 Series SVGA controller"}, + "Intel Eaglelake SVGA controller"}, {0x2E128086, CHIP_G4X, 0x00020000, "Intel Q45 SVGA controller"}, {0x2E228086, CHIP_G4X, 0x00020000, @@ -290,6 +295,7 @@ agp_i810_probe(device_t dev) case CHIP_I915: case CHIP_I965: case CHIP_G33: + case CHIP_IGD: case CHIP_G4X: deven = pci_read_config(bdev, AGP_I915_DEVEN, 4); if ((deven & AGP_I915_DEVEN_D2F0) == @@ -355,6 +361,7 @@ agp_i810_dump_regs(device_t dev) case CHIP_I915: case CHIP_I965: case CHIP_G33: + case CHIP_IGD: case CHIP_G4X: device_printf(dev, "AGP_I855_GCC1: 0x%02x\n", pci_read_config(sc->bdev, AGP_I855_GCC1, 1)); @@ -390,6 +397,7 @@ agp_i810_attach(device_t dev) break; case CHIP_I915: case CHIP_G33: + case CHIP_IGD: sc->sc_res_spec = agp_i915_res_spec; agp_set_aperture_resource(dev, AGP_I915_GMADR); break; @@ -405,7 +413,8 @@ agp_i810_attach(device_t dev) return error; if (sc->chiptype != CHIP_I965 && sc->chiptype != CHIP_G33 && - sc->chiptype != CHIP_G4X && ptoa((vm_paddr_t)Maxmem) > 0xfffffffful) + sc->chiptype != CHIP_IGD && sc->chiptype != CHIP_G4X && + ptoa((vm_paddr_t)Maxmem) > 0xfffffffful) { device_printf(dev, "agp_i810.c does not support physical " "memory above 4GB.\n"); @@ -489,7 +498,7 @@ agp_i810_attach(device_t dev) gatt->ag_physical = pgtblctl & ~1; } else if (sc->chiptype == CHIP_I855 || sc->chiptype == CHIP_I915 || sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 || - sc->chiptype == CHIP_G4X) { + sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) { unsigned int gcc1, pgtblctl, stolen, gtt_size; /* Stolen memory is set up at the beginning of the aperture by @@ -551,6 +560,7 @@ agp_i810_attach(device_t dev) return EINVAL; } break; + case CHIP_IGD: case CHIP_G4X: gtt_size = 0; break; @@ -585,6 +595,7 @@ agp_i810_attach(device_t dev) if (sc->chiptype == CHIP_I915 || sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 || + sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) { stolen = 48 * 1024; } else { @@ -595,6 +606,7 @@ agp_i810_attach(device_t dev) if (sc->chiptype == CHIP_I915 || sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 || + sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) { stolen = 64 * 1024; } else { @@ -604,6 +616,7 @@ agp_i810_attach(device_t dev) case AGP_G33_GCC1_GMS_STOLEN_128M: if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 || + sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) { stolen = 128 * 1024; } else { @@ -613,6 +626,7 @@ agp_i810_attach(device_t dev) case AGP_G33_GCC1_GMS_STOLEN_256M: if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 || + sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) { stolen = 256 * 1024; } else { @@ -785,6 +799,7 @@ agp_i810_set_aperture(device_t dev, u_int32_t aperture) case CHIP_I915: case CHIP_I965: case CHIP_G33: + case CHIP_IGD: case CHIP_G4X: return agp_generic_set_aperture(dev, aperture); } @@ -805,7 +820,7 @@ agp_i810_write_gtt_entry(device_t dev, int offset, vm_offset_t physical, pte = (u_int32_t)physical | 1; if (sc->chiptype == CHIP_I965 || sc->chiptype == CHIP_G33 || - sc->chiptype == CHIP_G4X) { + sc->chiptype == CHIP_IGD || sc->chiptype == CHIP_G4X) { pte |= (physical & 0x0000000f00000000ull) >> 28; } else { /* If we do actually have memory above 4GB on an older system, @@ -825,6 +840,7 @@ agp_i810_write_gtt_entry(device_t dev, int offset, vm_offset_t physical, break; case CHIP_I915: case CHIP_G33: + case CHIP_IGD: bus_write_4(sc->sc_res[1], (offset >> AGP_PAGE_SHIFT) * 4, pte); break; -- cgit v1.1