From 9c1fcf4ecd098afcbade2f395ab1fadbbe5b4b76 Mon Sep 17 00:00:00 2001 From: sam Date: Sat, 13 Dec 2008 01:21:37 +0000 Subject: Merge WIP from p4: o recognize ixp435 cpu o change memory layout for for ixp4xx to not assume memory is aliases to 0x10000000 (Cambria/ixp435 memory starts at zero) o handle 64 irqs for ixp435 o dual EHCI USB 2.0 controller integral to ixp435 o overhaul NPE code for ixp435 and better MAC+MII naming o updated NPE firmware (including NPE-A image for ixp435/ixp465) o Gateworks Cambria board support: - IDE compact flash - MCU - front panel LED on i2c bus - Octal LED latch Sanity-tested with NFS-root on Avila and Cambria boards. Requires pending boot2 mods for CF-boot on Cambria. --- sys/conf/files | 1 + sys/conf/options.arm | 1 + 2 files changed, 2 insertions(+) (limited to 'sys/conf') diff --git a/sys/conf/files b/sys/conf/files index d09ead4..8c2316fa 100644 --- a/sys/conf/files +++ b/sys/conf/files @@ -1476,6 +1476,7 @@ dev/ubsec/ubsec.c optional ubsec # # USB support dev/usb/ehci.c optional ehci +dev/usb/ehci_ddb.c optional ehci dev/usb/ehci_pci.c optional ehci pci dev/usb/hid.c optional usb dev/usb/if_aue.c optional aue diff --git a/sys/conf/options.arm b/sys/conf/options.arm index 6c8732c..2985e00 100644 --- a/sys/conf/options.arm +++ b/sys/conf/options.arm @@ -15,6 +15,7 @@ CPU_XSCALE_80219 opt_global.h CPU_XSCALE_80321 opt_global.h CPU_XSCALE_81342 opt_global.h CPU_XSCALE_IXP425 opt_global.h +CPU_XSCALE_IXP435 opt_global.h CPU_XSCALE_PXA2X0 opt_global.h FLASHADDR opt_global.h KERNPHYSADDR opt_global.h -- cgit v1.1