From acf511e4d0cb788a9a050ea1aefef0548aa329ab Mon Sep 17 00:00:00 2001 From: gnn Date: Wed, 3 Mar 2010 15:05:58 +0000 Subject: Add support for hwpmc(4) on the MIPS 24K, 32 bit, embedded processor. Add macros for properly accessing coprocessor 0 registers that support performance counters. Reviewed by: jkoshy rpaulo fabien imp MFC after: 1 month --- sys/conf/files.mips | 3 +++ 1 file changed, 3 insertions(+) (limited to 'sys/conf/files.mips') diff --git a/sys/conf/files.mips b/sys/conf/files.mips index 4b6c54a..60ab0c2 100644 --- a/sys/conf/files.mips +++ b/sys/conf/files.mips @@ -101,3 +101,6 @@ dev/siba/siba_cc.c optional siba dev/siba/siba_core.c optional siba dev/siba/siba_pcib.c optional siba pci #mips/sentry5/siba_mips.c optional siba # not yet + +dev/hwpmc/hwpmc_mips.c optional hwpmc +dev/hwpmc/hwpmc_mips24k.c optional hwpmc -- cgit v1.1