From f7a4165c518f6bbbc49b58d2ae0297ae5c2433a9 Mon Sep 17 00:00:00 2001
From: gonzo <gonzo@FreeBSD.org>
Date: Mon, 7 Jan 2013 20:36:51 +0000
Subject: Implement barriers for AMRv6 and ARMv7

Submitted by:	Daisuke Aoyama <aoyama at peach.ne.jp>
Reviewed by:	ian, cognet
---
 sys/arm/include/atomic.h | 22 +++++++++++++++++++---
 1 file changed, 19 insertions(+), 3 deletions(-)

(limited to 'sys/arm')

diff --git a/sys/arm/include/atomic.h b/sys/arm/include/atomic.h
index 1a96176..4862453 100644
--- a/sys/arm/include/atomic.h
+++ b/sys/arm/include/atomic.h
@@ -47,9 +47,25 @@
 #include <machine/cpuconf.h>
 #endif
 
-#define mb()
-#define wmb()
-#define rmb()
+#if defined (__ARM_ARCH_7__) || defined (__ARM_ARCH_7A__)
+#define isb()  __asm __volatile("isb" : : : "memory")
+#define dsb()  __asm __volatile("dsb" : : : "memory")
+#define dmb()  __asm __volatile("dmb" : : : "memory")
+#elif defined (__ARM_ARCH_6__) || defined (__ARM_ARCH_6J__) || \
+  defined (__ARM_ARCH_6K__) || defined (__ARM_ARCH_6Z__) || \
+  defined (__ARM_ARCH_6ZK__)
+#define isb()  __asm __volatile("mcr p15, 0, %0, c7, c5, 4" : : "r" (0) : "memory")
+#define dsb()  __asm __volatile("mcr p15, 0, %0, c7, c10, 4" : : "r" (0) : "memory")
+#define dmb()  __asm __volatile("mcr p15, 0, %0, c7, c10, 5" : : "r" (0) : "memory")
+#else
+#define isb()
+#define dsb()
+#define dmb()
+#endif
+
+#define mb()   dmb()
+#define wmb()  dmb()
+#define rmb()  dmb()
 
 #ifndef I32_bit
 #define I32_bit (1 << 7)        /* IRQ disable */
-- 
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