From b9f957f3c6e4edf122f9327c5c610792ab2fbf19 Mon Sep 17 00:00:00 2001 From: andrew Date: Tue, 30 May 2017 13:56:38 +0000 Subject: MFC r307334, r318252: Support write-through caches on arm64 r307334: Create macros for the MAIR memory attributes. While here add an uncached memory type, however the VM code still needs to be taught about this. r318252: Add the VM_MEMATTR_WRITE_THROUGH memory type to arm64 and use it to support VM_MEMATTR_WRITE_COMBINING in the kernel. This fixes a bug where Xorg would use write back cached memory for its graphics buffers. This would produce artifacts on the screen as cachelines were written to memory. --- sys/arm64/arm64/locore.S | 6 ++++-- sys/arm64/include/armreg.h | 4 ++++ sys/arm64/include/vm.h | 12 +++++++++--- 3 files changed, 17 insertions(+), 5 deletions(-) (limited to 'sys/arm64') diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index ed3bc87..f324aa5 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -617,8 +617,10 @@ start_mmu: .align 3 mair: - /* Device Normal, no cache Normal, write-back */ - .quad MAIR_ATTR(0x00, 0) | MAIR_ATTR(0x44, 1) | MAIR_ATTR(0xff, 2) + .quad MAIR_ATTR(MAIR_DEVICE_nGnRnE, 0) | \ + MAIR_ATTR(MAIR_NORMAL_NC, 1) | \ + MAIR_ATTR(MAIR_NORMAL_WB, 2) | \ + MAIR_ATTR(MAIR_NORMAL_WT, 3) tcr: .quad (TCR_TxSZ(64 - VIRT_BITS) | TCR_ASID_16 | TCR_TG1_4K | \ TCR_CACHE_ATTRS | TCR_SMP_ATTRS) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 4367d8a..04a2800 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -358,6 +358,10 @@ /* MAIR_EL1 - Memory Attribute Indirection Register */ #define MAIR_ATTR_MASK(idx) (0xff << ((n)* 8)) #define MAIR_ATTR(attr, idx) ((attr) << ((idx) * 8)) +#define MAIR_DEVICE_nGnRnE 0x00 +#define MAIR_NORMAL_NC 0x44 +#define MAIR_NORMAL_WT 0x88 +#define MAIR_NORMAL_WB 0xff /* PAR_EL1 - Physical Address Register */ #define PAR_F_SHIFT 0 diff --git a/sys/arm64/include/vm.h b/sys/arm64/include/vm.h index 182313e..dac1398 100644 --- a/sys/arm64/include/vm.h +++ b/sys/arm64/include/vm.h @@ -30,9 +30,15 @@ #define _MACHINE_VM_H_ /* Memory attribute configuration. */ -#define VM_MEMATTR_DEVICE 0 -#define VM_MEMATTR_UNCACHEABLE 1 -#define VM_MEMATTR_WRITE_BACK 2 +#define VM_MEMATTR_DEVICE 0 +#define VM_MEMATTR_UNCACHEABLE 1 +#define VM_MEMATTR_WRITE_BACK 2 +#define VM_MEMATTR_WRITE_THROUGH 3 + +#ifdef _KERNEL +/* If defined vmstat will try to use both of these in a switch statement */ +#define VM_MEMATTR_WRITE_COMBINING VM_MEMATTR_WRITE_THROUGH +#endif #define VM_MEMATTR_DEFAULT VM_MEMATTR_WRITE_BACK -- cgit v1.1