From 1437f2a5d681582a801fdf841337a3f4cb46c7bd Mon Sep 17 00:00:00 2001 From: ian Date: Thu, 10 Jul 2014 14:06:18 +0000 Subject: Pending interrupt status is cleared by writing to the ISR, not the data reg. MFC after: 1 week --- sys/arm/freescale/imx/imx51_gpio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sys/arm/freescale') diff --git a/sys/arm/freescale/imx/imx51_gpio.c b/sys/arm/freescale/imx/imx51_gpio.c index 1c1eed1..8c43527 100644 --- a/sys/arm/freescale/imx/imx51_gpio.c +++ b/sys/arm/freescale/imx/imx51_gpio.c @@ -355,7 +355,7 @@ imx51_gpio_intr(void *arg) sc = arg; input = READ4(sc, IMX_GPIO_ISR_REG); value = input & READ4(sc, IMX_GPIO_IMR_REG); - WRITE4(sc, IMX_GPIO_DR_REG, input); + WRITE4(sc, IMX_GPIO_ISR_REG, input); if (!value) goto intr_done; -- cgit v1.1