From 77ac34649557c453d96dce4b886683ad7892680a Mon Sep 17 00:00:00 2001 From: ganbold Date: Thu, 2 Oct 2014 06:00:55 +0000 Subject: Allow timer0 to run at full 24MHz not at 24MHz/16 by setting prescale to 1. Approved by: stas (mentor) --- sys/arm/allwinner/timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'sys/arm/allwinner') diff --git a/sys/arm/allwinner/timer.c b/sys/arm/allwinner/timer.c index 5ab6d9d..a04fafa 100644 --- a/sys/arm/allwinner/timer.c +++ b/sys/arm/allwinner/timer.c @@ -72,7 +72,7 @@ __FBSDID("$FreeBSD$"); #define TIMER_ENABLE (1<<0) #define TIMER_AUTORELOAD (1<<1) #define TIMER_OSC24M (1<<2) /* oscillator = 24mhz */ -#define TIMER_PRESCALAR (4<<4) /* prescalar = 16 */ +#define TIMER_PRESCALAR (0<<4) /* prescalar = 1 */ #define SYS_TIMER_CLKSRC 24000000 /* clock source */ -- cgit v1.1