From a73674620c7fa1fe443dd9e7532a797292aeb6e1 Mon Sep 17 00:00:00 2001 From: kib Date: Thu, 1 Oct 2009 12:52:48 +0000 Subject: As a workaround, for Intel CPUs, do not use CLFLUSH in pmap_invalidate_cache_range() when self-snoop is apparently not reported in cpu features. We get a reserved trap when clflushing APIC registers window. XEN in full system virtualization mode removes self-snoop from CPU features, making this a problem. Tested by: csjp Reviewed by: alc MFC after: 3 days --- sys/amd64/amd64/initcpu.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'sys/amd64/amd64/initcpu.c') diff --git a/sys/amd64/amd64/initcpu.c b/sys/amd64/amd64/initcpu.c index 4376dd0..7aaff82 100644 --- a/sys/amd64/amd64/initcpu.c +++ b/sys/amd64/amd64/initcpu.c @@ -165,4 +165,10 @@ initializecpu(void) */ if ((cpu_feature & CPUID_CLFSH) != 0) cpu_clflush_line_size = ((cpu_procinfo >> 8) & 0xff) * 8; + /* + * XXXKIB: (temporary) hack to work around traps generated when + * CLFLUSHing APIC registers window. + */ + if (cpu_vendor_id == CPU_VENDOR_INTEL && !(cpu_feature & CPUID_SS)) + cpu_feature &= ~CPUID_CLFSH; } -- cgit v1.1