From 97157b4d0e8357e515eacbc41d938e44f28c9b9d Mon Sep 17 00:00:00 2001 From: gallatin Date: Fri, 1 Jun 2001 17:39:11 +0000 Subject: Resurrect platform.pci_intr_map() and essentially undo the effects of the interface conversion to platform.pci_intr_route(). I've left the platform.pci_intr_route() function pointer in place, as well as alpha_pci_route_interrupt(), but no platform currently implements it. To work around the removal of alpha_platform_assign_pciintr(cfg); from the pci probe code, I've hooked in calls to platform.pci_intr_map() in pcib_read_config (similar to the x86 APIC_IO ifdef in pci_cfgregread) for every chipset that has a platform which needs it. While here, I've removed the interupt mapping/routing code from the AS2x00 platform because its not required (it has never been present in -stable). Tested on: UP1000, Miata(GL), XP1000, AS2100, AS500 --- sys/alpha/pci/apecs_pci.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'sys/alpha/pci/apecs_pci.c') diff --git a/sys/alpha/pci/apecs_pci.c b/sys/alpha/pci/apecs_pci.c index e18daa6..b3c428f 100644 --- a/sys/alpha/pci/apecs_pci.c +++ b/sys/alpha/pci/apecs_pci.c @@ -33,7 +33,9 @@ #include #include #include +#include #include +#include #include #include #include @@ -166,6 +168,19 @@ u_int32_t apecs_pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width) { + pcicfgregs cfg; + + if ((reg == PCIR_INTLINE) && (width == 1) && + (platform.pci_intr_map != NULL)) { + cfg.bus = b; + cfg.slot = s; + cfg.func = f; + cfg.intline = 255; + platform.pci_intr_map((void *)&cfg); + if (cfg.intline != 255) + return cfg.intline; + } + switch (width) { case 1: SWIZ_CFGREAD(b, s, f, reg, BYTE, u_int8_t); -- cgit v1.1