From 2a5e536b9ea8f6632dbd73f3f2eb68f659c6167a Mon Sep 17 00:00:00 2001 From: nwhitehorn Date: Wed, 24 Sep 2008 00:28:46 +0000 Subject: Allow the cacheline size on PowerPC to be set at runtime. This is essential for supporting 64-bit CPUs, which often have 128-byte cache lines instead of the standard 32. --- lib/libc/powerpc/gen/syncicache.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'lib') diff --git a/lib/libc/powerpc/gen/syncicache.c b/lib/libc/powerpc/gen/syncicache.c index 02ab938..21a477e 100644 --- a/lib/libc/powerpc/gen/syncicache.c +++ b/lib/libc/powerpc/gen/syncicache.c @@ -1,4 +1,4 @@ -/* +/*- * Copyright (C) 1995-1997, 1999 Wolfgang Solfrank. * Copyright (C) 1995-1997, 1999 TooLs GmbH. * All rights reserved. @@ -47,28 +47,25 @@ static const char rcsid[] = #include #include -#if defined(_KERNEL) || defined(_STANDALONE) -#ifndef CACHELINESIZE -#error "Must know the size of a cache line" +#ifndef _KERNEL +int cacheline_size = 32; #endif -#else + +#if !defined(_KERNEL) && !defined(_STANDALONE) #include static void getcachelinesize(void); -static int _cachelinesize; -#define CACHELINESIZE _cachelinesize - static void getcachelinesize() { static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE }; int clen; - clen = sizeof(_cachelinesize); + clen = sizeof(cacheline_size); if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]), - &_cachelinesize, &clen, NULL, 0) < 0 || !_cachelinesize) { + &cacheline_size, &clen, NULL, 0) < 0 || !cacheline_size) { abort(); } } @@ -81,21 +78,24 @@ __syncicache(void *from, int len) char *p; #if !defined(_KERNEL) && !defined(_STANDALONE) - if (!_cachelinesize) + if (!cacheline_size) getcachelinesize(); #endif - off = (u_int)from & (CACHELINESIZE - 1); + + off = (u_int)from & (cacheline_size - 1); l = len += off; p = (char *)from - off; + do { __asm __volatile ("dcbst 0,%0" :: "r"(p)); - p += CACHELINESIZE; - } while ((l -= CACHELINESIZE) > 0); + p += cacheline_size; + } while ((l -= cacheline_size) > 0); __asm __volatile ("sync"); p = (char *)from - off; do { __asm __volatile ("icbi 0,%0" :: "r"(p)); - p += CACHELINESIZE; - } while ((len -= CACHELINESIZE) > 0); + p += cacheline_size; + } while ((len -= cacheline_size) > 0); __asm __volatile ("sync; isync"); } + -- cgit v1.1