From 577b42d393006042797668cd419aef5a2e419bb9 Mon Sep 17 00:00:00 2001 From: sbruno Date: Thu, 31 Jan 2013 22:09:53 +0000 Subject: Update hwpmc to support the Xeon class of Ivybridge processors. case 0x3E: /* Per Intel document 325462-045US 01/2013. */ Add manpage to document all the goodness that is available in this processor model. No support for uncore events at this time. Submitted by: hiren panchasara Reviewed by: davide, jimharris, sbruno Obtained from: Yahoo! Inc. MFC after: 2 weeks --- lib/libpmc/pmc.ivybridge.3 | 1 + 1 file changed, 1 insertion(+) (limited to 'lib/libpmc/pmc.ivybridge.3') diff --git a/lib/libpmc/pmc.ivybridge.3 b/lib/libpmc/pmc.ivybridge.3 index 9a81da4..7d8bdca 100644 --- a/lib/libpmc/pmc.ivybridge.3 +++ b/lib/libpmc/pmc.ivybridge.3 @@ -853,6 +853,7 @@ Dirty L2 cache lines evicted by the MLC prefetcher. .Xr pmc.p6 3 , .Xr pmc.corei7 3 , .Xr pmc.corei7uc 3 , +.Xr pmc.ivybridgexeon 3 , .Xr pmc.sandybridge 3 , .Xr pmc.sandybridgeuc 3 , .Xr pmc.sandybridgexeon 3 , -- cgit v1.1