From 2c5e9d71aba3b1a85f07c08d2c09d40b8547264b Mon Sep 17 00:00:00 2001
From: dim <dim@FreeBSD.org>
Date: Thu, 3 May 2012 16:50:55 +0000
Subject: Vendor import of llvm release_31 branch r155985:
http://llvm.org/svn/llvm-project/llvm/branches/release_31@155985
---
lib/Target/Mips/MipsTargetMachine.cpp | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
(limited to 'lib/Target/Mips/MipsTargetMachine.cpp')
diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp
index ad02231..858723b 100644
--- a/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/lib/Target/Mips/MipsTargetMachine.cpp
@@ -117,18 +117,16 @@ TargetPassConfig *MipsTargetMachine::createPassConfig(PassManagerBase &PM) {
// Install an instruction selector pass using
// the ISelDag to gen Mips code.
-bool MipsPassConfig::addInstSelector()
-{
- PM.add(createMipsISelDag(getMipsTargetMachine()));
+bool MipsPassConfig::addInstSelector() {
+ PM->add(createMipsISelDag(getMipsTargetMachine()));
return false;
}
// Implemented by targets that want to run passes immediately before
// machine code is emitted. return true if -print-machineinstrs should
// print out the code after the passes.
-bool MipsPassConfig::addPreEmitPass()
-{
- PM.add(createMipsDelaySlotFillerPass(getMipsTargetMachine()));
+bool MipsPassConfig::addPreEmitPass() {
+ PM->add(createMipsDelaySlotFillerPass(getMipsTargetMachine()));
return true;
}
@@ -136,12 +134,12 @@ bool MipsPassConfig::addPreRegAlloc() {
// Do not restore $gp if target is Mips64.
// In N32/64, $gp is a callee-saved register.
if (!getMipsSubtarget().hasMips64())
- PM.add(createMipsEmitGPRestorePass(getMipsTargetMachine()));
+ PM->add(createMipsEmitGPRestorePass(getMipsTargetMachine()));
return true;
}
bool MipsPassConfig::addPreSched2() {
- PM.add(createMipsExpandPseudoPass(getMipsTargetMachine()));
+ PM->add(createMipsExpandPseudoPass(getMipsTargetMachine()));
return true;
}
--
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