From 5d5cc59cc77afe655b3707cb0e69e0827b444cad Mon Sep 17 00:00:00 2001 From: dim Date: Fri, 17 Sep 2010 15:48:55 +0000 Subject: Vendor import of llvm r114020 (from the release_28 branch): http://llvm.org/svn/llvm-project/llvm/branches/release_28@114020 Approved by: rpaulo (mentor) --- lib/Target/CellSPU/SPUISelDAGToDAG.cpp | 44 ++-------------------------------- 1 file changed, 2 insertions(+), 42 deletions(-) (limited to 'lib/Target/CellSPU/SPUISelDAGToDAG.cpp') diff --git a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp index 9b8c2dd..2f15984 100644 --- a/lib/Target/CellSPU/SPUISelDAGToDAG.cpp +++ b/lib/Target/CellSPU/SPUISelDAGToDAG.cpp @@ -41,13 +41,6 @@ using namespace llvm; namespace { //! ConstantSDNode predicate for i32 sign-extended, 10-bit immediates bool - isI64IntS10Immediate(ConstantSDNode *CN) - { - return isInt<10>(CN->getSExtValue()); - } - - //! ConstantSDNode predicate for i32 sign-extended, 10-bit immediates - bool isI32IntS10Immediate(ConstantSDNode *CN) { return isInt<10>(CN->getSExtValue()); @@ -67,14 +60,6 @@ namespace { return isInt<10>(CN->getSExtValue()); } - //! SDNode predicate for i16 sign-extended, 10-bit immediate values - bool - isI16IntS10Immediate(SDNode *N) - { - ConstantSDNode *CN = dyn_cast(N); - return (CN != 0 && isI16IntS10Immediate(CN)); - } - //! ConstantSDNode predicate for i16 unsigned 10-bit immediate values bool isI16IntU10Immediate(ConstantSDNode *CN) @@ -82,14 +67,6 @@ namespace { return isUInt<10>((short) CN->getZExtValue()); } - //! SDNode predicate for i16 sign-extended, 10-bit immediate values - bool - isI16IntU10Immediate(SDNode *N) - { - return (N->getOpcode() == ISD::Constant - && isI16IntU10Immediate(cast(N))); - } - //! ConstantSDNode predicate for signed 16-bit values /*! \arg CN The constant SelectionDAG node holding the value @@ -119,14 +96,6 @@ namespace { return false; } - //! SDNode predicate for signed 16-bit values. - bool - isIntS16Immediate(SDNode *N, short &Imm) - { - return (N->getOpcode() == ISD::Constant - && isIntS16Immediate(cast(N), Imm)); - } - //! ConstantFPSDNode predicate for representing floats as 16-bit sign ext. static bool isFPS16Immediate(ConstantFPSDNode *FPN, short &Imm) @@ -142,16 +111,6 @@ namespace { return false; } - bool - isHighLow(const SDValue &Op) - { - return (Op.getOpcode() == SPUISD::IndirectAddr - && ((Op.getOperand(0).getOpcode() == SPUISD::Hi - && Op.getOperand(1).getOpcode() == SPUISD::Lo) - || (Op.getOperand(0).getOpcode() == SPUISD::Lo - && Op.getOperand(1).getOpcode() == SPUISD::Hi))); - } - //===------------------------------------------------------------------===// //! EVT to "useful stuff" mapping structure: @@ -607,7 +566,8 @@ SPUDAGToDAGISel::DFormAddressPredicate(SDNode *Op, SDValue N, SDValue &Base, return true; } else if (Opc == ISD::Register ||Opc == ISD::CopyFromReg - ||Opc == ISD::UNDEF) { + ||Opc == ISD::UNDEF + ||Opc == ISD::Constant) { unsigned OpOpc = Op->getOpcode(); if (OpOpc == ISD::STORE || OpOpc == ISD::LOAD) { -- cgit v1.1