From e53b15fec4f29448c20344519738f28e159da1cc Mon Sep 17 00:00:00 2001 From: imp Date: Tue, 10 Jul 2012 19:48:42 +0000 Subject: Go ahead and disable the interrupts for the DBGU the boot loader may have left enabled after we detect the CPU, and remove the multiplely copied code from the SoC modules. --- sys/arm/at91/at91_machdep.c | 9 +++++++++ sys/arm/at91/at91rm9200.c | 8 -------- sys/arm/at91/at91sam9260.c | 8 -------- sys/arm/at91/at91sam9g20.c | 8 -------- sys/arm/at91/at91sam9x25.c | 8 -------- 5 files changed, 9 insertions(+), 32 deletions(-) diff --git a/sys/arm/at91/at91_machdep.c b/sys/arm/at91/at91_machdep.c index 23e40fd..15e404f 100644 --- a/sys/arm/at91/at91_machdep.c +++ b/sys/arm/at91/at91_machdep.c @@ -90,6 +90,7 @@ __FBSDID("$FreeBSD$"); #include #include +#include #include #include @@ -382,6 +383,14 @@ at91_try_id(uint32_t dbgu_base) default: break; } + /* + * Disable interrupts + */ + *(volatile uint32_t *)(AT91_BASE + dbgu_base + USART_IDR) = 0xffffffff; + + /* + * Save the name for later... + */ snprintf(soc_data.name, sizeof(soc_data.name), "%s%s%s", soc_type_name[soc_data.type], soc_data.subtype == AT91_ST_NONE ? "" : " subtype ", diff --git a/sys/arm/at91/at91rm9200.c b/sys/arm/at91/at91rm9200.c index a3ceec4..1d7215c 100644 --- a/sys/arm/at91/at91rm9200.c +++ b/sys/arm/at91/at91rm9200.c @@ -50,7 +50,6 @@ struct at91rm92_softc { bus_space_handle_t sc_sh; bus_space_handle_t sc_sys_sh; bus_space_handle_t sc_aic_sh; - bus_space_handle_t sc_dbg_sh; bus_space_handle_t sc_matrix_sh; }; /* @@ -194,10 +193,6 @@ at91_attach(device_t dev) AT91RM92_SYS_SIZE, &sc->sc_sys_sh) != 0) panic("Enable to map system registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_DBGU_BASE, - AT91RM92_DBGU_SIZE, &sc->sc_dbg_sh) != 0) - panic("Enable to map DBGU registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91RM92_AIC_BASE, AT91RM92_AIC_SIZE, &sc->sc_aic_sh) != 0) panic("Enable to map system registers"); @@ -229,9 +224,6 @@ at91_attach(device_t dev) /* Disable all interrupts for the SDRAM controller */ bus_space_write_4(sc->sc_st, sc->sc_sys_sh, 0xfa8, 0xffffffff); - /* Disable all interrupts for DBGU */ - bus_space_write_4(sc->sc_st, sc->sc_dbg_sh, 0x0c, 0xffffffff); - /* Update USB device port clock info */ clk = at91_pmc_clock_ref("udpck"); clk->pmc_mask = PMC_SCER_UDP; diff --git a/sys/arm/at91/at91sam9260.c b/sys/arm/at91/at91sam9260.c index d67d1f4..2eee2e5 100644 --- a/sys/arm/at91/at91sam9260.c +++ b/sys/arm/at91/at91sam9260.c @@ -50,7 +50,6 @@ struct at91sam9_softc { bus_space_handle_t sc_sh; bus_space_handle_t sc_sys_sh; bus_space_handle_t sc_aic_sh; - bus_space_handle_t sc_dbg_sh; bus_space_handle_t sc_matrix_sh; }; @@ -194,10 +193,6 @@ at91_attach(device_t dev) AT91SAM9260_SYS_SIZE, &sc->sc_sys_sh) != 0) panic("Enable to map system registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_DBGU_BASE, - AT91SAM9260_DBGU_SIZE, &sc->sc_dbg_sh) != 0) - panic("Enable to map DBGU registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_AIC_BASE, AT91SAM9260_AIC_SIZE, &sc->sc_aic_sh) != 0) panic("Enable to map system registers"); @@ -223,9 +218,6 @@ at91_attach(device_t dev) bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff); bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff); - /* Disable all interrupts for DBGU */ - bus_space_write_4(sc->sc_st, sc->sc_dbg_sh, 0x0c, 0xffffffff); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9260_MATRIX_BASE, AT91SAM9260_MATRIX_SIZE, &sc->sc_matrix_sh) != 0) diff --git a/sys/arm/at91/at91sam9g20.c b/sys/arm/at91/at91sam9g20.c index 5f1fc9b..9146fda 100644 --- a/sys/arm/at91/at91sam9g20.c +++ b/sys/arm/at91/at91sam9g20.c @@ -50,7 +50,6 @@ struct at91sam9_softc { bus_space_handle_t sc_sh; bus_space_handle_t sc_sys_sh; bus_space_handle_t sc_aic_sh; - bus_space_handle_t sc_dbg_sh; bus_space_handle_t sc_matrix_sh; }; @@ -205,10 +204,6 @@ at91_attach(device_t dev) AT91SAM9G20_SYS_SIZE, &sc->sc_sys_sh) != 0) panic("Enable to map system registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9G20_DBGU_BASE, - AT91SAM9G20_DBGU_SIZE, &sc->sc_dbg_sh) != 0) - panic("Enable to map DBGU registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9G20_AIC_BASE, AT91SAM9G20_AIC_SIZE, &sc->sc_aic_sh) != 0) panic("Enable to map system registers"); @@ -234,9 +229,6 @@ at91_attach(device_t dev) bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff); bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff); - /* Disable all interrupts for DBGU */ - bus_space_write_4(sc->sc_st, sc->sc_dbg_sh, 0x0c, 0xffffffff); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9G20_MATRIX_BASE, AT91SAM9G20_MATRIX_SIZE, &sc->sc_matrix_sh) != 0) diff --git a/sys/arm/at91/at91sam9x25.c b/sys/arm/at91/at91sam9x25.c index 7b7422d..df913b9 100644 --- a/sys/arm/at91/at91sam9x25.c +++ b/sys/arm/at91/at91sam9x25.c @@ -50,7 +50,6 @@ struct at91sam9x25_softc { bus_space_handle_t sc_sh; bus_space_handle_t sc_sys_sh; bus_space_handle_t sc_aic_sh; - bus_space_handle_t sc_dbg_sh; bus_space_handle_t sc_matrix_sh; }; @@ -208,10 +207,6 @@ at91_attach(device_t dev) AT91SAM9X25_SYS_SIZE, &sc->sc_sys_sh) != 0) panic("Enable to map system registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9X25_DBGU_BASE, - AT91SAM9X25_DBGU_SIZE, &sc->sc_dbg_sh) != 0) - panic("Enable to map DBGU registers"); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9X25_AIC_BASE, AT91SAM9X25_AIC_SIZE, &sc->sc_aic_sh) != 0) panic("Enable to map system registers"); @@ -237,9 +232,6 @@ at91_attach(device_t dev) bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_IDCR, 0xffffffff); bus_space_write_4(sc->sc_st, sc->sc_aic_sh, IC_ICCR, 0xffffffff); - /* Disable all interrupts for DBGU */ - bus_space_write_4(sc->sc_st, sc->sc_dbg_sh, 0x0c, 0xffffffff); - if (bus_space_subregion(sc->sc_st, sc->sc_sh, AT91SAM9X25_MATRIX_BASE, AT91SAM9X25_MATRIX_SIZE, &sc->sc_matrix_sh) != 0) -- cgit v1.1