From d50c7b65af699615c4fdce907899e59fd6349245 Mon Sep 17 00:00:00 2001 From: se Date: Tue, 12 Nov 1996 23:18:12 +0000 Subject: Add support for header type == 1 devices (PCI 2.1 compatible PCI to PCI bridges with support for 64 bit memory addresses and 32 bit I/O addresses). The code is not complete. It ignores the upper half of the long addresses. This is not a problem on PC compatible systems, but has to be fixed for real computers. --- sys/dev/pci/pci.c | 9 +++++++-- sys/dev/pci/pcireg.h | 5 +++-- sys/pci/pci.c | 9 +++++++-- sys/pci/pci_ioctl.h | 1 + sys/pci/pcireg.h | 5 +++-- sys/sys/pciio.h | 1 + 6 files changed, 22 insertions(+), 8 deletions(-) diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c index 2913c5b..054bdaa 100644 --- a/sys/dev/pci/pci.c +++ b/sys/dev/pci/pci.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pci.c,v 1.57 1996/10/22 20:20:11 se Exp $ +** $Id: pci.c,v 1.58 1996/11/12 23:10:17 se Exp $ ** ** General subroutines for the PCI bus. ** pci_configure () @@ -1743,9 +1743,14 @@ pci_remember(int bus, int dev, int func) p->pc_sel.pc_bus = bus; p->pc_sel.pc_dev = dev; p->pc_sel.pc_func = func; + p->pc_hdr = (pci_conf_read (tag, PCI_HEADER_MISC) >> 16) & 0xff; tag = pcibus->pb_tag (bus, dev, func); p->pc_devid = pci_conf_read(tag, PCI_ID_REG); - p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG); + if ((p->pc_hdr & 0x7f) == 1) { + p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG1); + } else { + p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG0); + } p->pc_class = pci_conf_read(tag, PCI_CLASS_REG); } diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h index 437a0f3..d8b4b5b 100644 --- a/sys/dev/pci/pcireg.h +++ b/sys/dev/pci/pcireg.h @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcireg.h,v 1.8 1996/10/22 20:20:14 se Exp $ +** $Id: pcireg.h,v 1.9 1996/11/12 23:10:24 se Exp $ ** ** Names for PCI configuration space registers. ** @@ -160,7 +160,8 @@ #define PCI_PCI_BRIDGE_MEM_REG 0x20 #define PCI_PCI_BRIDGE_PMEM_REG 0x24 -#define PCI_SUBID_REG 0x2c +#define PCI_SUBID_REG0 0x2c +#define PCI_SUBID_REG1 0x34 #define PCI_SUBORDINATE_BUS_MASK 0x00ff0000 #define PCI_SECONDARY_BUS_MASK 0x0000ff00 diff --git a/sys/pci/pci.c b/sys/pci/pci.c index 2913c5b..054bdaa 100644 --- a/sys/pci/pci.c +++ b/sys/pci/pci.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pci.c,v 1.57 1996/10/22 20:20:11 se Exp $ +** $Id: pci.c,v 1.58 1996/11/12 23:10:17 se Exp $ ** ** General subroutines for the PCI bus. ** pci_configure () @@ -1743,9 +1743,14 @@ pci_remember(int bus, int dev, int func) p->pc_sel.pc_bus = bus; p->pc_sel.pc_dev = dev; p->pc_sel.pc_func = func; + p->pc_hdr = (pci_conf_read (tag, PCI_HEADER_MISC) >> 16) & 0xff; tag = pcibus->pb_tag (bus, dev, func); p->pc_devid = pci_conf_read(tag, PCI_ID_REG); - p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG); + if ((p->pc_hdr & 0x7f) == 1) { + p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG1); + } else { + p->pc_subid = pci_conf_read(tag, PCI_SUBID_REG0); + } p->pc_class = pci_conf_read(tag, PCI_CLASS_REG); } diff --git a/sys/pci/pci_ioctl.h b/sys/pci/pci_ioctl.h index ea0b939..4d9e1cc 100644 --- a/sys/pci/pci_ioctl.h +++ b/sys/pci/pci_ioctl.h @@ -11,6 +11,7 @@ struct pcisel { struct pci_conf { struct pcisel pc_sel; /* bus+slot+function */ + u_char pc_hdr; /* PCI header type */ pcidi_t pc_devid; /* device ID */ pcidi_t pc_subid; /* subvendor ID */ u_int32_t pc_class; /* device class */ diff --git a/sys/pci/pcireg.h b/sys/pci/pcireg.h index 437a0f3..d8b4b5b 100644 --- a/sys/pci/pcireg.h +++ b/sys/pci/pcireg.h @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcireg.h,v 1.8 1996/10/22 20:20:14 se Exp $ +** $Id: pcireg.h,v 1.9 1996/11/12 23:10:24 se Exp $ ** ** Names for PCI configuration space registers. ** @@ -160,7 +160,8 @@ #define PCI_PCI_BRIDGE_MEM_REG 0x20 #define PCI_PCI_BRIDGE_PMEM_REG 0x24 -#define PCI_SUBID_REG 0x2c +#define PCI_SUBID_REG0 0x2c +#define PCI_SUBID_REG1 0x34 #define PCI_SUBORDINATE_BUS_MASK 0x00ff0000 #define PCI_SECONDARY_BUS_MASK 0x0000ff00 diff --git a/sys/sys/pciio.h b/sys/sys/pciio.h index ea0b939..4d9e1cc 100644 --- a/sys/sys/pciio.h +++ b/sys/sys/pciio.h @@ -11,6 +11,7 @@ struct pcisel { struct pci_conf { struct pcisel pc_sel; /* bus+slot+function */ + u_char pc_hdr; /* PCI header type */ pcidi_t pc_devid; /* device ID */ pcidi_t pc_subid; /* subvendor ID */ u_int32_t pc_class; /* device class */ -- cgit v1.1