From 806f871aea989e2a11f58ba2d1134c2c6c5aaf02 Mon Sep 17 00:00:00 2001
From: imp <imp@FreeBSD.org>
Date: Thu, 11 Dec 2008 08:22:20 +0000
Subject: Push mips support into the tree.

---
 contrib/binutils/bfd/config.bfd                  |  4 ++++
 contrib/binutils/gas/config/tc-mips.c            | 23 +++++++++++++++++++++++
 contrib/binutils/ld/emulparams/elf32bmip_fbsd.sh |  3 +++
 3 files changed, 30 insertions(+)
 create mode 100755 contrib/binutils/ld/emulparams/elf32bmip_fbsd.sh

diff --git a/contrib/binutils/bfd/config.bfd b/contrib/binutils/bfd/config.bfd
index 1428831..034da18 100755
--- a/contrib/binutils/bfd/config.bfd
+++ b/contrib/binutils/bfd/config.bfd
@@ -768,6 +768,10 @@ case "${targ}" in
     targ_defvec=bfd_elf32_littlemips_vec
     targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_little_vec ecoff_big_vec"
     ;;
+  mips*-*-freebsd*)
+    targ_defvec=bfd_elf32_tradbigmips_vec
+    targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmisp_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_big_vec ecoff_little_vec"
+    ;;
   mips*-*-netbsd*)
     targ_defvec=bfd_elf32_bigmips_vec
     targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_big_vec ecoff_little_vec"
diff --git a/contrib/binutils/gas/config/tc-mips.c b/contrib/binutils/gas/config/tc-mips.c
index 7b6cee8..d6d2979 100644
--- a/contrib/binutils/gas/config/tc-mips.c
+++ b/contrib/binutils/gas/config/tc-mips.c
@@ -281,6 +281,9 @@ static int mips_32bitmode = 0;
 
 #define HAVE_64BIT_OBJECTS (mips_abi == N64_ABI)
 
+/* True if relocations are stored in-place.  */
+#define HAVE_IN_PLACE_ADDENDS (!HAVE_NEWABI)
+
 /* We can only have 64bit addresses if the object file format
    supports it.  */
 #define HAVE_32BIT_ADDRESSES                           \
@@ -13020,6 +13023,26 @@ mips_fix_adjustable (fixS *fixp)
   if (fixp->fx_addsy == NULL)
     return 1;
 
+  /* If symbol SYM is in a mergeable section, relocations of the form
+     SYM + 0 can usually be made section-relative.  The mergeable data
+     is then identified by the section offset rather than by the symbol.
+
+     However, if we're generating REL LO16 relocations, the offset is split
+     between the LO16 and parterning high part relocation.  The linker will
+     need to recalculate the complete offset in order to correctly identify
+     the merge data.
+
+     The linker has traditionally not looked for the parterning high part
+     relocation, and has thus allowed orphaned R_MIPS_LO16 relocations to be
+     placed anywhere.  Rather than break backwards compatibility by changing
+     this, it seems better not to force the issue, and instead keep the
+     original symbol.  This will work with either linker behavior.  */
+  if ((fixp->fx_r_type == BFD_RELOC_LO16
+       || reloc_needs_lo_p (fixp->fx_r_type))
+      && HAVE_IN_PLACE_ADDENDS
+      && (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE) != 0)
+    return 0;
+
 #ifdef OBJ_ELF
   if (OUTPUT_FLAVOR == bfd_target_elf_flavour
       && S_GET_OTHER (fixp->fx_addsy) == STO_MIPS16
diff --git a/contrib/binutils/ld/emulparams/elf32bmip_fbsd.sh b/contrib/binutils/ld/emulparams/elf32bmip_fbsd.sh
new file mode 100755
index 0000000..a128102
--- /dev/null
+++ b/contrib/binutils/ld/emulparams/elf32bmip_fbsd.sh
@@ -0,0 +1,3 @@
+. ${srcdir}/emulparams/elf32bmip.sh
+. ${srcdir}/emulparams/elf_fbsd.sh
+GENERATE_PIE_SCRIPT=yes
-- 
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