From 58ab3853c2b6638a45cc68fc6d6f7b18290f6260 Mon Sep 17 00:00:00 2001 From: hselasky Date: Sun, 2 Jun 2013 10:54:47 +0000 Subject: Don't set the start ISOC ASAP bit for non-isochronous TRBs. MFC after: 1 week --- sys/dev/usb/controller/xhci.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/sys/dev/usb/controller/xhci.c b/sys/dev/usb/controller/xhci.c index 7d5bf1f..69c873f 100644 --- a/sys/dev/usb/controller/xhci.c +++ b/sys/dev/usb/controller/xhci.c @@ -1700,14 +1700,17 @@ restart: dword = XHCI_TRB_3_CHAIN_BIT | XHCI_TRB_3_CYCLE_BIT | XHCI_TRB_3_TYPE_SET(temp->trb_type) | - (temp->do_isoc_sync ? - XHCI_TRB_3_FRID_SET(temp->isoc_frame / 8) : - XHCI_TRB_3_ISO_SIA_BIT) | XHCI_TRB_3_TBC_SET(temp->tbc) | XHCI_TRB_3_TLBPC_SET(temp->tlbpc); - temp->do_isoc_sync = 0; - + if (temp->trb_type == XHCI_TRB_TYPE_ISOCH) { + if (temp->do_isoc_sync != 0) { + temp->do_isoc_sync = 0; + dword |= XHCI_TRB_3_FRID_SET(temp->isoc_frame / 8); + } else { + dword |= XHCI_TRB_3_ISO_SIA_BIT; + } + } if (temp->direction == UE_DIR_IN) { dword |= XHCI_TRB_3_DIR_IN; -- cgit v1.1