From 0a4dfa3cb8419d8934bbb0b0f21984a04d332dff Mon Sep 17 00:00:00 2001 From: sam Date: Tue, 3 Feb 2009 19:16:04 +0000 Subject: Add support for the StrataFlash on 2348 boards: o add bus shim for cfi driver o add static mapping for CS0 (we map all 16M as the cfi driver doesn't support demand mapping) Note this needs some tweaking to work for 2358 boards which is why the CAMBRIA config is not touched. --- sys/arm/conf/AVILA | 4 +++- sys/arm/conf/AVILA.hints | 4 ++++ sys/arm/xscale/ixp425/avila_machdep.c | 4 ++++ sys/arm/xscale/ixp425/files.ixp425 | 1 + sys/arm/xscale/ixp425/ixp425.c | 2 ++ sys/arm/xscale/ixp425/ixp425reg.h | 8 +++++++- 6 files changed, 21 insertions(+), 2 deletions(-) diff --git a/sys/arm/conf/AVILA b/sys/arm/conf/AVILA index 4ff8098..c18c28a 100644 --- a/sys/arm/conf/AVILA +++ b/sys/arm/conf/AVILA @@ -66,13 +66,15 @@ options BOOTP_COMPAT device pci device uart +device ixpwdog # watchdog timer +device cfi # flash support + # I2C Bus device iicbus device iicbb device iic device ixpiic # I2C bus glue -device ixpwdog # watchdog timer device ds1672 # DS1672 on I2C bus device ad7418 # AD7418 on I2C bus diff --git a/sys/arm/conf/AVILA.hints b/sys/arm/conf/AVILA.hints index ba3a04b..2d6d4dc 100644 --- a/sys/arm/conf/AVILA.hints +++ b/sys/arm/conf/AVILA.hints @@ -29,6 +29,10 @@ hint.npe.1.mac="C" hint.npe.1.mii="B" hint.npe.1.phy=1 +# FLASH +hint.cfi.0.at="ixp0" +hint.cfi.0.addr=0x50000000 + # CF IDE controller hint.ata_avila.0.at="ixp0" diff --git a/sys/arm/xscale/ixp425/avila_machdep.c b/sys/arm/xscale/ixp425/avila_machdep.c index 181ccb4..f75ddd8 100644 --- a/sys/arm/xscale/ixp425/avila_machdep.c +++ b/sys/arm/xscale/ixp425/avila_machdep.c @@ -154,6 +154,10 @@ static const struct pmap_devmap ixp425_devmap[] = { { IXP425_EXP_VBASE, IXP425_EXP_HWBASE, IXP425_EXP_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* CFI Flash on the Expansion Bus */ + { IXP425_EXP_BUS_CS0_VBASE, IXP425_EXP_BUS_CS0_HWBASE, + IXP425_EXP_BUS_CS0_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, + /* IXP425 PCI Configuration */ { IXP425_PCI_VBASE, IXP425_PCI_HWBASE, IXP425_PCI_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE, }, diff --git a/sys/arm/xscale/ixp425/files.ixp425 b/sys/arm/xscale/ixp425/files.ixp425 index 02814f5..3538569 100644 --- a/sys/arm/xscale/ixp425/files.ixp425 +++ b/sys/arm/xscale/ixp425/files.ixp425 @@ -15,6 +15,7 @@ arm/xscale/ixp425/uart_cpu_ixp425.c optional uart arm/xscale/ixp425/uart_bus_ixp425.c optional uart arm/xscale/ixp425/ixp425_a4x_space.c optional uart arm/xscale/ixp425/ixp425_a4x_io.S optional uart +dev/cfi/cfi_bus_ixp4xx.c optional cfi dev/uart/uart_dev_ns8250.c optional uart # # NPE-based Ethernet support (requires qmgr also). diff --git a/sys/arm/xscale/ixp425/ixp425.c b/sys/arm/xscale/ixp425/ixp425.c index 170b9f6..f2366de 100644 --- a/sys/arm/xscale/ixp425/ixp425.c +++ b/sys/arm/xscale/ixp425/ixp425.c @@ -329,6 +329,8 @@ static const struct { { IXP425_IO_HWBASE, IXP425_IO_SIZE, IXP425_IO_VBASE }, { IXP425_PCI_HWBASE, IXP425_PCI_SIZE, IXP425_PCI_VBASE }, { IXP425_PCI_MEM_HWBASE,IXP425_PCI_MEM_SIZE, IXP425_PCI_MEM_VBASE }, + { IXP425_EXP_BUS_CS0_HWBASE, IXP425_EXP_BUS_CS0_SIZE, + IXP425_EXP_BUS_CS0_VBASE }, /* NB: needed only for uart_cpu_getdev */ { IXP425_UART0_HWBASE, IXP425_REG_SIZE, IXP425_UART0_VBASE }, { IXP425_UART1_HWBASE, IXP425_REG_SIZE, IXP425_UART1_VBASE }, diff --git a/sys/arm/xscale/ixp425/ixp425reg.h b/sys/arm/xscale/ixp425/ixp425reg.h index afd12ff..f48fb59 100644 --- a/sys/arm/xscale/ixp425/ixp425reg.h +++ b/sys/arm/xscale/ixp425/ixp425reg.h @@ -76,6 +76,10 @@ * Global cache clean area * FF00 0000 --------------------------- * + * FE00 0000 --------------------------- + * 16M CFI Flash (on ext bus) + * FD00 0000 --------------------------- + * * FC00 0000 --------------------------- * PCI Data (memory space) * F800 0000 --------------------------- IXP425_PCI_MEM_VBASE @@ -649,6 +653,9 @@ #define IXP425_EXP_BUS_CSx_VBASE(i) \ (IXP425_MAC_B_VBASE + (i)*IXP425_MAC_B_SIZE) +#define IXP425_EXP_BUS_CS0_HWBASE IXP425_EXP_BUS_CSx_HWBASE(0) +#define IXP425_EXP_BUS_CS0_VBASE 0xFD000000UL +#define IXP425_EXP_BUS_CS0_SIZE 0x01000000 /* NB: 16M */ #define IXP425_EXP_BUS_CS1_HWBASE IXP425_EXP_BUS_CSx_HWBASE(1) #define IXP425_EXP_BUS_CS1_VBASE IXP425_EXP_BUS_CSx_VBASE(1) #define IXP425_EXP_BUS_CS1_SIZE 0x1000 @@ -663,7 +670,6 @@ #define IXP425_EXP_BUS_CS4_SIZE 0x1000 /* NB: not mapped (yet) */ -#define IXP425_EXP_BUS_CS0_HWBASE IXP425_EXP_BUS_CSx_HWBASE(0) #define IXP425_EXP_BUS_CS5_HWBASE IXP425_EXP_BUS_CSx_HWBASE(5) #define IXP425_EXP_BUS_CS6_HWBASE IXP425_EXP_BUS_CSx_HWBASE(6) #define IXP425_EXP_BUS_CS7_HWBASE IXP425_EXP_BUS_CSx_HWBASE(7) -- cgit v1.1