| Commit message (Collapse) | Author | Age | Files | Lines |
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bridges. Currently this includes information about what resources a
bridge decodes on the upstream side for use by downstream devices including
bus numbers, I/O port resources, and memory resources. Windows and bus
ranges are enumerated for both PCI-PCI bridges and PCI-CardBus bridges.
To simplify the implementation, all enumeration is done by reading the
appropriate config space registers directly rather than querying the
bridge driver in the kernel via new ioctls. This does result in a few
limitations.
First, an unimplemented window in a PCI-PCI bridge cannot be accurately
detected as accurate detection requires writing to the window base
register. That is not safe for pciconf(8). Instead, this assumes that
any window where both the base and limit read as all zeroes is
unimplemented.
Second, the PCI-PCI bridge driver in a tree has a few quirks for
PCI-PCI bridges that use subtractive decoding but do not indicate that
via the progif config register. The list of quirks is duplicated in
pciconf's source.
Reviewed by: imp
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D4171
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MFC after: 1 week
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Given the pciids database on ports is updated more often than the one in base
prefer this version if present, otherwise read the one from base.
MFC after: 1 week
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D3391
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Off by default, build behaves normally.
WITH_META_MODE we get auto objdir creation, the ability to
start build from anywhere in the tree.
Still need to add real targets under targets/ to build packages.
Differential Revision: D2796
Reviewed by: brooks imp
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Requested by: Simon Gerraty <sjg@juniper.net>
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Computing Technologies LLC to Hudson River Trading LLC.
Approved by: Hudson River Trading LLC (who owns ACT LLC)
MFC after: 1 week
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Differential Revision: https://reviews.freebsd.org/D1639
Reviewed by: jhb
MFC after: 1 month
Sponsored by: Sandvine Inc.
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usr.sbin/pciconf/pciconf.c:237:12: error: address of array 'p->pd_name' will
always evaluate to 'true' [-Werror,-Wpointer-bool-conversion]
(p->pd_name && *p->pd_name) ? p->pd_name :
~~~^~~~~~~ ~~
usr.sbin/pciconf/pciconf.c:239:12: error: address of array 'p->pd_name' will
always evaluate to 'true' [-Werror,-Wpointer-bool-conversion]
(p->pd_name && *p->pd_name) ? (int)p->pd_unit :
~~~^~~~~~~ ~~
The pd_name field of struct pci_conf is an array, so it can never be null.
Remove the unnecessary check.
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an error if the argument to pciconf -a doesn't have a unit number, rather
than triggering an assertion failure.
PR: 194506
Reported by: Anthony Cornehl <accornehl@gmail.com>
Sponsored by: EMC / Isilon Storage Division
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Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after: 2 weeks
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Teach pciconf how to print out the status (enabled/disabled) of the ARI
capability on PCI Root Complexes and Downstream Ports.
MFC after: 2 months
Sponsored by: Sandvine Inc.
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- Store the length of each read-only VPD value since not all values are
guaranteed to be ASCII values (though most are).
- Add a new pciio ioctl to fetch VPD for a single PCI device. The values
are returned as a list of variable length records, one for the device
name and each keyword.
- Add a new -V flag to pciconf's list mode which displays VPD data for
each device.
MFC after: 1 week
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device name instead of just the selector.
- Accept an optional device argument to -l to restrict the output to only
listing details about a single device. This is mostly useful in
conjunction with other flags like -e or -c to allow a user to query
details about a single device.
MFC after: 1 week
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Submitted by: Dmitry Luhtionov <dmitryluhtionov@gmail.com>
MFC after: 1 week
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This allows bar sizes greater than or equal to 4GB to be displayed correctly.
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in /usr/include.
MFC after: 2 weeks
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capability.
Reviewed by: jhb, jimharris (initial version)
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the current and max link speed.
Sponsored by: Intel
Discussed with: jhb
MFC after: 1 week
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MFC after: 3 days
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Submitted by: jimharris
MFC after: 6 days
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MFC after: 1 week
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#defines. This also has the advantage that it makes the names more
compact, iand also allows us to correct the non-uniform naming of
the PCIM_LINK_* defines, making them all consistent amongst themselves.
This is a mostly mechanical rename:
s/PCIR_EXPRESS_/PCIER_/g
s/PCIM_EXP_/PCIEM_/g
s/PCIM_LINK_/PCIEM_LINK_/g
When this is MFC'd, #defines will be added for the old names to assist
out-of-tree drivers.
Discussed with: jhb
MFC after: 1 week
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- Make parsing of PCI-e extended capabilities assume that future version
numbers are backwards compatible.
- Add new AER error descriptions.
- Add descriptions for more PCI-e extended capabilities.
MFC after: 1 week
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- Fix printing of PCIe interrupt number, the shift was incorrect.
MFC after: 1 week
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Currently this dumps the status of any error bits in the PCI status register
and PCI-express device status register. It also lists any errors indicated
by version 1 of PCI-express Advanced Error Reporting (AER).
MFC after: 1 week
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Disussed with: gavin
No objection from: doc
Approved by: joel
MFC after: 3 days
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PCI-express capabilities. Non-PCI-express PCI devices may simply ignore
the upper bits in a config register address effectively aliasing the
device ID register to 0x100 rather than returning 0xFFFFFFFF. Previously
the code relied on these reads returning 0xFFFFFFFF.
MFC after: 3 days
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walking the capability list.
- Use constants for PCI header types instead of magic numbers.
MFC after: 1 week
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field populated, it ignores the rest of the 'pci_sel' structure.
MFC after: 1 week
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PCI-express. I used PCIZ_* for ID constants (plain capability IDs use
PCIY_*).
- Add register definitions for the Advanced Error Reporting, Virtual
Channels, and Device Serial Number extended capabilities.
- Teach pciconf -c to list extended as well as plain capabilities. Adds
more detailed parsing for AER, VC, and device serial numbers.
MFC after: 2 weeks
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translating these manual pages. Minor corrections by me.
Submitted by: Nobuyuki Koganemaru <n-kogane@syd.odn.ne.jp>
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registers.
- Cleanup PCI-X capability printf to not leave a dangling "supports" for
some PCI-X bridges.
- Display additional PCI express details including the negotiated and max
link width and the actual and maximum supported max payload.
MFC after: 1 month
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Submitted by: Christoph Mallon
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