summaryrefslogtreecommitdiffstats
path: root/usr.sbin/cpucontrol
Commit message (Collapse)AuthorAgeFilesLines
* - Save some space relying on the fact that all ioctl commandsstas2011-01-071-5/+5
| | | | | | prefixes are the same. Suggested by: "Carlos A. M. dos Santos" <unixmania@gmail.com>
* - Show textual representation of ioctl command in warning messagestas2011-01-061-2/+7
| | | | | | | if ioctl(4) is failed besides the command number. Suggested by: delphij MFC after: 2 weeks
* Remove dead assignments, we overwrite the variable almost immediately.gavin2010-06-192-3/+0
| | | | Found by: clang static analyzer
* mdoc: move CAVEATS, BUGS and SECURITY CONSIDERATIONS sections to theuqs2010-05-131-2/+2
| | | | | | | | | | | bottom of the manpages and order them consistently. GNU groff doesn't care about the ordering, and doesn't even mention CAVEATS and SECURITY CONSIDERATIONS as common sections and where to put them. Found by: mdocml lint run Reviewed by: ru
* The last big commit: let usr.sbin/ use WARNS=6 by default.ed2010-01-021-2/+0
|
* ANSIfy almost all applications that use WARNS=6.ed2009-12-291-1/+1
| | | | | | | I was considering committing all these patches one by one, but as discussed with brooks@, there is no need to do this. If we ever need/want to merge these changes back, it is still possible to do this per application.
* (S)LIST_HEAD_INITIALIZER takes a (S)LIST_HEAD as an argument.antoine2009-12-281-1/+1
| | | | | | | | | Fix some wrong usages. Note: this does not affect generated binaries as this argument is not used. PR: 137213 Submitted by: Eygene Ryabinkin (initial version) MFC after: 1 month
* - Add support to atomically set/clear individual bits of a MSR registerstas2009-06-302-25/+136
| | | | | | | | | | | | | | | | | | | via cpuctl(4) driver. Two new CPUCTL_MSRSBIT and CPUCTL_MSRCBIT ioctl(2) calls treat the data field of the argument struct passed as a mask and set/clear bits of the MSR register according to the mask value. - Allow user to perform atomic bitwise AND and OR operaions on MSR registers via cpucontrol(8) utility. Two new operations ("&=" and "|=") have been added. The first one applies bitwise AND operaion between the current contents of the MSR register and the mask, and the second performs bitwise OR. The argument can be optionally prefixed with "~" inversion operator. This allows one to mimic the "clear bit" behavior by using the command like this: cpucontrol -m 0x10&=~0x02 # clear the second bit of TSC MSR Inversion operator support in all modes (assignment, OR, AND). Approved by: re (kib) MFC after: 1 month
* Correct the information about when the respective functionality firstbrueffer2009-04-231-1/+1
| | | | | | | | appeared in FreeBSD. PR: 133785 Submitted by: Ulrich Spoerlein <uqs@spoerlein.net> MFC after: 3 days
* - use .Ex macro in EXIT STATUS sectiondanger2009-01-071-3/+1
|
* - Improve wording.stas2009-01-041-1/+6
| | | | | Approved by: kib (mentor) MFC after: 1 week
* Mdoc and wording improvements.brueffer2008-12-301-9/+13
|
* - Fix error reporting.stas2008-08-121-5/+5
| | | | Approved by: kib
* - Add cpuctl(4) pseudo-device driver to provide access to some low-levelstas2008-08-088-0/+1130
features of CPUs like reading/writing machine-specific registers, retrieving cpuid data, and updating microcode. - Add cpucontrol(8) utility, that provides userland access to the features of cpuctl(4). - Add subsequent manpages. The cpuctl(4) device operates as follows. The pseudo-device node cpuctlX is created for each cpu present in the systems. The pseudo-device minor number corresponds to the cpu number in the system. The cpuctl(4) pseudo- device allows a number of ioctl to be preformed, namely RDMSR/WRMSR/CPUID and UPDATE. The first pair alows the caller to read/write machine-specific registers from the correspondent CPU. cpuid data could be retrieved using the CPUID call, and microcode updates are applied via UPDATE. The permissions are inforced based on the pseudo-device file permissions. RDMSR/CPUID will be allowed when the caller has read access to the device node, while WRMSR/UPDATE will be granted only when the node is opened for writing. There're also a number of priv(9) checks. The cpucontrol(8) utility is intened to provide userland access to the cpuctl(4) device features. The utility also allows one to apply cpu microcode updates. Currently only Intel and AMD cpus are supported and were tested. Approved by: kib Reviewed by: rpaulo, cokane, Peter Jeremy MFC after: 1 month
OpenPOWER on IntegriCloud