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* Use calloc() in favor of malloc + memset.delphij2014-04-229-24/+12
| | | | Reviewed by: neel
* Factor out common ioport handler code for better hygiene -- pointedtychon2014-04-221-22/+12
| | | | | | out by neel@. Approved by: neel (co-mentor)
* Fix ACPI DSDT indentation cosmetic breakage introduced in r264631 --tychon2014-04-181-1/+1
| | | | | | pointed out by jhb@. Approved by: grehan (co-mentor)
* Respect the destination operand size of the 'Input from Port' instruction.tychon2014-04-181-4/+23
| | | | Approved by: grehan (co-mentor)
* Add support for reading the PIT Counter 2 output signal via the NMItychon2014-04-181-0/+18
| | | | | | | | | | | | Status and Control register at port 0x61. Be more conservative about "catching up" callouts that were supposed to fire in the past by skipping an interrupt if it was scheduled too far in the past. Restore the PIT ACPI DSDT entries and add an entry for NMISC too. Approved by: neel (co-mentor)
* Add support for emulating the slave PIC.tychon2014-04-141-2/+2
| | | | | Reviewed by: grehan, jhb Approved by: grehan (co-mentor)
* Constrain the amount of data returned to what is actually availabletychon2014-04-091-3/+5
| | | | | | not the size of the buffer. Approved by: grehan (co-mentor)
* Handle single-byte reads from the bvmcons port (0x220) by returningjhb2014-04-081-0/+9
| | | | | | | | 0xff. Some guests may attempt to read from this port to identify psuedo-PNP ISA devices. (The ie(4) driver in FreeBSD/i386 is one example.) Reviewed by: grehan
* Add support for the virtio RNG entropy-source device.grehan2014-04-024-1/+194
| | | | | | | | | | | | Call through to /dev/random synchronously to fill virtio buffers with RNG data. Tested with FreeBSD-CURRENT and Ubuntu guests. Submitted by: Leon Dang Discussed with: markm MFC after: 3 weeks Sponsored by: Nahanni Systems
* Add an ioctl to suspend a virtual machine (VM_SUSPEND). The ioctl can be calledneel2014-03-261-1/+34
| | | | | | | | | | | | from any context i.e., it is not required to be called from a vcpu thread. The ioctl simply sets a state variable 'vm->suspend' to '1' and returns. The vcpus inspect 'vm->suspend' in the run loop and if it is set to '1' the vcpu breaks out of the loop with a reason of 'VM_EXITCODE_SUSPENDED'. The suspend handler waits until all 'vm->active_cpus' have transitioned to 'vm->suspended_cpus' before returning to userspace. Discussed with: grehan
* Move the atpit device model from userspace into vmm.ko for bettertychon2014-03-253-338/+0
| | | | | | precision and lower latency. Approved by: grehan (co-mentor)
* Use 'cpuset_t' to represent the vcpus active in a virtual machine.neel2014-03-203-20/+16
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* Don't reissue in-flight commands.tychon2014-03-181-2/+16
| | | | Approved by: neel (co-mentor)
* Though there currently isn't a way to insert new media into an ATAPItychon2014-03-161-0/+18
| | | | | | | drive, at least pretend to support Asynchronous Notification (AN) to avoid a guest needlessly polling for it. Approved by: grehan (co-mentor)
* Support the bootloader's single 16-bit 'outw' access to the Divisortychon2014-03-161-7/+19
| | | | | | Latch MSB and LSB registers. Approved by: neel (co-mentor)
* Replace the userspace atpic stub with a more functional vmm.ko model.tychon2014-03-115-160/+22
| | | | | | | | New ioctls VM_ISA_ASSERT_IRQ, VM_ISA_DEASSERT_IRQ and VM_ISA_PULSE_IRQ can be used to manipulate the pic, and optionally the ioapic, pin state. Reviewed by: jhb, neel Approved by: neel (co-mentor)
* Open the uart emulation's backing tty in non-blocking mode.grehan2014-03-071-1/+1
| | | | | | | | | | | This fixes the issue of bhyve appearing to halt when using nmdm ports for the console, until a connection is made to the other end. bhyveload already does this. Reported by: Many. MFC after: 3 weeks.
* Add SMBIOS support.tychon2014-03-046-11/+890
| | | | | | | A new option, -U, can be used to set the UUID in the System Information (Type 1) structure. Manpage fix to follow. Approved by: grehan (co-mentor)
* Document the "-a" and "-x" options to match the changes in r262236.neel2014-02-261-2/+7
| | | | Reviewed by: grehan
* Queue pending exceptions in the 'struct vcpu' instead of directly updating theneel2014-02-261-4/+10
| | | | | | | | | | | | | | | | | | | | | | | processor-specific VMCS or VMCB. The pending exception will be delivered right before entering the guest. The order of event injection into the guest is: - hardware exception - NMI - maskable interrupt In the Intel VT-x case, a pending NMI or interrupt will enable the interrupt window-exiting and inject it as soon as possible after the hardware exception is injected. Also since interrupts are inherently asynchronous, injecting them after the hardware exception should not affect correctness from the guest perspective. Rename the unused ioctl VM_INJECT_EVENT to VM_INJECT_EXCEPTION and restrict it to only deliver x86 hardware exceptions. This new ioctl is now used to inject a protection fault when the guest accesses an unimplemented MSR. Discussed with: grehan, jhb Reviewed by: jhb
* Fix virtio spec URL.grehan2014-02-211-1/+1
| | | | | Submitted by: lwhsu MFC after: 1 week
* Avoid clobbering the counter mode when issuing a latch command.tychon2014-02-211-2/+3
| | | | Approved by: grehan (co-mentor)
* Simplify APIC mode switching from MMIO to x2APIC. In part this is done toneel2014-02-201-15/+13
| | | | | | | | | | | | | | | | | | | | | simplify the implementation of the x2APIC virtualization assist in VT-x. Prior to this change the vlapic allowed the guest to change its mode from xAPIC to x2APIC. We don't allow that any more and the vlapic mode is locked when the virtual machine is created. This is not very constraining because operating systems already have to deal with BIOS setting up the APIC in x2APIC mode at boot. Fix a bug in the CPUID emulation where the x2APIC capability was leaking from the host to the guest. Ignore MMIO reads and writes to the vlapic in x2APIC mode. Similarly, ignore MSR accesses to the vlapic when it is in xAPIC mode. The default configuration of the vlapic is xAPIC. The "-x" option to bhyve(8) can be used to change the mode to x2APIC instead. Discussed with: grehan@
* Add a check to validate that memory BARs of passthru devices are 4KB aligned.neel2014-02-183-27/+53
| | | | | Also, the MSI-x table offset is not required to be 4KB aligned so take this into account when computing the pages occupied by the MSI-x tables.
* Tweak the handling of PCI capabilities in emulated devices to removejhb2014-02-182-47/+26
| | | | | | | | | | the non-standard zero capability list terminator. Instead, track the start and end of the most recently added capability and use that to adjust the previous capability's next pointer when a capability is added and to determine the range of config registers belonging to PCI capability registers. Reviewed by: neel
* Update bhyve(8) man page to describe the usage of the "-s" option to assignneel2014-02-141-3/+9
| | | | | | | bus numbers to emulated devices. Also add the restriction that the LPC bridge emulation can only be configured on bus 0. Reviewed by: grehan@
* Allow PCI devices to be configured on all valid bus numbers from 0 to 255.neel2014-02-145-107/+270
| | | | | | | | | | | | | | | | | | | | This is done by representing each bus as root PCI device in ACPI. The device implements the _BBN method to return the PCI bus number to the guest OS. Each PCI bus keeps track of the resources that is decodes for devices configured on the bus: i/o, mmio (32-bit) and mmio (64-bit). These windows are advertised to the guest via the _CRS object of the root device. Bus 0 is treated specially since it consumes the I/O ports to access the PCI config space [0xcf8-0xcff]. It also decodes the legacy I/O ports that are consumed by devices on the LPC bus. For this reason the LPC bridge can be configured only on bus 0. The bus number can be specified using the following command line option to bhyve(8): "-s <bus>:<slot>:<func>,<emul>[,<config>]" Discussed with: grehan@ Reviewed by: jhb@
* Provide an indication a "PIO Setup Device to Host FIS" occurred while executingtychon2014-02-121-3/+13
| | | | | | | | | the IDENTIFY DEVICE and IDENTIFY PACKET DEVICE commands. Also, provide an indication a "D2H Register FIS" occurred during a SET FEATURES command. Approved by: grehan (co-mentor)
* Mark the I/O ports used by the bhyve console and debug devices as systemjhb2014-02-072-0/+6
| | | | | | resources. MFC after: 1 week
* Enhance the support for PCI legacy INTx interrupts and enable them injhb2014-01-2912-120/+323
| | | | | | | | | | | | | | | | | | | | | | | | | the virtio backends. - Add a new ioctl to export the count of pins on the I/O APIC from vmm to the hypervisor. - Use pins on the I/O APIC >= 16 for PCI interrupts leaving 0-15 for ISA interrupts. - Populate the MP Table with I/O interrupt entries for any PCI INTx interrupts. - Create a _PRT table under the PCI root bridge in ACPI to route any PCI INTx interrupts appropriately. - Track which INTx interrupts are in use per-slot so that functions that share a slot attempt to distribute their INTx interrupts across the four available pins. - Implicitly mask INTx interrupts if either MSI or MSI-X is enabled and when the INTx DIS bit is set in a function's PCI command register. Either assert or deassert the associated I/O APIC pin when the state of one of those conditions changes. - Add INTx support to the virtio backends. - Always advertise the MSI capability in the virtio backends. Submitted by: neel (7) Reviewed by: neel MFC after: 2 weeks
* Remove support for legacy PCI devices. These haven't been needed sincejhb2014-01-275-55/+10
| | | | | | | support for LPC uart devices was added and it conflicts with upcoming patches to add PCI INTx support. Reviewed by: neel
* Fix issue with stale fields from a recycled request pulled off the freelist.tychon2014-01-221-0/+2
| | | | Approved by: grehan (co-mentor)
* Increase the block-layer backend maximum number of requests to matchtychon2014-01-221-1/+1
| | | | | | | the AHCI command queue depth. This allows a slew of commands issued by a Linux guest to be absorbed without error. Approved by: grehan (co-mentor)
* Fix issue with the virtio descriptor region being truncatedgrehan2014-01-091-1/+1
| | | | | | | | | | if it was above 4GB. This was seen with CentOS 6.5 guests with large RAM, since the block drivers are loaded late in the boot sequence and end up allocating descriptor memory from high addresses. Reported by: Michael Dexter MFC after: 3 days
* virtio-block does not exist, the correct name is virtio-blk.remko2014-01-081-1/+1
| | | | | | | PR: 185573 Submitted by: Allan Jude Facilitated by: Snow B.V. MFC after: 3 days
* Cosmetic change - switch over to vertical SRCS to make itgrehan2014-01-031-5/+31
| | | | | | easier to keep files in alpha order. Reviewed by: neel
* Rework the DSDT generation code a bit to generate more accurate info aboutjhb2014-01-0212-115/+417
| | | | | | | | | | | | | | | | | | | | | | | | | LPC devices. Among other things, the LPC serial ports now appear as ACPI devices. - Move the info for the top-level PCI bus into the PCI emulation code and add ResourceProducer entries for the memory ranges decoded by the bus for memory BARs. - Add a framework to allow each PCI emulation driver to optionally write an entry into the DSDT under the \_SB_.PCI0 namespace. The LPC driver uses this to write a node for the LPC bus (\_SB_.PCI0.ISA). - Add a linker set to allow any LPC devices to write entries into the DSDT below the LPC node. - Move the existing DSDT block for the RTC to the RTC driver. - Add DSDT nodes for the AT PIC, the 8254 ISA timer, and the LPC UART devices. - Add a "SuperIO" device under the LPC node to claim "system resources" aling with a linker set to allow various drivers to add IO or memory ranges that should be claimed as a system resource. - Add system resource entries for the extended RTC IO range, the registers used for ACPI power management, the ELCR, PCI interrupt routing register, and post data register. - Add various helper routines for generating DSDT entries. Reviewed by: neel (earlier version)
* Restructure the VMX code to enter and exit the guest. In large part this changeneel2014-01-011-1/+3
| | | | | | | | | | | | | hides the setjmp/longjmp semantics of VM enter/exit. vmx_enter_guest() is used to enter guest context and vmx_exit_guest() is used to transition back into host context. Fix a longstanding race where a vcpu interrupt notification might be ignored if it happens after vmx_inject_interrupts() but before host interrupts are disabled in vmx_resume/vmx_launch. We now called vmx_inject_interrupts() with host interrupts disabled to prevent this. Suggested by: grehan@
* Extend the ACPI power management support to wire a virtual power button upjhb2013-12-287-38/+212
| | | | | | | | | | | | | | | | | | | | to SIGTERM when ACPI is enabled. Sending SIGTERM to the hypervisor when an ACPI-aware OS is running will now trigger a soft-off allowing for a graceful shutdown of the guest. - Move constants for ACPI-related registers to acpi.h. - Implement an SMI_CMD register with commands to enable and disable ACPI. Currently the only change when ACPI is enabled is to enable the virtual power button via SIGTERM. - Implement a fixed-feature power button when ACPI is enabled by asserting PWRBTN_STS in PM1_EVT when SIGTERM is received. - Add support for EVFILT_SIGNAL events to mevent. - Implement support for the ACPI system command interrupt (SCI) and assert it when needed based on the values in PM1_EVT. Mark the SCI as active-low and level triggered in the MADT and MP Table. - Mark PCI interrupts in the MP Table as active-low in addition to level triggered. Reviewed by: neel
* Use pthread_once() to replace a static integer initted flag.jhb2013-12-281-7/+3
| | | | Reviewed by: neel
* Support soft power-off via the ACPI S5 state for bhyve guests.jhb2013-12-245-12/+174
| | | | | | | | | | | | | | | | | - Implement the PM1_EVT and PM1_CTL registers required by ACPI. The PM1_EVT register is mostly a dummy as bhyve doesn't support any of the hardware-initiated events. The only bit of PM1_CNT that is implemented are the sleep request bits (SPL_EN and SLP_TYP) which request a graceful power off for S5. In particular, for S5, bhyve exits with a non-zero value which terminates the loop in vmrun.sh. - Emulate the Reset Control register at I/O port 0xcf9 and advertise it as the reset register via ACPI. - Advertise an _S5 package. - Extend the in/out interface to allow an in/out handler to request that the hypervisor trigger a reset or power-off. - While here, note that all vCPUs in a guest support C1 ("hlt"). Reviewed by: neel (earlier version)
* Extend the support for local interrupts on the local APIC:jhb2013-12-232-0/+42
| | | | | | | | | | | | | | | | | | | - Add a generic routine to trigger an LVT interrupt that supports both fixed and NMI delivery modes. - Add an ioctl and bhyvectl command to trigger local interrupts inside a guest. In particular, a global NMI similar to that raised by SERR# or PERR# can be simulated by asserting LINT1 on all vCPUs. - Extend the LVT table in the vCPU local APIC to support CMCI. - Flesh out the local APIC error reporting a bit to cache errors and report them via ESR when ESR is written to. Add support for asserting the error LVT when an error occurs. Raise illegal vector errors when attempting to signal an invalid vector for an interrupt or when sending an IPI. - Ignore writes to reserved bits in LVT entries. - Export table entries the MADT and MP Table advertising the stock x86 config of LINT0 set to ExtInt and LINT1 wired to NMI. Reviewed by: neel (earlier version)
* mdoc: nuke whitespace.joel2013-12-231-1/+1
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* Add a parameter to 'vcpu_set_state()' to enforce that the vcpu is in the IDLEneel2013-12-221-13/+2
| | | | | | | | | | | | | state before the requested state transition. This guarantees that there is exactly one ioctl() operating on a vcpu at any point in time and prevents unintended state transitions. More details available here: http://lists.freebsd.org/pipermail/freebsd-virtualization/2013-December/001825.html Reviewed by: grehan Reported by: Markiyan Kushnir (markiyan.kushnir at gmail.com) MFC after: 3 days
* Add an option to ignore accesses by the guest to unimplemented MSRs.neel2013-12-194-14/+58
| | | | | | | Also, ignore a couple of SandyBridge uncore PMC MSRs that Centos 6.4 writes to during boot. Reviewed by: grehan
* Rename the ambiguously named 'vm_setup_msi()' and 'vm_setup_msix()' toneel2013-12-181-11/+9
| | | | | | 'vm_setup_pptdev_msi()' and 'vm_setup_pptdev_msix()' respectively. It should now be clear that these functions operate on passthru devices.
* Add an API to deliver message signalled interrupts to vcpus. This allowsneel2013-12-163-36/+31
| | | | | | | | callers treat the MSI 'addr' and 'data' fields as opaque and also lets bhyve implement multiple destination modes: physical, flat and clustered. Submitted by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com) Reviewed by: grehan@
* mdoc: sort SEE ALSO.joel2013-12-151-2/+2
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* bhyve(8) man page.grehan2013-12-132-2/+300
| | | | | | | mdoc formatting and much input and review from Warren Block (wblock@). Reviewed by: many MFC after: 3 days
* If a vcpu disables its local apic and then executes a 'HLT' then spin down theneel2013-12-071-4/+28
| | | | | | | | | | | | vcpu and destroy its thread context. Also modify the 'HLT' processing to ignore pending interrupts in the IRR if interrupts have been disabled by the guest. The interrupt cannot be injected into the guest in any case so resuming it is futile. With this change "halt" from a Linux guest works correctly. Reviewed by: grehan@ Tested by: Tycho Nightingale (tycho.nightingale@pluribusnetworks.com)
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