summaryrefslogtreecommitdiffstats
path: root/usr.sbin/bhyve/pci_emul.c
Commit message (Expand)AuthorAgeFilesLines
* Fix a ton of speelling errorseadler2015-10-211-1/+1
* Advertise an additional memory BAR in the "dummy" device emulation.neel2015-05-021-15/+23
* Don't allow guest to modify readonly bits in the PCI config 'status' register.neel2015-04-241-38/+49
* Support PCI extended config space in bhyve.neel2014-08-081-76/+142
* Provide APIs to directly get 'lowmem' and 'highmem' size directly.neel2014-06-241-2/+1
* r267169 should apply to 64-bit BARs as well.tychon2014-06-091-2/+2
* Some devices (e.g. Intel AHCI and NICs) support quad-word access totychon2014-06-061-4/+21
* Implement a PCI interrupt router to route PCI legacy INTx interrupts tojhb2014-05-151-55/+122
* Don't allow MPtable generation if there are multiple PCI hierarchies. This isneel2014-05-021-0/+7
* Respect and track the enable bit in the PCI configuration address word.grehan2014-04-251-5/+9
* Use calloc() in favor of malloc + memset.delphij2014-04-221-6/+3
* Add a check to validate that memory BARs of passthru devices are 4KB aligned.neel2014-02-181-5/+1
* Tweak the handling of PCI capabilities in emulated devices to removejhb2014-02-181-46/+24
* Allow PCI devices to be configured on all valid bus numbers from 0 to 255.neel2014-02-141-97/+242
* Enhance the support for PCI legacy INTx interrupts and enable them injhb2014-01-291-35/+173
* Remove support for legacy PCI devices. These haven't been needed sincejhb2014-01-271-17/+2
* Rework the DSDT generation code a bit to generate more accurate info aboutjhb2014-01-021-8/+92
* Add an API to deliver message signalled interrupts to vcpus. This allowsneel2013-12-161-20/+13
* Add an ioctl to assert and deassert an ioapic pin atomically. This will be usedneel2013-11-231-2/+10
* Move the ioapic device model from userspace into vmm.ko. This is needed forneel2013-11-121-3/+2
* Fix an off-by-one error when iterating over the emulated PCI BARs.neel2013-11-061-1/+1
* Add support for PCI-to-ISA LPC bridge emulation. If the LPC bus is attachedneel2013-10-291-54/+12
* Allow a 4-byte write to PCI config space to overlapgrehan2013-10-091-3/+12
* Merge projects/bhyve_npt_pmap into head.neel2013-10-051-1/+1
* Allow single byte reads of the emulated MSI-X tables. This is not requiredneel2013-08-271-3/+9
* Fix ordering of legacy IRQ reservations.grehan2013-08-161-10/+10
* Support an optional "mac=" parameter to virtio-net config, to allowgrehan2013-07-041-6/+15
* Fix up option parsing to allow a colon in the config section.grehan2013-07-011-13/+8
* Allow the PCI config address register to be read. The Linuxgrehan2013-06-281-11/+21
* Gripe if some <slot,function> tuple is specified more than once instead ofneel2013-04-261-15/+38
* Setup accesses to the memory hole below 4GB to return all 1's on read andneel2013-04-171-9/+15
* Improve PCI BAR emulation:neel2013-04-101-41/+223
* Simplify the assignment of memory to virtual machines by requiring a singleneel2013-03-181-4/+7
* Add the ability to have a 'fallback' search for memory ranges.grehan2013-02-221-0/+31
* Advertise PCI-E capability in the hostbridge device presented to the guest.neel2013-02-151-0/+35
* Fix a bug in the passthru implementation where it would assume that allneel2013-02-011-0/+20
* Add support for MSI-X interrupts in the virtio network device and make thatneel2013-01-301-3/+205
* Rename fbsdrun.* -> bhyverun.*grehan2012-12-131-1/+1
* Ignore PCI configuration accesses to all bus numbers other than PCI bus 0.neel2012-10-271-1/+5
* Remove mptable generation code from libvmmapi and move it to bhyve.grehan2012-10-261-201/+1
* Rework how guest MMIO regions are dealt with.grehan2012-10-191-51/+170
* Fix a bug in how a 64-bit bar in a pci passthru device would be presented toneel2012-08-061-1/+6
* Add support for emulating PCI multi-function devices.neel2012-08-061-54/+146
* Device model for ioapic emulation.neel2012-08-051-2/+3
* Use the correct variable to index into the 'lirq[]' array to check the legacyneel2012-08-041-1/+1
* Add 16550 uart emulation as a PCI device. This allows it togrehan2012-05-031-8/+99
* MSI-x interrupt support for PCI pass-thru devices.grehan2012-04-281-0/+29
* First cut to port bhyve, vmmctl, and libvmmapi to HEAD.jhb2011-05-151-3/+3
* Import of bhyve hypervisor and utilities, part 1.grehan2011-05-131-0/+976
OpenPOWER on IntegriCloud