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* Better implement SMP support:marcel2001-12-303-101/+180
* o Reimplement map_pal_code to work with a global variablemarcel2001-12-301-51/+37
* Make vhpt_base and vhpt_size globals so that they can be used bymarcel2001-12-301-1/+2
* Cleanup the IPIs.marcel2001-12-301-8/+7
* Remove unused MD fields (pc_pending_ipis, pc_next_asn andmarcel2001-12-301-3/+3
* o Remove temporary implementation of cpu_throw in vm_machdep.cmarcel2001-12-302-10/+24
* Protect mtx_init() invocations with mtx_intialized() checks to avoid agj2001-12-3016-30/+60
* Draft implementation of IPI handling.marcel2001-12-301-1/+19
* Add PC_IDLETHREAD. We need it in cpu_switch.marcel2001-12-301-0/+1
* Add missing predicate in interruption_Data_TLB. Without thismarcel2001-12-302-46/+46
* Increase the buffer size to hold a bootp/DHCP reply from 256 bytes toambrisko2001-12-301-1/+1
* Sync with NetBSD (1.16 - 1.17)joe2001-12-291-32/+13
* Update with missing filenames, merged from NetBSD.joe2001-12-291-1/+10
* Fix an error which could cause a panic if both an ifpi and ifpi2 controllergj2001-12-292-5/+5
* Make these compile.jake2001-12-293-24/+18
* Remove local change that crept in.jake2001-12-291-1/+0
* Don't reveal a router in the IPSTEALTH mode through IP options.yar2001-12-291-4/+41
* Add a header for user trap types required by the sparc abi.jake2001-12-291-0/+84
* Adapt for used by upcoming fp emulation code.jake2001-12-291-62/+41
* Print the correct v9 opcodes.jake2001-12-291-18/+18
* Don't concatenate __func__.jake2001-12-291-1/+1
* sparc64 needs the same alingment fixes that alpha and ia64 do.jake2001-12-291-1/+1
* sparc64 needs the same alignment fixes that ia64 and alpha need.jake2001-12-291-1/+1
* Change traces in hardclock and statclock to use the KTR_CLK tracejake2001-12-291-2/+2
* Update to new constants.jake2001-12-291-34/+34
* Make cont in ddb work.jake2001-12-291-0/+1
* Prototype dcache_inval_phys.jake2001-12-291-0/+1
* Add comments as to why VM_MAXUSER_ADDRESS is magic (abitrary).jake2001-12-291-6/+21
* Make tte bit constants explicitly unsigned and long.jake2001-12-291-46/+33
* Add definitions for dcache color bits, which may move to cache.h.jake2001-12-291-6/+36
* Implement pv entries as separate structures from the ttes, like otherjake2001-12-291-162/+29
* Remove support for multi level tsbs, making this code much simpler andjake2001-12-292-356/+103
* Implement pv entries as separate structures from the ttes, as otherjake2001-12-291-172/+177
* Great pmap rewrite to use a much simpler one level tsb of ttes, insteadjake2001-12-291-430/+867
* Use fprs to track floating register usage. Clear it once we've savedjake2001-12-292-344/+270
* Add .register directives for gcc3.jake2001-12-292-1372/+1634
* Add needed include of fsr.h.jake2001-12-291-5/+5
* 1. Adapt to new trap types.jake2001-12-291-137/+149
* Add .register directives for gcc3.jake2001-12-292-34/+74
* Assert at compile time that structures which need to be a power ofjake2001-12-291-6/+10
* Remove a debug printf.jake2001-12-291-70/+59
* intr_handlers is an array of function pointers, not small structures.jake2001-12-291-2/+5
* Add .register directive for gcc3.jake2001-12-292-4/+16
* 1. Make this more name space friendly (* -> emul_*).jake2001-12-291-20/+16
* Be paranoid about the sizeof passed to db_get_value, not all trapframejake2001-12-291-136/+91
* Implement dcache_inval_phys, which shoots the cache lines that correspondjake2001-12-291-4/+29
* Make AIO a loadable module.alfred2001-12-2918-112/+242
* Rename definitions to better match the hardware wstate fields.jake2001-12-291-2/+2
* Add definitions for TSTATE_MM_* and TSTATE_{I,X}CC_*.jake2001-12-291-0/+10
* Rename and renumber trap types to comply with the user trap types asjake2001-12-291-40/+54
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