| Commit message (Collapse) | Author | Age | Files | Lines |
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Ensure that resume path on amd64 only accesses page tables for normal
operation after processor is configured to allow all required
features.
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Avoid use of contiguous memory allocations in busdma when possible.
This patch improves the boundary checks in busdma to allow more cases
using the regular page based kernel memory allocator. Especially in
the case of having a non-zero boundary in the parent DMA tag. For
example AMD64 based platforms set the PCI DMA tag boundary to
PCI_DMA_BOUNDARY, 4GB, which before this patch caused contiguous
memory allocations to be preferred when allocating more than PAGE_SIZE
bytes. Even if the required alignment was less than PAGE_SIZE bytes.
This patch also fixes the nsegments check for using kmem_alloc_attr()
when the maximum segment size is less than PAGE_SIZE bytes.
Updated some comments describing the code in question.
Differential Revision: https://reviews.freebsd.org/D10645
Reviewed by: kib, jhb, gallatin, scottl
Sponsored by: Mellanox Technologies
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Sponsored by: Citrix Systems R&D
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Correct calculation of the entry->free_down in the invariants-checking
code.
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processors
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Timeout DMAR commands.
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Provide less laborius way to enable busdma DMAR to only short list of devices.
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Avoid leaking allocated but unused context after creation race.
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Do not create RMRR entries for identity-mapped domains.
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Slight cleanup of the comment.
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Release DMAR table after using it.
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x86/srat: fix parsing of APIC IDs > MAX_APIC_ID
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- Merge ACPICA 20170303.
- Remove '-vd' option to make iasl(8) reproducible.
Relnotes: yes
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r315361
Add the AMD MONITORX/MWAITX feature definition introduced in
Bulldozer/Ryzen CPUs.
r315364
Hide the AMD MONITORX/MWAITX capability.
Otherwise, recent Linux guests will use these instructions, resulting
in #UD exceptions since bhyve doesn't implement MONITOR/MWAIT exits.
This fixes boot-time hangs in recent Linux guests on Ryzen CPUs
(and probably Bulldozer aka AMD FX as well).
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Remove cpu_deepest_sleep variable.
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Merge i386 and amd64 mtrr drivers.
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For i386, remove config options CPU_DISABLE_CMPXCHG, CPU_DISABLE_SSE
and device npx.
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Define the vm_ooffset_t and vm_pindex_t types as machine-independend.
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Remove __nonnull() attributes from x86 machine check architecture.
In this case the attributes serve little purpose as they just don't
enforce run time checks, If anything the attributes would cause NULL pointer
checks to be ignored but there are no such checks so the only effect is
cosmetic.
Reviewed by: jhb, avg
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Allow ACPI wakeup code and page tables to be stored in non-contiguous pages.
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310048
hyperv: Implement "enlightened" time counter, which is rdtsc based.
Reviewed by: kib
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D8763
310101
hyperv: Allow userland to ro-mmap reference TSC page
This paves way to implement VDSO for the enlightened time counter.
Reviewed by: kib
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D8768
310239
hyperv: Implement userspace gettimeofday(2) with Hyper-V reference TSC
This 6 times gettimeofday performance, as measured by
tools/tools/syscall_timing
Reviewed by: kib
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D8789
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Mark a bunch of mpsafe sysctls as such.
This gives me a sysctl Giant-free buildworld.
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Require the STACK option for code that captures stacks of running threads.
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Require the STACK option for code that captures stacks of running threads.
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Prefix hex memory addresses with 0x in diagnostic messages from the
SRAT parser.
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Rename fast taskqueues used by DMAR.
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Fix automatic eventtimer hardware selection when ARAT is not implemented,
and do not ignore TSCDLT.
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Use the same logic to calculate the nominal CPU frequency from the P-state
MSRs on family 0x12, 0x15, and 0x16 CPUs as is used for family 0x10.
Family 0x14 was included in the original patch in the PR but I left that
out as the BIOS writer's guide for family 0x14 CPUs show a different layout
for the relevant MSR and include a different formulate for calculating the
frequency.
While here, simplify a few expressions and print out the family of
unsupported CPUs in hex rather than decimal.
PR: 212020
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303753:
Don't permit mappings of invalid physical addresses on amd64 via /dev/mem.
308004:
MFamd64: Add bounds checks on addresses used with /dev/mem.
Reject attempts to read from or memory map offsets in /dev/mem that are
beyond the maximum-supported physical address of the current CPU.
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All I/O APIC pins are masked when an I/O APIC is first probed. The
APIC enumerator (MP Table or MADT) then parses its associated tables to
configure individual pins to set custom delivery modes or alternate
routing (e.g. routing IRQ 0 to intpin 2). Pins for regular interrupt
pins are left masked until the first interrupt is assigned. However,
pins with unusual settings (e.g. NMI or SMI) are never assigned an
interrupt and thus never re-programmed. The I/O APIC code used to
reprogram all interrupt pins during registration but this was lost in
r151979.
In theory, this is mostly a no-op as the ACPI APIC table does not
include a way to enumerate NMI or SMI pins for the I/O APIC, so only
systems using an MP Table would be affected.
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Handle broadcast NMIs.
MFC r307880:
Follow-up to r307866.
MFC r308030:
Use correct cpu id in the banner.
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The 'cpu' and 'cpu_class' variables were always set to the same value
on amd64 and are legacy holdovers from i386. Remove them entirely on
amd64.
Requested by: kib (MFC)
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vm86 mode.
MFC r304085 (by bde):
Fix the variables $esp, $ds, $es, $fs, $gs and $ss in vm86 mode. Fix
PC_REGS() so that printing of instructions works in some useful cases.
MFC r304962 (by bde):
Expand error messages: print symbol names, parentheses and shift tokens,
and negative shift counts. Fix error messages.
MFC r305612 (by bde):
Fix single-stepping of instructions emulated by vm86.
MFC r305661 (by bde):
Give the full syntax of the 'count' arg for all commmands that support
it. Give the full syntax of the 'addr' arg for these commands and some
others. Rename it from 'address' for the generic command. Fix
description of how 'count' is supposed to work for the 'break'
command.
Don't (mis)describe the syntax of the comma for the 'step' command.
Expand the description for the generic command.
Give the full syntax for the 'examine' command. It was also missing
the possible values for the modifier.
MFC r305663 (by bde):
Fix stopping when the specified breakpoint count is reached.
MFC r305665 (by bde):
Pass the trap type and code down from db_trap() to db_stop_at_pc() so
that the latter can easily determine what the trap type actually is
after callers are fixed to encode the type unambigously.
MFC r305807 (by bde):
Use the MI macro TRAPF_USERMODE() instead of open-coded checks for
SEL_UPL and sometimes PSL_VM. Fix logic errors in treating vm86
bioscall mode as kernel mode. The main place checked all the
necessary flags, but put the necessary parentheses for the PSL_VM and
PCB_VM86CALL checks in the wrong place.
MFC r305811 (by bz):
Try to fix LINT builds after r305807.
MFC r305840 (by bde):
Abort single stepping in ddb if the trap is not for single-stepping.
MFC r305862 (by bde):
Ifdef the new dr6 variable for KDB.
MFC r305864 (by bde):
Statically initialize the run mode to the one that will become current
on first entry. Don't reset to the run mode to STEP_NONE when
stopping, and remove STEP_NONE.
MFC r305865 (by bde):
Fix decoding of tf_rsp on amd64, and move TF_HAS_STACKREGS() to the
i386-only section, and fix a comment about the amd64 kernel trapframe
not having stackregs.
MFC r305897 (by bde):
Silently ignore unexpected single-step traps.
MFC r306311 (by bde):
Determine the operand/address size of %cs in a new function
db_segsize(). Use db_segsize() to set the default operand/address
size for disassembling.
Fix db_print_loc_and_inst() to ask for the normal format and not the
alternate in normal operation. Use db_segsize() to avoid trying to
print a garbage stack trace if %cs is 16 bits.
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Fix typo.
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Reduce the cost of TLB invalidation on x86 by using per-CPU completion flags.
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x86/ioapic: Fix destination cpu for Hyper-V
On Hyper-V:
- Stick to the first cpu for all I/O APIC pins.
- And don't allow destination cpu changes.
Reviewed by: jhb
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D7949
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x86: Use sx lock for interrupt sources.
- Certain pic_assign_cpu, e.g. msi_assign_cpu can have quite a long
call chain. For msi_assign_cpu, mutex makes complex PCI bridge
drivers more tricky, e.g. sleep can note be called, etc, it will
be pretty tricky for upcoming Hyper-V PCI bridge driver for PCI
pass-through.
- It is not used on any hot code path nor non-sleepable context, so
sx should have the same effect as mutex.
PIC list is still protected by mutex to keep suspend/resume work.
Discussed with: jhb
Reviewed by: jhb
Sponsored by: Microsoft
Differential Revision: https://reviews.freebsd.org/D7784
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Fix a few places that were passing a raw string as the format to use
a "%s" format string instead.
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Detect x2APIC mode on boot and obey it.
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- Add constants for the fields in the root-entry table address register,
namely the root type type (RTT) and root table address (RTA) mask.
- Add macros for the bitmask of the domain ID field in the second word
of context table entries as well as a helper macro (DMAR_CTX2_GET_DID)
to extract the domain ID from a context table entry.
Sponsored by: Chelsio Communications
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Implement userspace gettimeofday(2) with HPET timecounter.
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Fix typo in comment.
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Move msix_disable_migration under #ifdef SMP since it doesn't make sense
for !SMP kernels.
PR: 212014
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sys: replace comma with semicolon when pertinent.
Uses of commas instead of a semicolons can easily go undetected. The comma
can serve as a statement separator but this shouldn't be abused when
statements are meant to be standalone.
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