| Commit message (Expand) | Author | Age | Files | Lines |
* | Merge nexus.c from amd64 and i386 to x86 subtree. | attilio | 2010-10-28 | 1 | -0/+814 |
* | Merge the mptable support from MD bits to x86 subtree. | attilio | 2010-10-28 | 2 | -0/+1232 |
* | Style fix. | attilio | 2010-10-26 | 1 | -2/+2 |
* | Remove usage of PRI* macro for style compliancy. | attilio | 2010-10-26 | 1 | -4/+3 |
* | Merge dump_machdep.c i386/amd64 under the x86 subtree. | attilio | 2010-10-26 | 1 | -0/+374 |
* | Use 'saveintr' instead of 'savecrit' or 'eflags' to hold the state returned | jhb | 2010-10-25 | 1 | -6/+6 |
* | atrtc: remove (pre-)historic check of RTC NVRAM at address 0x0e | avg | 2010-10-16 | 1 | -4/+1 |
* | Restore pre-r212778 optimization, skipping timer reprogramming when it is | mav | 2010-09-18 | 1 | -19/+27 |
* | Add one-shot mode support to attimer (i8254) event timer. | mav | 2010-09-17 | 1 | -44/+71 |
* | Few whitespace cleanups and comments tunings. | mav | 2010-09-16 | 1 | -10/+12 |
* | Refactor timer management code with priority to one-shot operation mode. | mav | 2010-09-13 | 1 | -1/+1 |
* | Each processor socket in a QPI system has a special PCI bus for the | jhb | 2010-09-07 | 1 | -13/+45 |
* | When DTrace is enabled, make sure we don't overwrite the IDT_DTRACE_RET | rpaulo | 2010-08-30 | 1 | -0/+25 |
* | Correctly ensure that the CPU family is 0x6, not non-zero. | jhb | 2010-08-25 | 1 | -1/+2 |
* | Intel QPI chipsets actually provide two extra "non-core" PCI buses that | jhb | 2010-08-25 | 1 | -0/+286 |
* | Enable timer interrupt before starting timer. This allows to handle very | mav | 2010-08-24 | 1 | -8/+7 |
* | When performing a sanity check on the SRAT table to ensure that each | jhb | 2010-07-29 | 1 | -1/+2 |
* | The corrected error count field is dependent on CMCI, not TES. | jhb | 2010-07-28 | 1 | -1/+1 |
* | Add a parser for the ACPI SRAT table for amd64 and i386. It sets | jhb | 2010-07-27 | 1 | -0/+329 |
* | Increment td->td_intr_nesting_level for LAPIC timer interrupts. Among other | mav | 2010-07-24 | 1 | -0/+2 |
* | Fix several un-/signedness bugs of r210290 and r210293. Add one more check. | mav | 2010-07-20 | 3 | -7/+8 |
* | Extend timer driver API to report also minimal and maximal supported period | mav | 2010-07-20 | 3 | -1/+21 |
* | Move timeevents.c to MI code, as it is not x86-specific. I already have | mav | 2010-07-14 | 1 | -508/+0 |
* | Remove some unneeded includes. Code now can be built on ARM. | mav | 2010-07-14 | 1 | -3/+0 |
* | Rise knowledge about curthread->td_intr_frame by one step. Make timer | mav | 2010-07-13 | 4 | -13/+7 |
* | Unify pc98 event timer code with the rest of x86. | mav | 2010-07-13 | 1 | -0/+97 |
* | Instead of deleting existing IRQ resource, which is not really working for | mav | 2010-07-12 | 2 | -3/+13 |
* | Make kernel panic with reasonable message if no usable event timer found. | mav | 2010-07-11 | 1 | -0/+2 |
* | Allow attimer to be hinted at ISA if not reported by ISA PNP or ACPI. | mav | 2010-07-01 | 2 | -7/+12 |
* | Rework r209456: | mav | 2010-07-01 | 2 | -2/+4 |
* | Do not trust IRQ reported by ACPI. There are cases when it is wrong. | mav | 2010-06-23 | 2 | -0/+2 |
* | Add "legacy route" support to HPET driver. When enabled, this mode makes | mav | 2010-06-22 | 2 | -28/+32 |
* | Fix i386 LINT build broken by r209371. | mav | 2010-06-21 | 1 | -0/+3 |
* | Implement new event timers infrastructure. It provides unified APIs for | mav | 2010-06-20 | 4 | -354/+845 |
* | Core i5, same as previously Core2Duo, found to not set P-state for single | mav | 2010-06-19 | 1 | -6/+2 |
* | Restore the machine check register banks on resume. For banks being | jhb | 2010-06-15 | 1 | -19/+66 |
* | Virtualize pci_remap_msi_irq() call from general MSI code. It allows MSI | mav | 2010-06-14 | 1 | -1/+2 |
* | Update several places that iterate over CPUs to use CPU_FOREACH(). | jhb | 2010-06-11 | 1 | -4/+2 |
* | Do not disable edge-triggered interrupts before migration. DELAY() with | mav | 2010-06-10 | 1 | -1/+1 |
* | Move the MD support for PCI message signalled interrupts to the x86 tree | jhb | 2010-06-08 | 1 | -0/+602 |
* | Move the machine check support code to the x86 tree since it is identical | jhb | 2010-06-08 | 1 | -0/+889 |
* | Move the I/O APIC code to the x86 tree since it is identical on i386 and | jhb | 2010-06-08 | 1 | -0/+922 |
* | Add support for corrected machine check interrupts. CMCI is a new local | jhb | 2010-05-24 | 1 | -1/+39 |
* | - Implement MI helper functions, dividing one or two timer interrupts with | mav | 2010-05-24 | 2 | -83/+16 |
* | Restore different APIC init orders for i386 and amd64 unified in r208452. | mav | 2010-05-24 | 1 | -2/+24 |
* | Unify local_apic.c for x86 archs, | mav | 2010-05-23 | 1 | -0/+1437 |
* | Fix another instance of lapic_cyclic_clock_func. | rpaulo | 2010-04-20 | 1 | -2/+2 |
* | Default the machdep.lapic_allclocks to be enabled in order to cope with | attilio | 2010-04-09 | 1 | -1/+1 |
* | Improving the clocks auto-tunning by firstly checking if the atrtc may be | attilio | 2010-03-03 | 1 | -5/+20 |
* | Introduce the new kernel sub-tree x86 which should contain all the code | attilio | 2010-02-25 | 17 | -0/+7491 |