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* Restructure the MSR handling so it is entirely handled by processor-specificneel2014-09-201-0/+4
* Migrate ie->ie_assign_cpu and associated code to use an int for CPU ratheradrian2014-09-171-2/+2
* xen: don't set suspend/resume methods for the PIRQ PICroyger2014-09-151-2/+0
* To workaround an errata on certain Pentium Pro CPUs, i386 disablesjhb2014-09-101-10/+1
* Move code to set various MSRs on AMD cpus out of printcpuinfo() andjhb2014-09-101-19/+0
* Add a define for index of IA32_XSS MSR, which is, per SDM rev. 50, ankib2014-09-061-0/+2
* SDM rev. 50 defines the use of the next 8 bytes in the xstate header.kib2014-09-061-1/+3
* Add more bits for the XSAVE features from CPUID 0xd, sub-function 1kib2014-09-062-0/+16
* Create a separate structure for per-CPU state saved across suspend andjhb2014-09-061-18/+21
* Merge the amd64 and i386 identcpu.c into a single x86 implementation.jhb2014-09-041-0/+1989
* - Move blacklists of broken TSCs out of the printcpuinfo() functionjhb2014-09-041-0/+33
* Save and restore FPU state across suspend and resume. In earlier revisionsjhb2014-08-301-0/+10
* atpic: make sure atpic_init is called after IO APIC initializationroyger2014-08-071-1/+1
* xen: add ACPI bus to xen_nexus when running as Dom0royger2014-08-042-3/+39
* xen: implement support for mapping IO APIC interrupts on Xenroyger2014-08-042-0/+117
* x86/madt: make the interrupt override parser a public functionroyger2014-08-042-30/+50
* xen: change quality of the MADT ACPI enumeratorroyger2014-08-042-2/+2
* xen: change order of Xen intr init and IO APIC registrationroyger2014-08-042-2/+2
* xen: add a DDB command to print event channel informationroyger2014-08-041-0/+77
* xen: mask all event channels on initroyger2014-08-041-0/+4
* xen: implement event channel PIRQ supportroyger2014-08-041-18/+202
* - Output a summary of optional VT-x features in dmesg similar to CPUjhb2014-07-301-0/+19
* Fix yet another comment typo in r269052.marius2014-07-291-1/+1
* Fix comment typo in r269052.marius2014-07-291-1/+1
* Add missing newline to output dmesg properly.akiyama2014-07-281-2/+2
* Add error return to dumpsys(), and use it in doadump().gavin2014-07-251-3/+4
* Intel desktop Haswell CPUs may report benign corrected parity errors (seemarius2014-07-241-0/+26
* Fix build with SMP disabled.jhb2014-07-152-0/+8
* Remove ia64.marcel2014-07-072-4/+4
* Pull in r267961 and r267973 again. Fix for issues reported will follow.hselasky2014-06-287-19/+6
* Revert r267961, r267973:gjb2014-06-277-6/+19
* Extend the meaning of the CTLFLAG_TUN flag to automatically check ifhselasky2014-06-277-19/+6
* Fix compile warning: Remove duplicate external declaration.hselasky2014-06-191-2/+0
* xen: fix out-of-bounds access to ipi_handleroyger2014-06-181-1/+1
* Do not reference native_lapic_ipi_*() functions in the UP build.kib2014-06-171-0/+2
* xen: add missing filesroyger2014-06-163-0/+744
* isa: allow ISA bus to attach to xenpv busroyger2014-06-161-0/+5
* xen: add hooks for Xen PV APICroyger2014-06-162-253/+2
* amd64/i386: introduce APIC hooks for different APIC implementations.royger2014-06-163-88/+352
* xen: fix style in pv.croyger2014-06-161-8/+17
* Eliminate the fake contig_dmamap and replace it with a new flag,scottl2014-05-271-12/+13
* Now that there are separate back-end implementations of busdma, the bouncescottl2014-05-271-18/+22
* Revert r266481. It was based on faulty analysis of the problem. A correctscottl2014-05-271-25/+2
* Whitespace fix.jhb2014-05-221-3/+3
* Old PCIe implementations cannot allow a DMA transfer to cross a 4GBscottl2014-05-201-2/+25
* Add definitions for more structured extended features as well asjhb2014-05-161-6/+25
* Make this compile with gcc.imp2014-04-051-0/+1
* Re-implement the DMAR I/O MMU code in terms of PCI RIDsrstone2014-04-016-47/+64
* Revert PCI RID changes.rstone2014-04-016-64/+47
* Re-implement the DMAR I/O MMU code in terms of PCI RIDsrstone2014-04-016-47/+64
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