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* xen/intr: fix the event channel enabled per-cpu maskroyger2015-11-051-18/+14
| | | | | | | | | | | | | Fix two issues with the current event channel code, first ENABLED_SETSIZE is not correctly defined and then using a BITSET to store the per-cpu masks is not portable to other arches, since on arm32 the event channel arrays shared with the hypervisor are of type uint64_t and not long. Partially restore the previous code but switch the bit operations to use the recently introduced xen_{set/clear/test}_bit versions. Reviewed by: Julien Grall <julien.grall@citrix.com> Sponsored by: Citrix Systems R&D Differential Revision: https://reviews.freebsd.org/D4080
* Fix an alignment check that is wrong in half the busdma implementations.ian2015-11-021-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | This will enable the elimination of a workaround in the USB driver that artifically allocates buffers twice as big as they need to be (which actually saves memory for very small buffers on the buggy platforms). When deciding how to allocate a dma buffer, armv4, armv6, mips, and x86/iommu all correctly check for the tag alignment <= maxsize as enabling simple uma/malloc based allocation. Powerpc, sparc64, x86/bounce, and arm64/bounce were all checking for alignment < maxsize; on those platforms when alignment was equal to the max size it would fall back to page-based allocators even for very small buffers. This change makes all platforms use the <= check. It should be noted that on all platforms other than arm[v6] and mips, this check is relying on undocumented behavior in malloc(9) that if you allocate a block of a given size it will be aligned to the next larger power-of-2 boundary. There is nothing in the malloc(9) man page that makes that explicit promise (but the busdma code has been relying on this behavior all along so I guess it works). Arm and mips code uses the allocator in kern/subr_busdma_buffalloc.c, which does explicitly implement this promise about size and alignment. Other platforms probably should switch to the aligned allocator.
* x86/dma_bounce: revert r289834 and r289836royger2015-10-261-186/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new load_ma implementation can cause dereferences when used with certain drivers, back it out until the reason is found: Fatal trap 12: page fault while in kernel mode cpuid = 11; apic id = 03 fault virtual address = 0x30 fault code = supervisor read data, page not present instruction pointer = 0x20:0xffffffff808a2d22 stack pointer = 0x28:0xfffffe07cc737710 frame pointer = 0x28:0xfffffe07cc737790 code segment = base 0x0, limit 0xfffff, type 0x1b = DPL 0, pres 1, long 1, def32 0, gran 1 processor eflags = interrupt enabled, resume, IOPL = 0 current process = 13 (g_down) trap number = 12 panic: page fault cpuid = 11 KDB: stack backtrace: #0 0xffffffff80641647 at kdb_backtrace+0x67 #1 0xffffffff80606762 at vpanic+0x182 #2 0xffffffff806067e3 at panic+0x43 #3 0xffffffff8084eef1 at trap_fatal+0x351 #4 0xffffffff8084f0e4 at trap_pfault+0x1e4 #5 0xffffffff8084e82f at trap+0x4bf #6 0xffffffff80830d57 at calltrap+0x8 #7 0xffffffff8063beab at _bus_dmamap_load_ccb+0x1fb #8 0xffffffff8063bc51 at bus_dmamap_load_ccb+0x91 #9 0xffffffff8042dcad at ata_dmaload+0x11d #10 0xffffffff8042df7e at ata_begin_transaction+0x7e #11 0xffffffff8042c18e at ataaction+0x9ce #12 0xffffffff802a220f at xpt_run_devq+0x5bf #13 0xffffffff802a17ad at xpt_action_default+0x94d #14 0xffffffff802c0024 at adastart+0x8b4 #15 0xffffffff802a2e93 at xpt_run_allocq+0x193 #16 0xffffffff802c0735 at adastrategy+0xf5 #17 0xffffffff80554206 at g_disk_start+0x426 Uptime: 2m29s
* xen: Add missing semi-colon for BITSET_DEFINE()cem2015-10-241-1/+1
| | | | | | | Broken when it was removed from the macro in r289867. Pointy-hat: markj Sponsored by: EMC / Isilon Storage Division
* x86/dma_bounce: rework _bus_dmamap_load_ma implementationroyger2015-10-231-16/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of bus_dmamap_load_ma_triv currently calls _bus_dmamap_load_phys on each page that is part of the passed in buffer. Since each page is treated as an individual buffer, the resulting behaviour is different from the behaviour of _bus_dmamap_load_buffer. This breaks certain drivers, like Xen blkfront. If an unmapped buffer of size 4096 that starts at offset 13 into the first page is passed to the current _bus_dmamap_load_ma implementation (so the ma array contains two pages), the result is that two segments are created, one with a size of 4083 and the other with size 13 (because two independant calls to _bus_dmamap_load_phys are performed, one for each physical page). If the same is done with a mapped buffer and calling _bus_dmamap_load_buffer the result is that only one segment is created, with a size of 4096. This patch relegates the usage of bus_dmamap_load_ma_triv in x86 bounce buffer code to drivers requesting BUS_DMA_KEEP_PG_OFFSET and implements _bus_dmamap_load_ma so that it's behaviour is the same as the mapped version (_bus_dmamap_load_buffer). This patch only modifies the x86 bounce buffer code, other arches are left untouched. Reviewed by: kib, jah Differential Revision: https://reviews.freebsd.org/D888 Sponsored by: Citrix Systems R&D
* Remove unclear comment about address truncation in busdma. Add (hopefully ↵jah2015-10-231-1/+0
| | | | | | much clearer) comment at declaration of PHYS_TO_VM_PAGE(). Noted by: avg
* Decode new values for CPUID leaf 2 cache and TLB descriptors, from thekib2015-10-231-0/+12
| | | | | | | Intel SDM revision 56. Sponsored by: The FreeBSD Foundation MFC after: 1 week
* xen: Code cleanup and small bug fixesroyger2015-10-213-110/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | xen/hypervisor.h: - Remove unused helpers: MULTI_update_va_mapping, is_initial_xendomain, is_running_on_xen - Remove unused define CONFIG_X86_PAE - Remove unused variable xen_start_info: note that it's used inpcifront which is not built at all - Remove forward declaration of HYPERVISOR_crash xen/xen-os.h: - Remove unused define CONFIG_X86_PAE - Drop unused helpers: test_and_clear_bit, clear_bit, force_evtchn_callback - Implement a generic version (based on ofed/include/linux/bitops.h) of set_bit and test_bit and prefix them by xen_ to avoid any use by other code than Xen. Note that It would be worth to investigate a generic implementation in FreeBSD. - Replace barrier() by __compiler_membar() - Replace cpu_relax() by cpu_spinwait(): it's exactly the same as rep;nop = pause xen/xen_intr.h: - Move the prototype of xen_intr_handle_upcall in it: Use by all the platform x86/xen/xen_intr.c: - Use BITSET* for the enabledbits: Avoid to use custom helpers - test_bit/set_bit has been renamed to xen_test_bit/xen_set_bit - Don't export the variable xen_intr_pcpu dev/xen/blkback/blkback.c: - Fix the string format when XBB_DEBUG is enabled: host_addr is typed uint64_t dev/xen/balloon/balloon.c: - Remove set but not used variable - Use the correct type for frame_list: xen_pfn_t represents the frame number on any architecture dev/xen/control/control.c: - Return BUS_PROBE_WILDCARD in xs_probe: Returning 0 in a probe callback means the driver can handle this device. If by any chance xenstore is the first driver, every new device with the driver is unset will use xenstore. dev/xen/grant-table/grant_table.c: - Remove unused cmpxchg - Drop unused include opt_pmap.h: Doesn't exist on ARM64 and it doesn't contain anything required for the code on x86 dev/xen/netfront/netfront.c: - Use the correct type for rx_pfn_array: xen_pfn_t represents the frame number on any architecture dev/xen/netback/netback.c: - Use the correct type for gmfn: xen_pfn_t represents the frame number on any architecture dev/xen/xenstore/xenstore.c: - Return BUS_PROBE_WILDCARD in xctrl_probe: Returning 0 in a probe callback means the driver can handle this device. If by any chance xenstore is the first driver, every new device with the driver is unset will use xenstore. Note that with the changes, x86/include/xen/xen-os.h doesn't contain anymore arch-specific code. Although, a new series will add some helpers that differ between x86 and ARM64, so I've kept the headers for now. Submitted by: Julien Grall <julien.grall@citrix.com> Reviewed by: royger Differential Revision: https://reviews.freebsd.org/D3921 Sponsored by: Citrix Systems R&D
* x86/xen: Consolidate xen-os.h in a single placeroyger2015-10-211-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | amd64 and i386 platform code contain very similar xen/xen-os.h The only differences are: - Functions/variables/types which were unused in i386/xen/xen-os.h: * xen_xchg * __xchg_dummy * __xg * __xchg * atomic_t * atomic_inc * rdtscll The functions/variables/types unused in xen-os.h can be dropped and there is no more differences betwen amd64 and i386. The new header is placed in x86/include/xen and each platform will have dummy headers include x86/xen/*.h. This is to be able to include machine/xen/*.h in the PV drivers. Submitted by: Julien Grall <julien.grall@citrix.com> Reviewed by: royger Differential Revision: https://reviews.freebsd.org/D3880 Sponsored by: Citrix Systems R&D
* Don't page-align the physical address when calling PHYS_TO_VM_PAGE().jah2015-10-171-1/+2
| | | | M busdma_bounce.c
* Ensure the client regions for unmapped bounce buffers created through ↵jah2015-10-131-3/+4
| | | | | | | bus_dmamap_load_phys() do not span multiple pages. This is already done for mapped buffers. While here, stop casting bus_addr_t to vm_offset_t.
* dmar_ctx_dtr() does not exist since r284869. Remove the static functionbz2015-09-221-1/+0
| | | | declaration to avoid a cmpile time warning.
* Add domain support to PCI bus allocationzbb2015-09-163-3/+3
| | | | | | | | | | | | When the system has more than a single PCI domain, the bus numbers are not unique, thus they cannot be used for "pci" device numbering. Change bus numbers to -1 (i.e. to-be-determined automatically) wherever the code did not care about domains. Reviewed by: jhb Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3406
* Add ASUS Sandybridge laptops to the similar x2apic disable logicadrian2015-09-161-1/+13
| | | | | | | | | | | that was recently added for Lenovo laptops. This is a prime candidate for conversion into a table and also checking other fields like "product". Tested: * ASUS UX31E
* Add stack_save_td_running(), a function to trace the kernel stack of amarkj2015-09-115-13/+82
| | | | | | | | | | | | | | | | | running thread. It is currently implemented only on amd64 and i386; on these architectures, it is implemented by raising an NMI on the CPU on which the target thread is currently running. Unlike stack_save_td(), it may fail, for example if the thread is running in user mode. This change also modifies the kern.proc.kstack sysctl to use this function, so that stacks of running threads are shown in the output of "procstat -kk". This is handy for debugging threads that are stuck in a busy loop. Reviewed by: bdrewery, jhb, kib Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3256
* Remove the arg0 field from struct amd64_frame. Its existence was a bug,markj2015-09-111-1/+0
| | | | | | | | | | | | since on amd64 the first argument to a function is generally not on the stack. Revert an old DTrace bug fix to some code that assumed that sizeof(struct amd64_frame) == 16. Reviewed by: jhb, kib Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3255
* Merge stack(9) implementations for i386 and amd64 under x86/.markj2015-09-112-0/+162
| | | | | | Reviewed by: jhb, kib Sponsored by: EMC / Isilon Storage Division Differential Revision: https://reviews.freebsd.org/D3255
* Add missing ofw_machdep.h. Make x86 ofw_machdep.h work pc98 too.imp2015-08-281-1/+1
| | | | | This allows the owc module to compile on pc98 and seems preferable to adding another special case in the build system.
* preload_search_info: make sure mod is setroyger2015-08-212-6/+3
| | | | | | | | | | | Add a check to preload_search_info to make sure mod is set. Most of the callers of preload_search_info don't check that the mod parameter is set, which can cause page faults. While at it, remove some now unnecessary checks before calling preload_search_info. Sponsored by: Citrix Systems R&D Reviewed by: kib Differential Revision: https://reviews.freebsd.org/D3440
* xen: allow disabling PV disks and nicsroyger2015-08-211-4/+24
| | | | | | | | | | | | | | | Introduce two new loader tunnables that can be used to disable PV disks and PV nics at boot time. They default to 0 and should be set to 1 (or any number different than 0) in order to disable the PV devices: hw.xen.disable_pv_disks=1 hw.xen.disable_pv_nics=1 In /boot/loader.conf will disable both PV disks and nics. Sponsored by: Citrix Systems R&D Tested by: Karl Pielorz <kpielorz_lst@tdx.co.uk> MFC after: 1 week
* Automatically disable x2APIC mode on SandyBridge Lenovo machines. Ikib2015-08-211-6/+33
| | | | | | | | | | | | believe that the bug only affects mobile CPUs, at least I did not see other reports, but it is impossible to detect it in madt_setup_local(). While there, reduce duplication in the information strings printed when x2APIC is auto-disabled, and do not print the line when user manually override the setting. Tested and reviewed by: royger (previous version) Sponsored by: The FreeBSD Foundation
* Use pmap_quick_enter_page() to handle bouncing of unmapped buffers in the ↵jah2015-08-141-19/+36
| | | | | | | | | | x86 busdma_bounce implementation. Also treat user buffers as unmapped. This allows two things: 1. Sync'ing bounced maps in non-sleepable contexts. The physcopy* calls previously used could sleep on sf_buf operations in some cases. 2. Sync'ing user buffers outside the context of the owning process Approved by: kib (mentor)
* Reformat x86 bounce buffer synchronization code to reduce indentation. No ↵jah2015-08-141-36/+32
| | | | | | functional change. Approved by: kib (mentor)
* Comment only change, fix grammar and somewhat clarify the action.kib2015-08-141-2/+3
| | | | | Sponsored by: The FreeBSD Foundation MFC after: 3 days
* Better support memory mapped console devices, such as VGA and EFImarcel2015-08-122-21/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | frame buffers and memory mapped UARTs. 1. Delay calling cninit() until after pmap_bootstrap(). This makes sure we have PMAP initialized enough to add translations. Keep kdb_init() after cninit() so that we have console when we need to break into the debugger on boot. 2. Unfortunately, the ATPIC code had be moved as well so as to avoid a spurious trap #30. The reason for which is not known at this time. 3. In pmap_mapdev_attr(), when we need to map a device prior to the VM system being initialized, use virtual_avail as the KVA to map the device at. In particular, avoid using the direct map on amd64 because we can't demote by virtue of not being able to allocate yet. Keep track of the translation. Re-use the translation after the VM has been initialized to not waste KVA and to satisfy the assumption in uart(4) that the handle returned for the low-level console is the same as later returned when the device is probed and attached. 4. In pmap_unmapdev() remove the mapping from the table when called pre-init. Otherwise keep the mapping. During bus probe and attach device resources are mapped and unmapped multiple times, which would have us destroy the mapping used by the low-level console. 5. In pmap_init(), set pmap_initialized to signal that we're not pre-init anymore. On amd64, bring the direct map in sync with the translations created at that time. 6. Implement bus_space_map() and bus_space_unmap() for real: when the tag corresponds to memory space, call the corresponding pmap_mapdev() and pmap_unmapdev() functions to construct and actual handle. 7. In efifb.c and vt_vga.c, remove the crutches and hacks and simply call pmap_mapdev_attr() or bus_space_map() as desired. Notes: 1. uart(4) already used bus_space_map() during low-level console setup but since serial ports have traditionally been I/O port based, the lack of a proper implementation for said function was not a problem. It has always supported memory mapped UARTs for low-level consoles by setting hw.uart.console accordingly. 2. The use of the direct map on amd64 without setting caching attributes has been a bigger problem than previously thought. This change has the fortunate (and unexpected) side-effect of fixing various EFI frame buffer problems (though not all). PR: 191564, 194952 Special thanks to: 1. XipLink, Inc -- generously donated an Intel Bay Trail E3800 based eval board (ADLE3800PC). 2. The FreeBSD Foundation, in particular emaste@ -- for UEFI support in general and testing. 3. Everyone who tested the proposed for PR 191564. 4. jhb@ and kib@ for being a soundboard and applying a clue bat if so needed.
* In x2APIC mode, IPI generation is atomic because it is performed bykib2015-08-121-3/+5
| | | | | | | | | | | | | | | single ICR MSR write. This is in contrast with the xAPIC mode, where we must read current ICR value, do bit fiddling and perform two 32-bit register writes. As a consequence, there is no need to disable interrupts around ICR value calculation and write. Note that typical users of ipi_raw() and ipi_vectored() take spinlock, which already disables interrupts. For them, the change removes unneeded CLI and POPFL/Q instructions. Tested by: pho Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Make kstack_pages a tunable on arm, x86, and powepc. On i386, thekib2015-08-101-2/+2
| | | | | | | | | | | | | | | | | | | initial thread stack is not adjusted by the tunable, the stack is allocated too early to get access to the kernel environment. See TD0_KSTACK_PAGES for the thread0 stack sizing on i386. The tunable was tested on x86 only. From the visual inspection, it seems that it might work on arm and powerpc. The arm USPACE_SVC_STACK_TOP and powerpc USPACE macros seems to be already incorrect for the threads with non-default kstack size. I only changed the macros to use variable instead of constant, since I cannot test. On arm64, mips and sparc64, some static data structures are sized by KSTACK_PAGES, so the tunable is disabled. Sponsored by: The FreeBSD Foundation MFC after: 2 week
* Formally pair store_rel(&smp_started) with load_acq(&smp_started).kib2015-08-061-1/+1
| | | | | | | | | | | The expected semantic is to have misc. data, e.g. CPU bitmaps, visible in the BSP after smp_started is written by the last started AP, which formally requires acquire barrier on the load. The change is mostly nop due to the ordered behaviour of the x86 CPUs. Reviewed by: alc Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Remove some more vestiges of the Xen PV domu support. Specifically,jhb2015-08-061-1/+0
| | | | | | | | | use vtophys() directly instead of vtomach() and retire the no-longer-used headers <machine/xenfunc.h> and <machine/xenvar.h>. Reported by: bde (stale bits in <machine/xenfunc.h>) Reviewed by: royger (earlier version) Differential Revision: https://reviews.freebsd.org/D3266
* Fix more style issues.jkim2015-08-051-3/+3
| | | | Submitted by: bde
* Rationalize BSD license on sys/*/include/float.hemaste2015-08-051-1/+1
| | | | | | | Remove the advertising clause from the Regents of the University of California's license, per the letter dated July 22, 1999. Update clause numbering.
* Fix style(9) bugs.jkim2015-08-041-6/+5
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* Always define __va_list for amd64 and restore pre-r232261 behavior for i386.jkim2015-08-041-2/+11
| | | | | | | Note it allows exotic compilers, e.g., TCC, to build with our stdio.h, etc. PR: 201749 MFC after: 1 week
* Clear the IA32_MISC_ENABLE MSR bit, which limits the max CPUIDkib2015-08-031-16/+30
| | | | | | | | | | | | | | reported, on APs. We already did this on BSP. Otherwise, the userspace software which depends on the features reported by the high CPUID levels is misbehaving. In particular, AVX detection is non-functional, depending on which CPU thread happens to execute when doing CPUID. Another victim is the libthr signal handlers interposer, which needs to save full FPU extended state. Reported and tested by: Andre Meiser <ortadur@web.de> Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Add bit names for the IA32_MISC_ENABLE msr.kib2015-07-281-0/+11
| | | | | Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Typo in comment.kib2015-07-201-1/+1
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* Fix warnings about unused functions for UP build.kib2015-07-161-3/+7
| | | | Sponsored by: The FreeBSD Foundation
* Fix KSTACK_PAGES issue when the default value was changed in KERNCONFzbb2015-07-161-0/+1
| | | | | | | | | | | | | | | | | | If KSTACK_PAGES was changed to anything alse than the default, the value from param.h was taken instead in some places and the value from KENRCONF in some others. This resulted in inconsistency which caused corruption in SMP envorinment. Ensure all places where KSTACK_PAGES are used the opt_kstack_pages.h is included. The file opt_kstack_pages.h could not be included in param.h because was breaking the toolchain compilation. Reviewed by: kib Obtained from: Semihalf Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D3094
* Set the initial system time to a sane (as in: not end of 21st century) value ↵brueffer2015-06-291-1/+1
| | | | | | | | | | | | | | when booting on a PC with CMOS clock set to a year before 2000. This uses 1980 (instead of 1970 as in the initial patch) as pivot year as suggested by imp in the PR followup. PR: 195703 Submitted by: cs@soi.spb.ru Reviewed by: imp MFC after: 1 weeks
* Add x86 PT_GETFSBASE, PT_GETGSBASE machine-depended ptrace requests tokib2015-06-291-0/+4
| | | | | | | | | | | | | obtain the thread %fs and %gs bases. Add x86 PT_SETFSBASE and PT_SETGSBASE requests to set the bases from debuggers. The set requests, similarly to the sysarch({I386,AMD64}_SET_FSBASE), override the corresponding segment registers. The main purpose of the operations is to retrieve and modify the tcb address for debuggee. Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Split the DMAR unit domains and contexts. Domains carry address spacekib2015-06-268-623/+839
| | | | | | | | | | | | | | | | | | | | and related data structures. Contexts attach requests initiators to domains. There is still 1:1 correspondence between contexts and domains on the running system, since only busdma currently allocates them, using dmar_get_ctx_for_dev(). Large part of the change is formal rename of the ctx to domain, but patch also reworks the context allocation and free to allow for independent domain creation. The helper dmar_move_ctx_to_domain() is introduced for future use, to reassign request initiator from one domain to another. The hard issue which is not yet resolved with the context move is proper handling (or reserving) RMRR entries in the destination domain as required by ACPI DMAR table for moved context. Tested by: pho Sponsored by: The FreeBSD Foundation
* Merge ACPICA 20150619.jkim2015-06-181-2/+2
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* Handle X2APIC entries in the MADT for APICs with an ID < 255. At least onejhb2015-06-091-32/+65
| | | | | | | | | | | | | | BIOS has been seen to include such entries even though the relevant specs require that X2APIC entries only be used for CPUs with an APIC ID >= 255. This was tested on a system with "plain" local APIC entries in the MADT to ensure no regressions, but it has not yet been tested on a system with X2APIC entries in the MADT. Currently such systems do not boot at all, and with this change they might now boot correctly. Differential Revision: https://reviews.freebsd.org/D2521 Reviewed by: kib MFC after: 2 weeks
* Update print_INTEL_TLB() by the tag values from the Intel SDMkib2015-06-061-3/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | rev. 55. The modern CPUs cache and TLB descriptions looked quite questionable without the update, e.g. Haswell i7 4770S reported: Data TLB: 4 KB pages, 4-way set associative, 64 entries L2 cache: 256 kbytes, 8-way associative, 64 bytes/line After the update, the report is: Data TLB: 1 GByte pages, 4-way set associative, 4 entries Data TLB: 4 KB pages, 4-way set associative, 64 entries Instruction TLB: 2M/4M pages, fully associative, 8 entries Instruction TLB: 4KByte pages, 8-way set associative, 64 entries 64-Byte prefetching Shared 2nd-Level TLB: 4 KByte/2MByte pages, 8-way associative, 1024 entries L2 cache: 256 kbytes, 8-way associative, 64 bytes/line Some tags were apparently removed from the table 3-21, Vol. 2A. Keep them around, but add a comment stating the removal. Update the format line for cpu_stdext_feature according to the bits from the SDM rev.55. It appears that Haswells do not store %cs and %ds values in the FPU save area. Store content of the %ecx register from the CPUID leaf 0x7 subleaf 0 as cpu_stdext_feature2 and print defined bits from it, again acording to SDM rev. 55. Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Remove several write-only variables, all reported by the gcc 4.9kib2015-05-292-9/+3
| | | | | | | | | | | | | | | | buildkernel run. Some of them were write-only under some kernel options, e.g. variables keeping values only used by CTR() macros. It costs nothing to the code readability and correctness to eliminate the warnings in those cases too by removing the local cached values used only for single-access. Review: https://reviews.freebsd.org/D2665 Reviewed by: rodrigc Looked at by: bjk Sponsored by: The FreeBSD Foundation MFC after: 1 week
* Explicitely enable queued invalidation completion interrupt when thekib2015-05-291-0/+2
| | | | | | | | queue is started, not relying on the interrupt remaping method to happen. Also disable interrupts when shooting down the queue. Sponsored by: The FreeBSD Foundation MFC after: 1 week
* xen: make sure xenpv bus is the last to attachroyger2015-05-251-1/+6
| | | | | | | This is needed so other buses have a chance of attaching a real ISA bus, if none is found xenpv will attach it. Sponsored by: Citrix Systems R&D
* CALLOUT_MPSAFE has lost its meaning since r141428, i.e., for more than tenjkim2015-05-221-1/+1
| | | | | | | | | | years for head. However, it is continuously misused as the mpsafe argument for callout_init(9). Deprecate the flag and clean up callout_init() calls to make them more consistent. Differential Revision: https://reviews.freebsd.org/D2613 Reviewed by: jhb MFC after: 2 weeks
* When sleeping in Sx state using MWAIT instruction, accept fast wakeupkib2015-05-191-6/+17
| | | | | | requests from writes to the monitored line. Submitted by: avg
* Update the comments to match what the code ended up becoming.adrian2015-05-151-1/+1
| | | | | | -1 is now "no locality information available". Sponsored by: Norse Corp, Inc.
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