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* Change rman_manage_region() to actually honor the rm_start and rm_endjhb2011-04-291-1/+1
* Detect VMware guest and set the TSC frequency as reported by the hypervisor.jkim2011-04-291-17/+101
* Turn off periodic recalibration of CPU ticker frequency if it is invariant.jkim2011-04-281-1/+1
* Add the watchdogs patting during the (shutdown time) disk syncing andattilio2011-04-281-0/+8
* Use ACPI-supplied CPU frequencies instead of estimated ones as we are aboutjkim2011-04-271-3/+3
* Use newly added rdtsc32() for DELAY(9) as well.jkim2011-04-141-1/+1
* Work around an emulator problem where virtual CPU advertises TSC is P-statejkim2011-04-141-2/+12
* Use newly added rdtsc32() for the timecounter_get_t method.jkim2011-04-141-2/+3
* Add some tunable descriptions about x86 timers.jkim2011-04-142-2/+3
* Do not use TSC for DELAY(9) if it not P-state invariant to avoid possiblejkim2011-04-121-1/+1
* Probe capability to find effective frequency. When the TSC is P-statejkim2011-04-121-0/+9
* Add a new tunable 'machdep.disable_tsc_calibration' to allow skipping TSCjkim2011-04-121-16/+93
* Merge two similar functions to reduce duplication.jkim2011-04-111-30/+29
* Refactor DELAYDEBUG as it is only useful for correcting i8254 frequency.jkim2011-04-081-13/+14
* Use atomic load & store for TSC frequency. It may be overkill for amd64 butjkim2011-04-073-11/+15
* Revert r219676.jkim2011-03-161-3/+5
* Do not let machdep.tsc_freq modify tsc_freq itself. It is bad for i386 asjkim2011-03-151-5/+3
* Deprecate tsc_present as the last of its real consumers finally disappeared.jkim2011-03-151-7/+2
* When TSC is unavailable, broken or disabled and the current timecounter hasjkim2011-03-141-10/+43
* Add a tunable "machdep.disable_tsc" to turn off TSC. Specifically, it turnsjkim2011-03-111-7/+11
* Turn off pointless P-state invariant TSC detection based on CPU modeljkim2011-03-101-6/+9
* Deprecate rarely used tsc_is_broken. Instead, we zero out tsc_freq becausejkim2011-03-102-3/+2
* Set C1 "I/O then Halt" capability bit for Intel EIST. Some broken BIOSesjkim2011-02-251-2/+5
* Fix typos - remove duplicate "is".brucec2011-02-231-1/+1
* Use a dedicated taskqueue with a thread that runs at a software-interruptjhb2011-02-031-3/+7
* Introduce signed and unsigned version of CTLTYPE_QUAD, renamingmdf2011-01-191-2/+2
* If an interrupt on an I/O APIC is moved to a different CPU after it hasjhb2011-01-131-2/+0
* Revert to using bus_size_t for the bounce_zone's alignment member.mdf2011-01-131-3/+10
* Fix a brain fart. Since this file is shared between i386 and amd64, amdf2011-01-121-3/+3
* sysctl(9) cleanup checkpoint: amd64 GENERIC builds cleanly.mdf2011-01-121-2/+2
* Remove unneeded includes of <sys/linker_set.h>. Other headers that usejhb2011-01-111-1/+0
* Copy powerpc/include/_inttypes.h to x86 and replace i386/amd64/pc98tijl2011-01-081-0/+221
* Drop the icu_lock spinlock while pausing briefly after masking thejhb2010-12-231-0/+2
* Merge amd64 and i386 bus.h and move the resulting header to x86. Replacetijl2010-12-202-12/+1102
* Small style fixes:jhb2010-12-161-10/+10
* Remove AMD Family 0Fh, Model 6Bh, Stepping 2 from the list of P-statejkim2010-12-091-1/+1
* Replace i386/i386/busdma_machdep.c and amd64/amd64/busdma_machdep.ccperciva2010-12-091-0/+1222
* Merge sys/amd64/amd64/tsc.c and sys/i386/i386/tsc.c and move to sys/x86/x86.jkim2010-12-081-0/+281
* Merge amd64/i386 _align.h by aligning on the size of register_t (copiedtijl2010-11-261-0/+52
* x86/local_apic: use newly added ARAT bit definitionavg2010-11-231-1/+1
* hwpstate: use CPU_FOREACH when binding to all available processorsavg2010-11-161-12/+8
* Move identical copies of apm_bios.h to sys/x86/include, replace them withjkim2010-11-111-0/+264
* make it possible to actually enable hwpstate_verboseavg2010-11-111-1/+2
* Make APM emulation look more closer to its origin. Use device_get_softc(9)jkim2010-11-101-7/+6
* Refactor acpi_machdep.c for amd64 and i386, move APM emulation into a newjkim2010-11-101-0/+490
* Move the mptable.h under x86/include/.attilio2010-11-093-2/+148
* Now OsdEnvironment.c is identical on amd64 and i386. Move it to a new home.jkim2010-11-091-0/+91
* Move the MADT parser for amd64 and i386 to sys/x86/acpica now that it isjhb2010-11-081-0/+572
* Sync the APIC startup sequence with amd64:jhb2010-11-082-12/+6
* Only dump the values of the PMC and CMCI local vector table entries on ajhb2010-11-081-4/+9
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