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* Add domain support to PCI bus allocationzbb2015-09-162-2/+2
* Reassign copyright statements on several files from Advancedjhb2015-04-231-1/+1
* Pull in r267961 and r267973 again. Fix for issues reported will follow.hselasky2014-06-281-1/+0
* Revert r267961, r267973:gjb2014-06-271-0/+1
* Extend the meaning of the CTLFLAG_TUN flag to automatically check ifhselasky2014-06-271-1/+0
* Add support for managing PCI bus numbers. As with BARs and PCI-PCI bridgejhb2014-02-122-3/+55
* - Reuse legacy_pcib_(read|write)_config() methods in the QPI pcib driver.jhb2014-01-212-44/+9
* Trim stray blank line.jhb2012-04-111-1/+0
* Move the legacy(4) driver to x86.jhb2012-03-301-1/+1
* Use a more proper fix for enabling HT MSI mapping windows on Host-PCIjhb2012-03-291-3/+19
* - There's no need to overwrite the default device method with the defaultmarius2011-11-222-4/+2
* Move {amd64,i386}/pci/pci_bus.c and {amd64,i386}/include/pci_cfgreg.h tojhb2011-06-221-0/+719
* Reimplement how PCI-PCI bridges manage their I/O windows. Previously thejhb2011-05-031-0/+1
* Each processor socket in a QPI system has a special PCI bus for thejhb2010-09-071-13/+45
* Correctly ensure that the CPU family is 0x6, not non-zero.jhb2010-08-251-1/+2
* Intel QPI chipsets actually provide two extra "non-core" PCI buses thatjhb2010-08-251-0/+286
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