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* Fix gcc warnings about casting away const in sys/x86/iommu/intel_drv.c.dim2013-11-091-5/+5
| | | | Reviewed by: kib
* Initialize variable in sys/x86/iommu/busdma_dmar.c, to avoid possibledim2013-11-081-0/+1
| | | | | | uninitialized use. Reviewed by: kib
* Add support for queued invalidation.kib2013-11-019-162/+843
| | | | | | | | | Right now, the semaphore write is scheduled after each batch, which is not optimal and must be tuned. Discussed with: alc Tested by: pho MFC after: 1 month
* Return BUS_PROBE_NOWILDCARD from the DMAR probe method.kib2013-11-011-1/+1
| | | | | Confirmed by: nwhitehorn MFC after: 1 month
* Remove redundand assignment to error variable and check for its value [1].kib2013-10-281-6/+3
| | | | | | | | Do CTR logging in the case of error as well. Noted by: rdivacky [1] Sponsored by: The FreeBSD Foundation MFC after: 1 month
* Import the driver for VT-d DMAR hardware, as specified in the revisionkib2013-10-2811-0/+5705
1.3 of Intelб╝ Virtualization Technology for Directed I/O Architecture Specification. The Extended Context and PASIDs from the rev. 2.2 are not supported, but I am not aware of any released hardware which implements them. Code does not use queued invalidation, see comments for the reason, and does not provide interrupt remapping services. Code implements the management of the guest address space per domain and allows to establish and tear down arbitrary mappings, but not partial unmapping. The superpages are created as needed, but not promoted. Faults are recorded, fault records could be obtained programmatically, and printed on the console. Implement the busdma(9) using DMARs. This busdma backend avoids bouncing and provides security against misbehaving hardware and driver bad programming, preventing leaks and corruption of the memory by wild DMA accesses. By default, the implementation is compiled into amd64 GENERIC kernel but disabled; to enable, set hw.dmar.enable=1 loader tunable. Code is written to work on i386, but testing there was low priority, and driver is not enabled in GENERIC. Even with the DMAR turned on, individual devices could be directed to use the bounce busdma with the hw.busdma.pci<domain>:<bus>:<device>:<function>.bounce=1 tunable. If DMARs are capable of the pass-through translations, it is used, otherwise, an identity-mapping page table is constructed. The driver was tested on Xeon 5400/5500 chipset legacy machine, Haswell desktop and E5 SandyBridge dual-socket boxes, with ahci(4), ata(4), bce(4), ehci(4), mfi(4), uhci(4), xhci(4) devices. It also works with em(4) and igb(4), but there some fixes are needed for drivers, which are not committed yet. Intel GPUs do not work with DMAR (yet). Many thanks to John Baldwin, who explained me the newbus integration; Peter Holm, who did all testing and helped me to discover and understand several incredible bugs; and to Jim Harris for the access to the EDS and BWG and for listening when I have to explain my findings to somebody. Sponsored by: The FreeBSD Foundation MFC after: 1 month
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