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* MFC 308005: Add powerd(8) support for several families of AMD CPUs.jhb2016-12-021-7/+9
| | | | | | | | | | | | | | Use the same logic to calculate the nominal CPU frequency from the P-state MSRs on family 0x12, 0x15, and 0x16 CPUs as is used for family 0x10. Family 0x14 was included in the original patch in the PR but I left that out as the BIOS writer's guide for family 0x14 CPUs show a different layout for the relevant MSR and include a different formulate for calculating the frequency. While here, simplify a few expressions and print out the family of unsupported CPUs in hex rather than decimal. PR: 212020
* MFC r303891, r303892:pfg2016-09-081-3/+3
| | | | | | | | sys: replace comma with semicolon when pertinent. Uses of commas instead of a semicolons can easily go undetected. The comma can serve as a statement separator but this shouldn't be abused when statements are meant to be standalone.
* MFC r259197:mav2014-01-091-3/+2
| | | | | | | | | Do not DELAY() for P-state transition unless we want to see the result. Intel manual says: "If a transition is already in progress, transition to a new value will subsequently take effect. Reads of IA32_PERF_CTL determine the last targeted operating point." So seems it should be fine to just trigger wanted transition and go. Linux does the same.
* MFC r257769 to stable/10sbruno2013-12-051-2/+7
| | | | | | | | | | | Fix powerd/states on AMD cpus. Resolves issues with system reporting: hwpstate0: set freq failed, err 6 Tested on FX-8150 and others. PR: kern/167018 Submitted by: avg@ Approved by: re (gjb)
* Adding a detach method to p4tcc driver.hiren2013-05-101-0/+20
| | | | | | | | PR: 118739 Submitted by: Dan Lukes <dan@obluda.cz> (earlier version) Reviewed by: jhb Approved by: sbruno (mentor) MFC after: 1 week
* This isn't functionally identical. In some cases a hint to disableeadler2012-10-222-0/+7
| | | | | | | | unit 0 would in fact disable all units. This reverts r241856 Approved by: cperciva (implicit)
* Now that device disabling is generic, remove extraneous code from theeadler2012-10-222-7/+0
| | | | | | | | device drivers that used to provide this feature. Reviewed by: des Approved by: cperciva MFC after: 1 week
* Fix apparent logic reversal in setting the 'auto_mode' flag.kan2012-02-261-2/+2
| | | | MFC after: 2 weeks
* Use ACPI-supplied CPU frequencies instead of estimated ones as we are aboutjkim2011-04-271-3/+3
| | | | | | to use other values from the same table anyway. MFC after: 3 days
* Use atomic load & store for TSC frequency. It may be overkill for amd64 butjkim2011-04-071-1/+1
| | | | | | | | | safer for i386 because it can be easily over 4 GHz now. More worse, it can be easily changed by user with 'machdep.tsc_freq' tunable (directly) or cpufreq(4) (indirectly). Note it is intentionally not used in performance critical paths to avoid performance regression (but we should, in theory). Alternatively, we may add "virtual TSC" with lower frequency if maximum frequency overflows 32 bits (and ignore possible incoherency as we do now).
* Set C1 "I/O then Halt" capability bit for Intel EIST. Some broken BIOSesjkim2011-02-251-2/+5
| | | | | | | refuse to load external SSDTs if this bit is unset for _PDC. It seems Linux and OpenSolaris did the same long ago. MFC after: 1 week
* hwpstate: use CPU_FOREACH when binding to all available processorsavg2010-11-161-12/+8
| | | | | | | | | | | | | | Also, add a comment mentioning _PSD - on some systems it's enough to put one logical CPU into a particular P-state to make other CPUs in the same domain to enter that P-state. Also, call sched_unbind() after the loop - sched_bind() automatically rebinds from previous CPU to a new one, and the new arrangement of code is safer against early loop exit. Plus one minor style nit. MFC after: 10 days
* make it possible to actually enable hwpstate_verboseavg2010-11-111-1/+2
| | | | | | Either via the tunable or the sysctl. MFC after: 3 days
* Few whitespace cleanups and comments tunings.mav2010-09-161-10/+12
| | | | Submitted by: arundel
* Core i5, same as previously Core2Duo, found to not set P-state for singlemav2010-06-191-6/+2
| | | | | | core lower then set on other cores. Do not try to test P-states on attach on SMP systems. It is hopeless now and will just pollute verbose logs. If needed, check still can be forced via loader tunable.
* Introduce the new kernel sub-tree x86 which should contain all the codeattilio2010-02-255-0/+3719
shared and generalized between our current amd64, i386 and pc98. This is just an initial step that should lead to a more complete effort. For the moment, a very simple porting of cpufreq modules, BIOS calls and the whole MD specific ISA bus part is added to the sub-tree but ideally a lot of code might be added and more shared support should grow. Sponsored by: Sandvine Incorporated Reviewed by: emaste, kib, jhb, imp Discussed on: arch MFC: 3 weeks
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