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* MFC r259197:mav2014-01-091-3/+2
| | | | | | | | | Do not DELAY() for P-state transition unless we want to see the result. Intel manual says: "If a transition is already in progress, transition to a new value will subsequently take effect. Reads of IA32_PERF_CTL determine the last targeted operating point." So seems it should be fine to just trigger wanted transition and go. Linux does the same.
* This isn't functionally identical. In some cases a hint to disableeadler2012-10-221-0/+3
| | | | | | | | unit 0 would in fact disable all units. This reverts r241856 Approved by: cperciva (implicit)
* Now that device disabling is generic, remove extraneous code from theeadler2012-10-221-3/+0
| | | | | | | | device drivers that used to provide this feature. Reviewed by: des Approved by: cperciva MFC after: 1 week
* Use atomic load & store for TSC frequency. It may be overkill for amd64 butjkim2011-04-071-1/+1
| | | | | | | | | safer for i386 because it can be easily over 4 GHz now. More worse, it can be easily changed by user with 'machdep.tsc_freq' tunable (directly) or cpufreq(4) (indirectly). Note it is intentionally not used in performance critical paths to avoid performance regression (but we should, in theory). Alternatively, we may add "virtual TSC" with lower frequency if maximum frequency overflows 32 bits (and ignore possible incoherency as we do now).
* Set C1 "I/O then Halt" capability bit for Intel EIST. Some broken BIOSesjkim2011-02-251-2/+5
| | | | | | | refuse to load external SSDTs if this bit is unset for _PDC. It seems Linux and OpenSolaris did the same long ago. MFC after: 1 week
* Few whitespace cleanups and comments tunings.mav2010-09-161-10/+12
| | | | Submitted by: arundel
* Core i5, same as previously Core2Duo, found to not set P-state for singlemav2010-06-191-6/+2
| | | | | | core lower then set on other cores. Do not try to test P-states on attach on SMP systems. It is hopeless now and will just pollute verbose logs. If needed, check still can be forced via loader tunable.
* Introduce the new kernel sub-tree x86 which should contain all the codeattilio2010-02-251-0/+1401
shared and generalized between our current amd64, i386 and pc98. This is just an initial step that should lead to a more complete effort. For the moment, a very simple porting of cpufreq modules, BIOS calls and the whole MD specific ISA bus part is added to the sub-tree but ideally a lot of code might be added and more shared support should grow. Sponsored by: Sandvine Incorporated Reviewed by: emaste, kib, jhb, imp Discussed on: arch MFC: 3 weeks
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