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* - Assert that HEAPSZ is a multiple of PAGE_SIZE as at least the firmwaremarius2010-02-134-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | of Sun Fire V1280 doesn't round up the size itself but instead lets claiming of non page-sized amounts of memory fail. - Change parameters and variables related to the TLB slots to unsigned which is more appropriate. - Search the whole OFW device tree instead of only the children of the root nexus device for the BSP as starting with UltraSPARC IV the 'cpu' nodes hang off of from 'cmp' (chip multi-threading processor) or 'core' or combinations thereof. Also in large UltraSPARC III based machines the 'cpu' nodes hang off of 'ssm' (scalable shared memory) nodes which group snooping-coherency domains together instead of directly from the nexus. - Add support for UltraSPARC IV and IV+ BSPs. Due to the fact that these are multi-core each CPU has two Fireplane config registers and thus the module/target ID has to be determined differently so the one specific to a certain core is used. Similarly, starting with UltraSPARC IV the individual cores use a different property in the OFW device tree to indicate the CPU/core ID as it no longer is in coincidence with the shared slot/socket ID. While at it additionally distinguish between CPUs with Fireplane and JBus interconnects as these also use slightly different sizes for the JBus/agent/module/target IDs. - Check the return value of init_heap(). This requires moving it after cons_probe() so we can panic when appropriate. This should be fine as the PowerPC OFW loader uses that order for quite some time now.
* Merge r178860 from sparc64:marius2010-02-011-81/+90
| | | | | | | | - Remove the BUS_HANDLE_MIN checking in the __BUS_DEBUG_ACCESS macro; for UPA it should have fulfilled its purpose by now and Fireplane- and JBus-based machines are way to messy in organization to implement something equivalent. - Fix a bunch of style(9) bugs.
* Merge r177565 from sparc64:marius2010-02-011-2/+2
| | | | | | - Const'ify the bus_stream_asi and bus_type_asi arrays. - Replace hard-coded functions names missed in bus_machdep.c with __func__. - Break some long lines.
* Merge r157224 from sparc64:marius2010-02-011-4/+4
| | | | | Sync with the other archs and declare the memory location referenced by the address argument of the bus_space_write_multi_*() familiy as const.
* Change the load base to below 2GB so PIE binaries work including whenmarius2009-10-181-1/+1
| | | | | | | | | compiled to use the Medium/Low code model, which we currently default to for the userland. GNU/Linux has moved their default to Medium/Middle some time ago, which probably explains why the current GNU ld(1) uses a base in the range between 32 and 44 bits instead. Submitted by: kib
* Define architectural load bases for PIE binaries. Addresses were selectedkib2009-10-101-0/+2
| | | | | | | | | | by looking at the bases used for non-relocatable executables by gnu ld(1), and adjusting it slightly. Discussed with: bz Reviewed by: kan Tested by: bz (i386, amd64), bsam (linux) MFC after: some time
* Add a new sysctl for reporting all of the supported page sizes.alc2009-09-181-0/+2
| | | | | Reviewed by: jhb MFC after: 3 weeks
* Get rid of the _NO_NAMESPACE_POLLUTION kludge by creating anphk2009-09-082-20/+49
| | | | | architecture specific include file containing the _ALIGN* stuff which <sys/socket.h> needs.
* * Completely Remove the option STOP_NMI from the kernel. This optionattilio2009-08-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | has proven to have a good effect when entering KDB by using a NMI, but it completely violates all the good rules about interrupts disabled while holding a spinlock in other occasions. This can be the cause of deadlocks on events where a normal IPI_STOP is expected. * Adds an new IPI called IPI_STOP_HARD on all the supported architectures. This IPI is responsible for sending a stop message among CPUs using a privileged channel when disponible. In other cases it just does match a normal IPI_STOP. Right now the IPI_STOP_HARD functionality uses a NMI on ia32 and amd64 architectures, while on the other has a normal IPI_STOP effect. It is responsibility of maintainers to eventually implement an hard stop when necessary and possible. * Use the new IPI facility in order to implement a new userend SMP kernel function called stop_cpus_hard(). That is specular to stop_cpu() but it does use the privileged channel for the stopping facility. * Let KDB use the newly introduced function stop_cpus_hard() and leave stop_cpus() for all the other cases * Disable interrupts on CPU0 when starting the process of APs suspension. * Style cleanup and comments adding This patch should fix the reboot/shutdown deadlocks many users are constantly reporting on mailing lists. Please don't forget to update your config file with the STOP_NMI option removal Reviewed by: jhb Tested by: pho, bz, rink Approved by: re (kib)
* Add support to the virtual memory system for configuring machine-alc2009-07-122-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dependent memory attributes: Rename vm_cache_mode_t to vm_memattr_t. The new name reflects the fact that there are machine-dependent memory attributes that have nothing to do with controlling the cache's behavior. Introduce vm_object_set_memattr() for setting the default memory attributes that will be given to an object's pages. Introduce and use pmap_page_{get,set}_memattr() for getting and setting a page's machine-dependent memory attributes. Add full support for these functions on amd64 and i386 and stubs for them on the other architectures. The function pmap_page_set_memattr() is also responsible for any other machine-dependent aspects of changing a page's memory attributes, such as flushing the cache or updating the direct map. The uses include kmem_alloc_contig(), vm_page_alloc(), and the device pager: kmem_alloc_contig() can now be used to allocate kernel memory with non-default memory attributes on amd64 and i386. vm_page_alloc() and the device pager will set the memory attributes for the real or fictitious page according to the object's default memory attributes. Update the various pmap functions on amd64 and i386 that map pages to incorporate each page's memory attributes in the mapping. Notes: (1) Inherent to this design are safety features that prevent the specification of inconsistent memory attributes by different mappings on amd64 and i386. In addition, the device pager provides a warning when a device driver creates a fictitious page with memory attributes that are inconsistent with the real page that the fictitious page is an alias for. (2) Storing the machine-dependent memory attributes for amd64 and i386 as a dedicated "int" in "struct md_page" represents a compromise between space efficiency and the ease of MFCing these changes to RELENG_7. In collaboration with: jhb Approved by: re (kib)
* Cleanup ALIGNED_POINTER:sam2009-07-051-0/+7
| | | | | | | | | | | o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v) o define as "1" on amd64 and i386 where there is no restriction o make the type returned consistent with ALIGN o remove _ALIGNED_POINTER o make associated comments consistent Reviewed by: bde, imp, marcel Approved by: re (kensmith)
* Correct the #endif comment.alc2009-06-261-1/+1
| | | | | Noticed by: jmallett Approved by: re (kib)
* This change is the next step in implementing the cache control functionalityalc2009-06-261-0/+35
| | | | | | | | | | | required by video card drivers. Specifically, this change introduces vm_cache_mode_t with an appropriate VM_CACHE_DEFAULT definition on all architectures. In addition, this changes adds a vm_cache_mode_t parameter to kmem_alloc_contig() and vm_phys_alloc_contig(). These will be the interfaces for allocating mapped kernel memory and physical memory, respectively, with non-default cache modes. In collaboration with: jhb
* Implement a facility for dynamic per-cpu variables.jeff2009-06-231-0/+2
| | | | | | | | | | | | | | | - Modules and kernel code alike may use DPCPU_DEFINE(), DPCPU_GET(), DPCPU_SET(), etc. akin to the statically defined PCPU_*. Requires only one extra instruction more than PCPU_* and is virtually the same as __thread for builtin and much faster for shared objects. DPCPU variables can be initialized when defined. - Modules are supported by relocating the module's per-cpu linker set over space reserved in the kernel. Modules may fail to load if there is insufficient space available. - Track space available for modules with a one-off extent allocator. Free may block for memory to allocate space for an extent. Reviewed by: jhb, rwatson, kan, sam, grehan, marius, marcel, stas
* Adjust the padding of struct pcpu to r193219.marius2009-06-031-2/+2
| | | | Submitted by: Eygene Ryabinkin
* Don't conditionally define CACHE_LINE_SHIFT, as we anticipate sizingrwatson2009-04-201-3/+1
| | | | | | | | | | | | a fair number of static data structures, making this an unlikely option to try to change without also changing source code. [1] Change default cache line size on ia64, sparc64, and sun4v to 128 bytes, as this was what rtld-elf was already using on those platforms. [2] Suggested by: bde [1], jhb [2] MFC after: 2 weeks
* Add description and cautionary note regarding CACHE_LINE_SIZE.rwatson2009-04-191-0/+4
| | | | | MFC after: 2 weeks Suggested by: alc
* For each architecture, define CACHE_LINE_SHIFT and a derivedrwatson2009-04-191-0/+5
| | | | | | | | | | | | | CACHE_LINE_SIZE constant. These constants are intended to over-estimate the cache line size, and be used at compile-time when a run-time tuning alternative isn't appropriate or available. Defaults for all architectures are 64 bytes, except powerpc where it is 128 bytes (used on G5 systems). MFC after: 2 weeks Discussed on: arch@
* - There's no need to wrap kdb_active and kdb_trap() in #ifdef KDB asmarius2009-03-191-1/+1
| | | | | | | | | they're always available. - Remove unused variable. [1] - Add a missing const. - Sort includes. Submitted by: Christoph Mallon [1]
* Add AT_EXECPATH ELF auxinfo entry type. The value's a_ptr is a pointerkib2009-03-171-4/+2
| | | | | | | | | | to the full path of the image that is being executed. Increase AT_COUNT. Remove no longer true comment about types used in Linux ELF binaries, listed types contain FreeBSD-specific entries. Reviewed by: kan
* - Use the generally more appropriate PROM base rather than themarius2009-02-111-1/+1
| | | | | | | | | | | kernel one as the non-faulting flush address in the loader so we can can change KERNBASE and VM_MIN_KERNEL_ADDRESS if we ever want to without needing to worry about using a compatible loader. - Correctly check for LOADER_DEBUG. - Add a missing const for page_sizes[]. This file was missed in r188455.
* Adjust the padding of struct pcpu to r187357.marius2009-01-181-1/+7
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* Missed the sun4v update to ofw_machdep.h in the OFW modularization commit.nwhitehorn2008-12-201-1/+6
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* AT_DEBUG and AT_BRK were OBE like 10 years ago, so retire them.imp2008-12-171-12/+0
| | | | Reviewed by: peter
* Adapt parts of the sparc64 Open Firmware bus enumeration code (in particular,nwhitehorn2008-12-151-53/+0
| | | | | | | | | | | | | | | the code for parsing interrupt maps) to PowerPC and reflect their new MI status by moving them to the shared dev/ofw directory. This commit also modifies the OFW PCI enumeration procedure on PowerPC to allow the bus to find non-firmware-enumerated devices that Apple likes to add, and adds some useful Open Firmware properties (compat and name) to the pnpinfo string of children on OFW SBus, EBus, PCI, and MacIO links. Because of the change to PCI enumeration on PowerPC, X has started working again on PPC machines with Grackle hostbridges. Reviewed by: marius Obtained from: sparc64
* - bump __FreeBSD version to reflect added buf_ring, memory barriers,kmacy2008-11-221-0/+4
| | | | | | | | | | | | | | | | | and ifnet functions - add memory barriers to <machine/atomic.h> - update drivers to only conditionally define their own - add lockless producer / consumer ring buffer - remove ring buffer implementation from cxgb and update its callers - add if_transmit(struct ifnet *ifp, struct mbuf *m) to ifnet to allow drivers to efficiently manage multiple hardware queues (i.e. not serialize all packets through one ifq) - expose if_qflush to allow drivers to flush any driver managed queues This work was supported by Bitgravity Inc. and Chelsio Inc.
* Remove ipi_all() and ipi_self() as the former hasn't been used atmarius2008-09-281-1/+0
| | | | | | | | | | | all to date and the latter also is only used in ia64 and powerpc code which no longer serves a real purpose after bring-up and just can be removed as well. Note that architectures like sun4u also provide no means of implementing IPI'ing a CPU itself natively in the first place. Suggested by: jhb Reviewed by: arch, grehan, jhb
* Work around Cheetah+ erratum 34 (USIII+ erratum #10) by relocatingmarius2008-09-101-0/+1
| | | | | | | | the locked entry in it16 slot 0, which typically is occupied by the PROM, and manually entering locked entries in slots != 0. Thanks to Hubert Feyrer for donating the Blade 2000 this change was developed on.
* Export 'struct pcpu' to userland w/o requiring _KERNEL. A few portsjhb2008-08-191-2/+3
| | | | | | | already define _KERNEL to get to this and I'm about to add hooks to libkvm to access per-CPU data. MFC after: 1 week
* - Reimplement {d,i}tlb_enter() and {d,i}tlb_va_to_pa() in C. There'smarius2008-08-071-0/+4
| | | | | | | | | | | | | | | no particular reason for them to be implemented in assembler and having them in C allows easier extension as well as using more C macros and {d,i}tlb_slot_max rather than hard-coding magic (and actually spitfire-only) values. - Fix the compilation of pmap_print_tte(). - Change pmap_print_tlb() to use ldxa() rather than re-rolling it inline as well as TLB_DAR_SLOT and {d,i}tlb_slot_max rather than hardcoding magic (and actually spitfire-only) values. - While at it, suffix the above mentioned functions with "_sun4u" to underline they're architecture-specific. - Use __FBSDID and macros instead of magic values in locore.S. - Remove unused includes and smp_stack in locore.S.
* Given that sun4u uses sparc64/sparc64/in_cksum.c, use the sparc64marius2008-06-251-164/+2
| | | | | | <machine/in_cksum.h> here also. MFC after: 3 days
* Remove the unused major/minor numbers from iodev and memdev.ed2008-06-251-1/+0
| | | | | | | | | Now that st_rdev is being automatically generated by the kernel, there is no need to define static major/minor numbers for the iodev and memdev. We still need the minor numbers for the memdev, however, to distinguish between /dev/mem and /dev/kmem. Approved by: philip (mentor)
* Remove an header which is unused for sun4v.marius2008-05-021-65/+0
| | | | MFC after: 3 days
* When building a kernel module, define MAXCPU the same as SMP sojb2008-03-271-2/+2
| | | | that modules work with and without SMP.
* Remove two variables which are handled MI now.phk2008-03-261-3/+0
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* The "free-lance" timer in the i8254 is only used for the speakerphk2008-03-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | these days, so de-generalize the acquire_timer/release_timer api to just deal with speakers. The new (optional) MD functions are: timer_spkr_acquire() timer_spkr_release() and timer_spkr_setfreq() the last of which configures the timer to generate a tone of a given frequency, in Hz instead of 1/1193182th of seconds. Drop entirely timer2 on pc98, it is not used anywhere at all. Move sysbeep() to kern/tty_cons.c and use the timer_spkr*() if they exist, and do nothing otherwise. Remove prototypes and empty acquire-/release-timer() and sysbeep() functions from the non-beeping archs. This eliminate the need for the speaker driver to know about i8254frequency at all. In theory this makes the speaker driver MI, contingent on the timer_spkr_*() functions existing but the driver does not know this yet and still attaches to the ISA bus. Syscons is more tricky, in one function, sc_tone(), it knows the hz and things are just fine. In the other function, sc_bell() it seems to get the period from the KDMKTONE ioctl in terms if 1/1193182th second, so we hardcode the 1193182 and leave it at that. It's probably not important. Change a few other sysbeep() uses which obviously knew that the argument was in terms of i8254 frequency, and leave alone those that look like people thought sysbeep() took frequency in hertz. This eliminates the knowledge of i8254_freq from all but the actual clock.c code and the prof_machdep.c on amd64 and i386, where I think it would be smart to ask for help from the timecounters anyway [TBD].
* Remove old sysctl stuff which is long gone in other arch's.phk2008-03-261-21/+0
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* Oops. Use atomic_add_long() for atomic_fetchadd_long() (not atomic_add_int())pjd2008-03-191-2/+1
| | | | | | for sparc64 and sun4v. Noticed by: marius
* Implement atomic_fetchadd_long() for all architectures and document it.pjd2008-03-161-0/+2
| | | | Reviewed by: attilio, jhb, jeff, kris (as a part of the uidinfo_waitfree.patch)
* Add configuration knobs for the superpage reservation system. Initially,alc2007-12-271-0/+7
| | | | the reservation will only be enabled on amd64.
* Add stubs to unbreak LINT.jkoshy2007-12-071-0/+4
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* Break out stack(9) from ddb(4):rwatson2007-12-021-0/+35
| | | | | | | | | | | | | | | | | | | | - Introduce per-architecture stack_machdep.c to hold stack_save(9). - Introduce per-architecture machine/stack.h to capture any common definitions required between db_trace.c and stack_machdep.c. - Add new kernel option "options STACK"; we will build in stack(9) if it is defined, or also if "options DDB" is defined to provide compatibility with existing users of stack(9). Add new stack_save_td(9) function, which allows the capture of a stacktrace of another thread rather than the current thread, which the existing stack_save(9) was limited to. It requires that the thread be neither swapped out nor running, which is the responsibility of the consumer to enforce. Update stack(9) man page. Build tested: amd64, arm, i386, ia64, powerpc, sparc64, sun4v Runtime tested: amd64 (rwatson), arm (cognet), i386 (rwatson)
* Adjust the padding to account for the change of size of the MI partjb2007-11-291-1/+1
| | | | of struct pcpu.
* __builtin_stdarg_start was renamed to __builtin_va_start a longjb2007-11-191-1/+1
| | | | | | | time ago (2002 according to the gcc log). Using the proper name fixes a warning in src/lib/libc/gen/ulimit.c about the second argument of va_start() not being the last named (when it really was).
* Adjust the padding of struct pcpu to src/sys/sys/pcpu.h rev 1.23.marius2007-11-111-1/+1
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* Change the management of cached pages (PQ_CACHE) in two fundamentalalc2007-09-251-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ways: (1) Cached pages are no longer kept in the object's resident page splay tree and memq. Instead, they are kept in a separate per-object splay tree of cached pages. However, access to this new per-object splay tree is synchronized by the _free_ page queues lock, not to be confused with the heavily contended page queues lock. Consequently, a cached page can be reclaimed by vm_page_alloc(9) without acquiring the object's lock or the page queues lock. This solves a problem independently reported by tegge@ and Isilon. Specifically, they observed the page daemon consuming a great deal of CPU time because of pages bouncing back and forth between the cache queue (PQ_CACHE) and the inactive queue (PQ_INACTIVE). The source of this problem turned out to be a deadlock avoidance strategy employed when selecting a cached page to reclaim in vm_page_select_cache(). However, the root cause was really that reclaiming a cached page required the acquisition of an object lock while the page queues lock was already held. Thus, this change addresses the problem at its root, by eliminating the need to acquire the object's lock. Moreover, keeping cached pages in the object's primary splay tree and memq was, in effect, optimizing for the uncommon case. Cached pages are reclaimed far, far more often than they are reactivated. Instead, this change makes reclamation cheaper, especially in terms of synchronization overhead, and reactivation more expensive, because reactivated pages will have to be reentered into the object's primary splay tree and memq. (2) Cached pages are now stored alongside free pages in the physical memory allocator's buddy queues, increasing the likelihood that large allocations of contiguous physical memory (i.e., superpages) will succeed. Finally, as a result of this change long-standing restrictions on when and where a cached page can be reclaimed and returned by vm_page_alloc(9) are eliminated. Specifically, calls to vm_page_alloc(9) specifying VM_ALLOC_INTERRUPT can now reclaim and return a formerly cached page. Consequently, a call to malloc(9) specifying M_NOWAIT is less likely to fail. Discussed with: many over the course of the summer, including jeff@, Justin Husted @ Isilon, peter@, tegge@ Tested by: an earlier version by kris@ Approved by: re (kensmith)
* - Restore the machine independency of sys/dev/ofw/openfirm.{c,h} bymarius2007-06-161-0/+1
| | | | | | | moving OF_set_mmfsa_traptable() (SUNW,set-trap-table with the two arguments used here is specific to sun4v) to MD code. - In sys/dev/ofw/openfirm.h remove prototypes for unimplemented functions and unused Solaris compatibility macros.
* fix cassert failure by adjusting paddingkmacy2007-06-121-1/+1
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* Add kdb_cpu_sync_icache(), intended to synchronize instructionmarcel2007-06-091-0/+5
| | | | | | caches with data caches after writing to memory. This typically is required to make breakpoints work on ia64 and powerpc. For those architectures the function is implemented.
* Rework the PCPU_* (MD) interface:attilio2007-06-041-1/+2
| | | | | | | | | | | | - Rename PCPU_LAZY_INC into PCPU_INC - Add the PCPU_ADD interface which just does an add on the pcpu member given a specific value. Note that for most architectures PCPU_INC and PCPU_ADD are not safe. This is a point that needs some discussions/work in the next days. Reviewed by: alc, bde Approved by: jeff (mentor)
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