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* Implement handling of the third argument of cpu_switch(). This unbreaksmarius2010-01-302-40/+50
| | | | | | | sparc64 after r202889. PR: 143215 MFC after: 1 week
* - Zero the MSI/MSI-X queue argument, otherwise mtx_init(9) can panicmarius2010-01-271-3/+3
| | | | | | | | | | indicating an already initialized lock. - Check for an empty MSI/MSI-X queue entry before asserting that we have received a MSI/MSI-X message in order to not panic in case of stray MSI/ MSI-X queue interrupts which may happen in case of using an interrupt handler rather than a filter. MFC after: 3 days
* Merge r202882 from amd64/i386:marius2010-01-231-69/+104
| | | | | | | | | | | | | | | | | | | | For PT_TO_SCE stop that stops the ptraced process upon syscall entry, syscall arguments are collected before ptracestop() is called. As a consequence, debugger cannot modify syscall or its arguments. In syscall(), reread syscall number and arguments after ptracestop(), if debugger modified anything in the process environment. Since procfs stopevent requires number of syscall arguments in p_xstat, this cannot be solved by moving stop/trace point before argument fetching. Move the code to read arguments into separate function fetch_syscall_args() to avoid code duplication. Note that ktrace point for modified syscall is intentionally recorded twice, once with original arguments, and second time with the arguments set by debugger. PT_TO_SCX stop is executed after cpu_syscall_set_retval() already. Reviewed by: kib
* Move the examples for the 'hints' and 'env' keywords from various GENERICjhb2010-01-191-9/+0
| | | | | | kernel configs into NOTES. Reviewed by: imp
* Add epic(4) also here.marius2010-01-181-0/+1
| | | | MFC after: 3 days
* When setting up MSIs with a filter ensure that the event queue interruptmarius2010-01-101-2/+10
| | | | | is cleared as it might have triggered before and given we supply NULL as ic_clear, inthand_add() won't do this for us in this case.
* Add INCLUDE_CONFIG_FILE in GENERIC on all non-embedded platforms.imp2010-01-101-0/+1
| | | | | | # This is the resolution of removing it from DEFAULTS... MFC after: 5 days
* Add epic(4), a driver for the front panel LEDs in Sun Fire V215/V245.marius2010-01-102-0/+217
| | | | It's named after the driver doing the same job in OpenSolaris.
* - According to OpenSolaris it's sufficient to align the MSIs of amarius2010-01-101-52/+95
| | | | | | | | | | | | | | | | | device in the table based on the count rather than the maxcount. Also the previous code didn't work properly as it would have been necessary to reserve the entire maxcount range in order keep later requests from filling the spare MSIs between count and maxcount, which would be complicated to unreserve in fire_release_msi(). - For MSIs with filters rather than handlers only don't clear the event queue interrupt via fire_intr_clear() since given that these are executed directly would clear it while we're still processing the event queue, which in turn would lead to lost MSIs. - Save one level of indentation in fire_setup_intr(). - Correct a bug in fire_teardown_intr() which prevented it from correctly restoring the MSI in the resource, causing allocation of a resource representing an MSI to fail after the first pass when repeatedly loading and unloading a driver module.
* In sys/<arch>/conf/Makefile set TARGET to <arch>. That allowsbz2010-01-081-0/+2
| | | | | | | | | | | | | | | | sys/conf/makeLINT.mk to only do certain things for certain architectures. Note that neither arm nor mips have the Makefile there, thus essentially not (yet) supporting LINT. This would enable them do add special treatment to sys/conf/makeLINT.mk as well chosing one of the many configurations as LINT. This is a hack of doing this and keeping it in a separate commit will allow us to more easily identify and back it out. Discussed on/with: arch, jhb (as part of the LINT-VIMAGE thread) MFC after: 1 month
* Enable ste(4). ste(4) should work on all architectures.yongari2010-01-081-1/+1
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* Revert 200594. This file isn't intended for these sorts of things.imp2010-01-041-7/+0
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* Add vlan(4) to all GENERIC kernels.brooks2010-01-031-0/+1
| | | | MFC after: 1 week
* Exclude options COMPAT_FREEBSD4 now that the MD freebsd4_sigreturn()marius2010-01-031-0/+1
| | | | | is gone since r201396 and which is also in line with the fact that FreeBSD 4 didn't supported sparc64.
* - Demapping unused kernel TLB slots has proven to work reliably so movemarius2010-01-021-11/+3
| | | | | | | | the associated debugging under bootverbose. - Remove freebsd4_sigreturn(); given that FreeBSD 4 didn't supported sparc64 this only ever served as a transition aid prior to FreeBSD 5.0 and is unused by default since COMPAT_FREEBSD4 was removed from GENERIC in r143072 nearly 5 years ago.
* - Preserve the PROM IOMMU in order to allow OFW drivers to continue tomarius2010-01-024-4/+25
| | | | | | | | work. - Sanity check the parameters passed to the implementations of the pcib_{read,write}_config() methods. Using illegal values can cause no real harm but it doesn't hurt to avoid unnecessary data error traps requiring to flush and re-enable the level 1 caches.
* Fix botches in r201005:marius2010-01-011-4/+4
| | | | | - Actually use the newly introduced sc_res in the front-end. - Remove a whitespace glitch in mk48txx_gettime().
* - Remove a redundant variable and an unnecessary cast.marius2009-12-291-6/+5
| | | | - Fix whitespace.
* - Prefer i and j over i and n for temporary integer variables.marius2009-12-292-111/+120
| | | | | - Wrap/shorten too long lines. - Remove a redundant variable and an unnecessary cast in schizo(4).
* Account for firmware versions which include the CDMA interrupts inmarius2009-12-281-19/+32
| | | | | | the OFW device tree. MFC after: 3 days
* Add a driver for the `Fire' JBus to PCIe bridges found in at leastmarius2009-12-273-0/+3224
| | | | | | | | | | | | | | | | | | | | | | | | | the Sun Fire V215/V245 and Sun Ultra 25/45 machines. This driver also already includes all the code to support the `Oberon' Uranus to PCIe bridges found in the Fujitsu-Siemens based Mx000 machines but due to lack of access to such a system for testing, probing of these bridges is currently disabled. Unfortunately, the event queue mechanism of these bridges for MSIs/ MSI-Xs matches our current MD and MI interrupt frameworks like square pegs fit into round holes so for now we are generous and use one event queue per MSI, which limits us to 35 MSIs/MSI-Xs per Host-PCIe-bridge (we use one event queue for the PCIe error messages). This seems tolerable as long as most devices just use one MSI/MSI-X anyway. Adding knowledge about MSIs/MSI-Xs to the MD interrupt code should allow us to decouple the 1:1 mapping at the cost of no longer being able to bind MSIs/MSI-Xs to specific CPUs as we currently have no reliable way to quiesce a device during the transition of its MSIs/ MSI-Xs to another event queue. This would still require the problem of interrupt storms generated by devices which have no one-shot behavior or can't/don't mask interrupts while the filter/handler is executed (like the older PCIe NICs supported by bge(4)) to be solved though. Committed from: 26C3
* Style changesmarius2009-12-251-3/+3
| | | | Obtained from: NetBSD (mc146818reg.h)
* - Take advantage of bus_{read,write}_*(9).marius2009-12-251-3/+1
| | | | | - Set dow = -1 in mk48txx_gettime() because some drivers (for example the NetBSD and OpenBSD mk48txx(4)) don't set it correctly.
* - Hook up the default implementations of the MSI/MSI-X pcib_if methodsmarius2009-12-251-2/+39
| | | | | | | | | | | | | | | | | so requests may bubble up to a host-PCI bridge driver. - Distinguish between PCI and PCIe bridges in the device description so it's a bit easier to follow what hangs off of what in the dmesg. Unfortunately we can't also tell PCI and PCI-X apart based on the information provided in the OFW device tree. - Add quirk handling for the ALi M5249 found in Fire-based machines which are used as a PCIe-PCIe bridge there. These are obviously subtractive decoding as as they have a PCI-ISA bridge on their secondary side (and likewise don't include the ISA I/O range in their bridge decode) but don't indicate this via the class code. Given that this quirk isn't likely to apply to all ALi M5249 and I have no datasheet for these chips so I could implement a check using the chip specific bits enabling subtractive decoding this quirk handling is added to the MD code rather than the MI one.
* Merge from amd64/i386:marius2009-12-245-3/+67
| | | | Implement support for interrupt descriptions.
* Add missing locking in intr_bind().marius2009-12-241-2/+8
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* - Don't check for a valid interrupt controller on every interruptmarius2009-12-241-2/+3
| | | | | | | | | | | in intr_execute_handlers(). If we managed to get here without an associated interrupt controller we have way bigger problems. While at it predict stray vector interrupts as false as they are rather unlikely. - Don't blindly call the clear function of an interrupt controller when adding a handler in inthand_add() as interrupt controllers like the one driven by upa(4) are auto-clearing and thus provide NULL instead.
* - By re-arranging the code in OF_decode_addr() somewhat and acceptingmarius2009-12-231-33/+33
| | | | | | | a bit of a detour we can just iterate through the banks array instead of having to calculate every offset. This change is inspired by the powerpc version of this function. - Add support for the JBus to EBus bridges which hang off of nexus(4).
* Style changes.marius2009-12-231-14/+12
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* - Add support for the IOMMUs of Fire JBus to PCIe and Oberon Uranusmarius2009-12-233-43/+166
| | | | | | | | | to PCIe bridges. - Add support for talking the PROM mappings over to the kernel IOTSB just like we do with the kernel TSB in order to allow OFW drivers to continue to work. - Change some members, parameters and variables to unsigned where more appropriate.
* Fix whitespace according to style(9).marius2009-12-231-29/+29
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* - Add quirk handling for ALi M5229, mainly setting the magic "forcemarius2009-12-231-3/+24
| | | | | | | | enable IDE I/O" bit which prevents data access traps with revision 0xc8 in Fire-based machines when pci(4) enables PCIM_CMD_PORTEN. - Like for sun4v also don't add the PCI side of host-PCIe bridges to the bus on sun4u as they don't have configuration space implement there either.
* - Sort the prototypes.marius2009-12-231-24/+23
| | | | | - Add macros to ease the access of device configuration space in ofw_pcibus_setup_device().
* Add structures for OFW MSI/MSI-X support. These are identical formarius2009-12-231-0/+25
| | | | both sun4u and sun4v.
* Don't probe the bq4802 variant found in Ultra 25 and 45 for now asmarius2009-12-231-4/+9
| | | | | this chip isn't MC146818 compatible and requires different handlers (but which I can't test due to lack of such hardware).
* Don't use an out register to hold the vector number across the callmarius2009-12-231-11/+11
| | | | | | of the interrupt handler in intr_fast() as the handler might clobber it (no in-tree handler currently does but an upcoming one will). While at it, tidy the register usage in the interrupt counting code.
* Calculate the average CPU clock frequency and export that throughmarcel2009-12-231-0/+14
| | | | | the hw.freq.cpu sysctl variable. This can be used by ports that need to know "the" CPU frequency.
* - Correct an off-by-one error when calculating the end of a childmarius2009-12-221-2/+2
| | | | | range. - Spell the PCI TLA in uppercase.
* - Add support for the JBus to EBus bridges which hang off of nexus(4)marius2009-12-221-104/+309
| | | | | | and are found in sun4u and sun4v machines based on the Fire ASIC. - Initialize the configuration space of the PCI to EBus variant the same way as OpenSolaris does.
* - Add macros for the states of the interrupt clear registers.marius2009-12-221-2/+6
| | | | | | - Change INTMAP_VEC() to take an INO as its second argument rather than an INR. The former is what I actually intended with this macro and how it's currently used.
* Make these constants unsigned which is more appropriate.marius2009-12-221-9/+9
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* Enroll these drivers in multipass probing. The motivation behind thismarius2009-12-2210-11/+25
| | | | | | | | | is that the JBus to EBus bridges share the interrupt controller of a sibling JBus to PCIe bridge (at least as far as the OFW device tree is concerned, in reality they are part of the same chip) so we have to probe and attach the latter first. That happens to be also the case due to the fact that the JBus to PCIe bridges appear first in the OFW device tree but it doesn't hurt to ensure the right order.
* Add missing module dependency information.marius2009-12-211-0/+1
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* Provide and consume missing module dependency information.marius2009-12-215-1/+6
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* Add INCLUDE_CONFIG_FILE, and a note in comments about how to alsodougb2009-12-161-0/+7
| | | | include the comments with CONFIGARGS
* Add additional checks of the kernel stack addresses in order tomarius2009-12-081-3/+11
| | | | | | ensure we don't overrun the end of the call chain. MFC after: 1 week
* Add <machine/pcb.h> missed in r199135.marius2009-12-071-0/+1
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* Simplify the invocation of vm_fault(). Specifically, eliminate the flagalc2009-11-271-6/+3
| | | | | | | VM_FAULT_DIRTY. The information provided by this flag can be trivially inferred by vm_fault(). Discussed with: kib
* Unroll copying of the registers in {g,s}et_mcontext() and limit itmarius2009-11-171-6/+56
| | | | | | | | | to the set actually restored by tl0_ret() instead of using the whole trapframe. Additionally skip %g7 as that register is used as the userland TLS pointer. PR: 140523 MFC after: 1 week
* Extract the code that records syscall results in the frame into MDkib2009-11-103-36/+41
| | | | | | | | | | | function cpu_set_syscall_retval(). Suggested by: marcel Reviewed by: marcel, davidxu PowerPC, ARM, ia64 changes: marcel Sparc64 tested and reviewed by: marius, also sunv reviewed MIPS tested by: gonzo MFC after: 1 month
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