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* Style changesmarius2009-12-251-3/+3
| | | | Obtained from: NetBSD (mc146818reg.h)
* - Take advantage of bus_{read,write}_*(9).marius2009-12-251-3/+1
| | | | | - Set dow = -1 in mk48txx_gettime() because some drivers (for example the NetBSD and OpenBSD mk48txx(4)) don't set it correctly.
* - Hook up the default implementations of the MSI/MSI-X pcib_if methodsmarius2009-12-251-2/+39
| | | | | | | | | | | | | | | | | so requests may bubble up to a host-PCI bridge driver. - Distinguish between PCI and PCIe bridges in the device description so it's a bit easier to follow what hangs off of what in the dmesg. Unfortunately we can't also tell PCI and PCI-X apart based on the information provided in the OFW device tree. - Add quirk handling for the ALi M5249 found in Fire-based machines which are used as a PCIe-PCIe bridge there. These are obviously subtractive decoding as as they have a PCI-ISA bridge on their secondary side (and likewise don't include the ISA I/O range in their bridge decode) but don't indicate this via the class code. Given that this quirk isn't likely to apply to all ALi M5249 and I have no datasheet for these chips so I could implement a check using the chip specific bits enabling subtractive decoding this quirk handling is added to the MD code rather than the MI one.
* Merge from amd64/i386:marius2009-12-245-3/+67
| | | | Implement support for interrupt descriptions.
* Add missing locking in intr_bind().marius2009-12-241-2/+8
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* - Don't check for a valid interrupt controller on every interruptmarius2009-12-241-2/+3
| | | | | | | | | | | in intr_execute_handlers(). If we managed to get here without an associated interrupt controller we have way bigger problems. While at it predict stray vector interrupts as false as they are rather unlikely. - Don't blindly call the clear function of an interrupt controller when adding a handler in inthand_add() as interrupt controllers like the one driven by upa(4) are auto-clearing and thus provide NULL instead.
* - By re-arranging the code in OF_decode_addr() somewhat and acceptingmarius2009-12-231-33/+33
| | | | | | | a bit of a detour we can just iterate through the banks array instead of having to calculate every offset. This change is inspired by the powerpc version of this function. - Add support for the JBus to EBus bridges which hang off of nexus(4).
* Style changes.marius2009-12-231-14/+12
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* - Add support for the IOMMUs of Fire JBus to PCIe and Oberon Uranusmarius2009-12-233-43/+166
| | | | | | | | | to PCIe bridges. - Add support for talking the PROM mappings over to the kernel IOTSB just like we do with the kernel TSB in order to allow OFW drivers to continue to work. - Change some members, parameters and variables to unsigned where more appropriate.
* Fix whitespace according to style(9).marius2009-12-231-29/+29
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* - Add quirk handling for ALi M5229, mainly setting the magic "forcemarius2009-12-231-3/+24
| | | | | | | | enable IDE I/O" bit which prevents data access traps with revision 0xc8 in Fire-based machines when pci(4) enables PCIM_CMD_PORTEN. - Like for sun4v also don't add the PCI side of host-PCIe bridges to the bus on sun4u as they don't have configuration space implement there either.
* - Sort the prototypes.marius2009-12-231-24/+23
| | | | | - Add macros to ease the access of device configuration space in ofw_pcibus_setup_device().
* Add structures for OFW MSI/MSI-X support. These are identical formarius2009-12-231-0/+25
| | | | both sun4u and sun4v.
* Don't probe the bq4802 variant found in Ultra 25 and 45 for now asmarius2009-12-231-4/+9
| | | | | this chip isn't MC146818 compatible and requires different handlers (but which I can't test due to lack of such hardware).
* Don't use an out register to hold the vector number across the callmarius2009-12-231-11/+11
| | | | | | of the interrupt handler in intr_fast() as the handler might clobber it (no in-tree handler currently does but an upcoming one will). While at it, tidy the register usage in the interrupt counting code.
* Calculate the average CPU clock frequency and export that throughmarcel2009-12-231-0/+14
| | | | | the hw.freq.cpu sysctl variable. This can be used by ports that need to know "the" CPU frequency.
* - Correct an off-by-one error when calculating the end of a childmarius2009-12-221-2/+2
| | | | | range. - Spell the PCI TLA in uppercase.
* - Add support for the JBus to EBus bridges which hang off of nexus(4)marius2009-12-221-104/+309
| | | | | | and are found in sun4u and sun4v machines based on the Fire ASIC. - Initialize the configuration space of the PCI to EBus variant the same way as OpenSolaris does.
* - Add macros for the states of the interrupt clear registers.marius2009-12-221-2/+6
| | | | | | - Change INTMAP_VEC() to take an INO as its second argument rather than an INR. The former is what I actually intended with this macro and how it's currently used.
* Make these constants unsigned which is more appropriate.marius2009-12-221-9/+9
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* Enroll these drivers in multipass probing. The motivation behind thismarius2009-12-2210-11/+25
| | | | | | | | | is that the JBus to EBus bridges share the interrupt controller of a sibling JBus to PCIe bridge (at least as far as the OFW device tree is concerned, in reality they are part of the same chip) so we have to probe and attach the latter first. That happens to be also the case due to the fact that the JBus to PCIe bridges appear first in the OFW device tree but it doesn't hurt to ensure the right order.
* Add missing module dependency information.marius2009-12-211-0/+1
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* Provide and consume missing module dependency information.marius2009-12-215-1/+6
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* Add INCLUDE_CONFIG_FILE, and a note in comments about how to alsodougb2009-12-161-0/+7
| | | | include the comments with CONFIGARGS
* Add additional checks of the kernel stack addresses in order tomarius2009-12-081-3/+11
| | | | | | ensure we don't overrun the end of the call chain. MFC after: 1 week
* Add <machine/pcb.h> missed in r199135.marius2009-12-071-0/+1
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* Simplify the invocation of vm_fault(). Specifically, eliminate the flagalc2009-11-271-6/+3
| | | | | | | VM_FAULT_DIRTY. The information provided by this flag can be trivially inferred by vm_fault(). Discussed with: kib
* Unroll copying of the registers in {g,s}et_mcontext() and limit itmarius2009-11-171-6/+56
| | | | | | | | | to the set actually restored by tl0_ret() instead of using the whole trapframe. Additionally skip %g7 as that register is used as the userland TLS pointer. PR: 140523 MFC after: 1 week
* Extract the code that records syscall results in the frame into MDkib2009-11-103-36/+41
| | | | | | | | | | | function cpu_set_syscall_retval(). Suggested by: marcel Reviewed by: marcel, davidxu PowerPC, ARM, ia64 changes: marcel Sparc64 tested and reviewed by: marius, also sunv reviewed MIPS tested by: gonzo MFC after: 1 month
* In r197963, a race with thread being selected for signal deliverykib2009-10-271-5/+1
| | | | | | | | | | | | | while in kernel mode, and later changing signal mask to block the signal, was fixed for sigprocmask(2) and ptread_exit(3). The same race exists for sigreturn(2), setcontext(2) and swapcontext(2) syscalls. Use kern_sigprocmask() instead of direct manipulation of td_sigmask to reschedule newly blocked signals, closing the race. Reviewed by: davidxu Tested by: pho MFC after: 1 month
* Sync with the other archs and wrapper the prototype of in_cksum_skip(9)marius2009-10-261-0/+2
| | | | | | | in #ifdef _KERNEL. Submitted by: Ulrich Spoerlein MFC after: 1 month
* o Introduce vm_sync_icache() for making the I-cache coherent withmarcel2009-10-211-0/+5
| | | | | | | | | | | | | | | | | | | | | the memory or D-cache, depending on the semantics of the platform. vm_sync_icache() is basically a wrapper around pmap_sync_icache(), that translates the vm_map_t argumument to pmap_t. o Introduce pmap_sync_icache() to all PMAP implementation. For powerpc it replaces the pmap_page_executable() function, added to solve the I-cache problem in uiomove_fromphys(). o In proc_rwmem() call vm_sync_icache() when writing to a page that has execute permissions. This assures that when breakpoints are written, the I-cache will be coherent and the process will actually hit the breakpoint. o This also fixes the Book-E PMAP implementation that was missing necessary locking while trying to deal with the I-cache coherency in pmap_enter() (read: mmu_booke_enter_locked). The key property of this change is that the I-cache is made coherent *after* writes have been done. Doing it in the PMAP layer when adding or changing a mapping means that the I-cache is made coherent *before* any writes happen. The difference is key when the I-cache prefetches.
* Change the load base to below 2GB so PIE binaries work including whenmarius2009-10-181-1/+1
| | | | | | | | | compiled to use the Medium/Low code model, which we currently default to for the userland. GNU/Linux has moved their default to Medium/Middle some time ago, which probably explains why the current GNU ld(1) uses a base in the range between 32 and 44 bits instead. Submitted by: kib
* Move the USB wireless drivers down into their own section next to the USBjhb2009-10-131-4/+5
| | | | | | | ethernet drivers. Submitted by: Glen Barber glen.j.barber @ gmail MFC after: 1 month
* Define architectural load bases for PIE binaries. Addresses were selectedkib2009-10-101-0/+2
| | | | | | | | | | by looking at the bases used for non-relocatable executables by gnu ld(1), and adjusting it slightly. Discussed with: bz Reviewed by: kan Tested by: bz (i386, amd64), bsam (linux) MFC after: some time
* Make sure that the primary native brandinfo always gets addedbz2009-10-031-1/+1
| | | | | | | | | | | | | first and the native ia32 compat as middle (before other things). o(ld)brandinfo as well as third party like linux, kfreebsd, etc. stays on SI_ORDER_ANY coming last. The reason for this is only to make sure that even in case we would overflow the MAX_BRANDS sized array, the native FreeBSD brandinfo would still be there and the system would be operational. Reviewed by: kib MFC after: 1 month
* Merge r194204 from amd64/i386:marius2009-09-251-0/+1
| | | | | | | Enable PRINTF_BUFR_SIZE by default. PR: 139134 MFC after: 3 days
* Add a new sysctl for reporting all of the supported page sizes.alc2009-09-181-0/+2
| | | | | Reviewed by: jhb MFC after: 3 weeks
* Factor out the duplicated macro for the device type used in themarius2009-09-134-7/+11
| | | | | | OFW device tree for PCI bridges and add a new one for PCI Express. While at it, take advantage of the former for the rman(9) work- around in jbusppm(4).
* Get rid of the _NO_NAMESPACE_POLLUTION kludge by creating anphk2009-09-082-18/+49
| | | | | architecture specific include file containing the _ALIGN* stuff which <sys/socket.h> needs.
* * Completely Remove the option STOP_NMI from the kernel. This optionattilio2009-08-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | has proven to have a good effect when entering KDB by using a NMI, but it completely violates all the good rules about interrupts disabled while holding a spinlock in other occasions. This can be the cause of deadlocks on events where a normal IPI_STOP is expected. * Adds an new IPI called IPI_STOP_HARD on all the supported architectures. This IPI is responsible for sending a stop message among CPUs using a privileged channel when disponible. In other cases it just does match a normal IPI_STOP. Right now the IPI_STOP_HARD functionality uses a NMI on ia32 and amd64 architectures, while on the other has a normal IPI_STOP effect. It is responsibility of maintainers to eventually implement an hard stop when necessary and possible. * Use the new IPI facility in order to implement a new userend SMP kernel function called stop_cpus_hard(). That is specular to stop_cpu() but it does use the privileged channel for the stopping facility. * Let KDB use the newly introduced function stop_cpus_hard() and leave stop_cpus() for all the other cases * Disable interrupts on CPU0 when starting the process of APs suspension. * Style cleanup and comments adding This patch should fix the reboot/shutdown deadlocks many users are constantly reporting on mailing lists. Please don't forget to update your config file with the STOP_NMI option removal Reviewed by: jhb Tested by: pho, bz, rink Approved by: re (kib)
* Add a new type of VM object: OBJT_SG. An OBJT_SG object is very similar tojhb2009-07-241-1/+1
| | | | | | | | | | | a device pager (OBJT_DEVICE) object in that it uses fictitious pages to provide aliases to other memory addresses. The primary difference is that it uses an sglist(9) to determine the physical addresses for a given offset into the object instead of invoking the d_mmap() method in a device driver. Reviewed by: alc Approved by: re (kensmith) MFC after: 2 weeks
* Add a MD __PCI_BAR_ZERO_VALID which denotes that BARs containing 0marius2009-07-211-0/+2
| | | | | | | | | | | | | actually specify valid bases that should be treated just as normal. The PCI specifications have no indication that 0 would be a magic value indicating a disabled BAR as commonly used on at least amd64 and i386 but not sparc64. It's unclear what to do in pci_delete_resource() instead of writing 0 to a BAR though as there's no (other) way do disable individual BARs so its decoding is left enabled in case of __PCI_BAR_ZERO_VALID for now. Approved by: re (kib), jhb MFC after: 1 week
* Add support to the virtual memory system for configuring machine-alc2009-07-122-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dependent memory attributes: Rename vm_cache_mode_t to vm_memattr_t. The new name reflects the fact that there are machine-dependent memory attributes that have nothing to do with controlling the cache's behavior. Introduce vm_object_set_memattr() for setting the default memory attributes that will be given to an object's pages. Introduce and use pmap_page_{get,set}_memattr() for getting and setting a page's machine-dependent memory attributes. Add full support for these functions on amd64 and i386 and stubs for them on the other architectures. The function pmap_page_set_memattr() is also responsible for any other machine-dependent aspects of changing a page's memory attributes, such as flushing the cache or updating the direct map. The uses include kmem_alloc_contig(), vm_page_alloc(), and the device pager: kmem_alloc_contig() can now be used to allocate kernel memory with non-default memory attributes on amd64 and i386. vm_page_alloc() and the device pager will set the memory attributes for the real or fictitious page according to the object's default memory attributes. Update the various pmap functions on amd64 and i386 that map pages to incorporate each page's memory attributes in the mapping. Notes: (1) Inherent to this design are safety features that prevent the specification of inconsistent memory attributes by different mappings on amd64 and i386. In addition, the device pager provides a warning when a device driver creates a fictitious page with memory attributes that are inconsistent with the real page that the fictitious page is an alias for. (2) Storing the machine-dependent memory attributes for amd64 and i386 as a dedicated "int" in "struct md_page" represents a compromise between space efficiency and the ease of MFCing these changes to RELENG_7. In collaboration with: jhb Approved by: re (kib)
* Implementation of the upcoming Wireless Mesh standard, 802.11s, on therpaulo2009-07-111-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | net80211 wireless stack. This work is based on the March 2009 D3.0 draft standard. This standard is expected to become final next year. This includes two main net80211 modules, ieee80211_mesh.c which deals with peer link management, link metric calculation, routing table control and mesh configuration and ieee80211_hwmp.c which deals with the actually routing process on the mesh network. HWMP is the mandatory routing protocol on by the mesh standard, but others, such as RA-OLSR, can be implemented. Authentication and encryption are not implemented. There are several scripts under tools/tools/net80211/scripts that can be used to test different mesh network topologies and they also teach you how to setup a mesh vap (for the impatient: ifconfig wlan0 create wlandev ... wlanmode mesh). A new build option is available: IEEE80211_SUPPORT_MESH and it's enabled by default on GENERIC kernels for i386, amd64, sparc64 and pc98. Drivers that support mesh networks right now are: ath, ral and mwl. More information at: http://wiki.freebsd.org/WifiMesh Please note that this work is experimental. Also, please note that bridging a mesh vap with another network interface is not yet supported. Many thanks to the FreeBSD Foundation for sponsoring this project and to Sam Leffler for his support. Also, I would like to thank Gateworks Corporation for sending me a Cambria board which was used during the development of this project. Reviewed by: sam Approved by: re (kensmith) Obtained from: projects/mesh11s
* Cleanup ALIGNED_POINTER:sam2009-07-051-0/+7
| | | | | | | | | | | o add to platforms where it was missing (arm, i386, powerpc, sparc64, sun4v) o define as "1" on amd64 and i386 where there is no restriction o make the type returned consistent with ALIGN o remove _ALIGNED_POINTER o make associated comments consistent Reviewed by: bde, imp, marcel Approved by: re (kensmith)
* Enable POSIX semaphores on all non-embedded architectures by default.ed2009-07-021-0/+1
| | | | | | | | | More applications (including Firefox) seem to depend on this nowadays, so not having this enabled by default is a bad idea. Proposed by: miwi Patch by: Florian Smeets <flo kasimir com> Approved by: re (kib)
* - Work around the broken loader behavior of not demapping no longermarius2009-06-283-28/+37
| | | | | | | | | | | | | | | | | | | | | | used kernel TLB slots when unloading the kernel or modules, which results in havoc when loading a kernel and modules which take up less TLB slots afterwards as the unused but locked ones aren't accounted for in virtual_avail. Eventually this should be fixed in the loader which isn't straight forward though and the kernel should be robust against this anyway. [1] - Ensure that the addresses allocated directly from phys_avail[] by pmap_bootstrap_alloc() are always colored properly. This implicit assumption was broken in r194784 as unlike the other consumers the DPCPU area allocated for the BSP isn't a multiple of PAGE_SIZE * DCACHE_COLORS. [2] - Remove the no longer used global msgbuf_phys. - Remove the redundant ekva parameter of pmap_bootstrap_alloc(). - Correct some outdated function names in ktr(9) invocations. Requested by: jhb [1] Reported by: gavin [2] Approved by: re (kib) MFC after: 2 weeks
* Correct the #endif comment.alc2009-06-261-1/+1
| | | | | Noticed by: jmallett Approved by: re (kib)
* This change is the next step in implementing the cache control functionalityalc2009-06-261-0/+35
| | | | | | | | | | | required by video card drivers. Specifically, this change introduces vm_cache_mode_t with an appropriate VM_CACHE_DEFAULT definition on all architectures. In addition, this changes adds a vm_cache_mode_t parameter to kmem_alloc_contig() and vm_phys_alloc_contig(). These will be the interfaces for allocating mapped kernel memory and physical memory, respectively, with non-default cache modes. In collaboration with: jhb
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