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* - Wrap exchanging td_intr_frame and calling the event timer callback inmarius2010-10-193-17/+19
* - In oneshot-mode it doesn't make sense to try to compensate the clockmarius2010-10-171-45/+41
* Explicitly lower the PIL to 0 as part of enabling interrupts, similar tomarius2010-10-141-0/+1
* - In the spirit of r212559 add a comment describing what will eventuallymarius2010-10-141-1/+11
* In the replacement text of the __bswapN_const() macros cast the argumentmarius2010-10-081-12/+14
* Fix bogus error message from bus_dmamem_alloc() about incorrect alignment.neel2010-09-291-1/+1
* minor simplifications and cosmeticsmarius2010-09-241-10/+6
* Now userland POSIX semaphore is based on umtx. The kernel moduledavidxu2010-09-241-1/+0
* For sparc64 relocations that directly put bits of the symbol value intokib2010-09-221-18/+22
* Remove accidentally committed test code which effectively prevented themarius2010-09-161-2/+0
* Add a VIS-based block copy function for SPARC64 V and later, whichmarius2010-09-153-1/+121
* Add macros for alternate entry points.marius2010-09-151-1/+8
* Sync with other platforms:marius2010-09-151-9/+17
* - Update the comment in swi_vm() regarding busdma bounce buffers; it'smarius2010-09-151-5/+2
* Remove a KASSERT which will also trigger for perfectly valid combinationsmarius2010-09-141-3/+0
* Remove redundant raising of the PIL to PIL_TICK as the respective locoremarius2010-09-142-2/+0
* Refactor timer management code with priority to one-shot operation mode.mav2010-09-134-14/+12
* Sparc64 uses dummy cpu_idle() method. It's CPUs never sleeping. Tellmav2010-09-111-1/+1
* bus_add_child: change type of order parameter to u_intavg2010-09-101-1/+1
* Catch up to rename of the constant for the Master Data Parity Error bit injhb2010-09-091-1/+1
* Enable sis(4). sis(4) should work on all architectures.yongari2010-09-021-1/+1
* Skip a KASSERT which isn't appropriate when not employing page coloring.marius2010-08-211-3/+4
* Remove unused KTRACE includes.jhb2010-08-191-5/+0
* Supply some useful information to the started image using ELF aux vectors.kib2010-08-171-1/+7
* Update various places that store or manipulate CPU masks to use cpumask_tjhb2010-08-113-9/+9
* Wrap some sun4u-only symbols.marius2010-08-081-5/+3
* - As it is not possible for sched_bind(9) to context switch withmarius2010-08-085-34/+113
* - Introduce a cpu_ipi_single() function pointer in order to send IPIsmarius2010-08-082-25/+176
* For CPUs which ignore TD_CV and support hardware unaliasing don'tmarius2010-08-086-60/+80
* Add a new ipi_cpu() function to the MI IPI API that can be used to send anjhb2010-08-061-0/+11
* Adapt sparc64 and sun4v timer code for the new event timers infrastructure.mav2010-07-298-64/+152
* Add MALLOC_DEBUG_MAXZONES debug malloc(9) option to use multiple umamdf2010-07-281-0/+1
* Very rough first cut at NUMA support for the physical page allocator. Forjhb2010-07-271-0/+7
* KTR_CTx are long time aliased by existing classes so they can't serveattilio2010-07-213-3/+3
* Allocate proper ammount of memory for interrupt names on sparc64 andmav2010-07-163-2/+2
* - Pin the IPI cache and TLB demap functions in order to prevent migrationmarius2010-07-041-8/+24
* Move prototypes for kern_sigtimedwait() and kern_sigprocmask() tojhb2010-06-301-0/+1
* Provide for multiple, cascaded PICs on PowerPC systems, and extend thenwhitehorn2010-06-186-6/+6
* Update a branch missed in r207537.marius2010-06-131-1/+1
* Relax one of the new assertions in pmap_enter() a little. Specifically,alc2010-06-111-1/+2
* Reduce the scope of the page queues lock and the number ofalc2010-06-101-9/+15
* Don't set PG_WRITEABLE in pmap_enter() unless the page is managed.alc2010-06-051-3/+5
* Push down page queues lock acquisition in pmap_enter_object() andalc2010-05-261-6/+13
* Roughly half of a typical pmap_mincore() implementation is machine-alc2010-05-241-12/+40
* Reorganize syscall entry and leave handling.kib2010-05-233-110/+31
* Change ad_firmware_geom_adjust() to operate on a struct disk * only andmarius2010-05-202-7/+4
* On entry to pmap_enter(), assert that the page is busy. While I'malc2010-05-161-1/+12
* - Enable DMA write parity error interrupts on Schizo with a workingmarius2010-05-143-41/+91
* Push down the page queues into vm_page_cache(), vm_page_try_to_cache(), andalc2010-05-081-3/+8
* Push down the page queues lock inside of vm_page_free_toq() andalc2010-05-061-5/+10
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