| Commit message (Collapse) | Author | Age | Files | Lines |
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Submitted by: jhb@freebsd.org
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The ability to schedule multiple threads per process
(one one cpu) by making ALL system calls optionally asynchronous.
to come: ia64 and power-pc patches, patches for gdb, test program (in tools)
Reviewed by: Almost everyone who counts
(at various times, peter, jhb, matt, alfred, mini, bernd,
and a cast of thousands)
NOTE: this is still Beta code, and contains lots of debugging stuff.
expect slight instability in signals..
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and you will not mount an ATA /:
mountroot> ufs:/ad0a
Mounting root from ufs:/ad0a
setrootbyname failed
ffs_mountroot: can't find rootvp
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Approved by: jake
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installed with pmap_kenter_flags, since the physical addresses may not
have an associated vm_page. Add a function to do this.
Tested by: Tomi Vainio <Tomi.Vainio@Sun.COM>
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obtained, when all other scheduling activity is suspended. This is needed
on sparc64 to deactivate the vmspace of the exiting process on all cpus.
Otherwise if another unrelated process gets the exact same vmspace structure
allocated to it (same address), its address space will not be activated
properly. This seems to fix some spontaneous signal 11 problems with smp
on sparc64.
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Approved by: alfred
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Reviewed by: tmm
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dcache aliasing. A page that already had more than 1 mapping of the
same virtual colour would not be correctly uncached.
Noticed by: Artur Grabowski <art@openbsd.org>
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Reviewed by: peter
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Requested by: peter
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for supporting UIO_USERISPACE (ie: it wasn't used).
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implementations can provide a base zero ffs function if they wish.
This changes
#define RQB_FFS(mask) (ffs64(mask))
foo = RQB_FFS(mask) - 1;
to
#define RQB_FFS(mask) (ffs64(mask) - 1)
foo = RQB_FFS(mask);
On some platforms we can get the "- 1" for free, eg: those that use the
C code for ffs64().
Reviewed by: jake (in principle)
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magic numbers. Use stxa_sync instead of stxa; membar #Sync; to ensure
that no instruction is placed between the two. This can cause random
corruption even though interrupts are already disabled.
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code. Both tasks are not always performed completely by the firmware.
The former is required to get some e450 models to boot; the latter fixes
the repeated fifo underruns with hme(4)s and gem(4)s observed on some
machines (and probably performance problems with other peripherals as
well).
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suggests kernel bugs (4, 10, 11). Add a sysctl debug.debugger_on_signal
which turns this on and off, default off.
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in their tlb which the prom doesn't clear out, so we have to do so manually
before mapping the kernel page table or the cpu can hang due various
conditions which cause undefined behaviour from the tlb.
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- ktrace no longer requires Giant so do ktrace syscall events before and
after acquiring and releasing Giant, respectively.
- For i386, ia32 syscalls on ia64, powerpc, and sparc64, get rid of the
goto bad hack and instead use the model on ia64 and alpha were we
skip the actual syscall invocation if error != 0. This fixes a bug
where if we the copyin() of the arguments failed for a syscall that
was not marked MP safe, we would try to release Giant when we had
not acquired it.
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early for pmap_kenter.
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which has a different definition for this is alpha.
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over people with gems.
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vunmapbuf, this is handled by pmap now.
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we don't flush all mappings of a physical page in order to make it
virtually cachable again, if it is already cachable.
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the pv lists in the vm_page, even unmanaged kernel mappings. This is so
that the virtual cachability of these mappings can be tracked when a page
is mapped to more than one virtual address. All virtually cachable
mappings of a physical page must have the same virtual colour, or illegal
alises can be created in the data cache. This is a bit tricky because we
still have to recognize managed and unmanaged mappings, even though they
are all on the pv lists.
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allocated pv entries and use the linkage in the tte for pv operations.
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kernel text and data from the loader to the kernel, so that the tte format
is not part of the loader->kernel ABI.
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all optimizations for architectures which have large sparse page tables,
and/or can't put the pv linkage inside of the page table entries.
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the other (or both) to all the platforms. Similar for fuword32 and
fuword64.
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intr_dequeue in asm so that it can easily be modified to do light weight
context switching.
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architectures by using a 64 bit word for the bit array which keeps
track of non-empty queues.
Reviewed by: peter
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Pass the tte data to tsb_tte_enter instead of a whole tte, also to avoid
copying.
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value of the tag or data field.
Add macros for getting the page shift, size and mask for the physical page
that a tte maps (which may be one of several sizes).
Use the new cache functions for invalidating single pages.
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page. These send IPIs if necessary in order to keep the caches in sync on
all cpus.
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