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* Compile osigreturn() unconditionally since it will always be needed onbde2002-02-011-0/+12
| | | | | | | | | | | | | | | | | | some arches and the syscall table is machine-independent. It was (bogusly) conditional on COMPAT_43, so this usually makes no difference. ia64: in addition: - replace the bogus cloned comment before osigreturn() by a correct one. osigreturn() is just a stub fo ia64's. - fix the formatting of cloned comment before sigreturn(). - fix the return code. use nosys() instead of returning ENOSYS to get the same semantics as if the syscall is not in the syscall table. Generating SIGSYS is actually correct here. - fix style bugs. powerpc: copy the cleaned up ia64 stub. This mainly fixes a bogus comment. sparc64: copy the cleaned up the ia64 stub, since there was no stub before.
* Add extern to avoid sloppy common style declarations.jake2002-01-161-2/+2
| | | | Tripped over by: jhb, mux@sneakerz.org
* Add upa.h, which I had previously forgotten, to unbreak the sparc64tmm2002-01-081-0/+34
| | | | | | kernel build. Pointy hat to: tmm
* Catch up to the latest and greatest.jake2002-01-081-1/+26
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* Add initial smp support. This gets as far as allowing the secondaryjake2002-01-087-0/+1093
| | | | | | | | | | cpu(s) into the kernel, and sync-ing them up to "kernel" mode so we can send them ipis, which also work. Thanks to John Baldwin for providing me with access to the hardware that made this possible. Parts obtained from: bsd/os
* Setup the normal global pcb register as well on entry from user land.jake2002-01-082-92/+116
| | | | | | | | | | | | | Call critical_enter/critical_exit around (fast) interrupt handlers. All non-threaded interrupts are fast, and the threaded interrupt scheduler is itself a fast interrupt. Assert that an interrupt handler we are about to call is non-zero. Be paranoid about restoring the users global registers. Do it as the last thing before switching to alternate globals (when we magically get our preloaded registers back), and do it with interrupts disabled. Any kind of kernel trap when the globals are not setup properly is bad news. Don't save and restore the kernel g6, it invariably points to the current pcb now.
* Adapt the vectored interrupt handler for receiving ipis. If the secondjake2002-01-082-94/+106
| | | | | | | | data word in an interrupt packet is non-zero, it points to code to execute to handle the ipi, so jump to it instead of enqueueing the packet. It is unclear if we will need queued ipis. Interrupt g7 now points to pcpu, instead of to the per-cpu interrupt queue itself, so use that instead. Interrupt g6 is no longer reserved.
* Use the per-cpu panic stack in the case of a fault with a bad kerneljake2002-01-082-4/+10
| | | | stack.
* Remove ATOMIC_INC_INT macro which has moved elsewhere.jake2002-01-082-22/+0
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* Catch up to change in compile time assertion interface.jake2002-01-082-3/+3
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* Make this code more robust in the event of stray interrupts. Handlejake2002-01-081-12/+22
| | | | stray level interrupts as well.
* Use cpufunc macros instead of using inline asm directly.jake2002-01-081-1/+1
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* Set the normal global pcb register when context switching.jake2002-01-082-0/+4
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* Add a macro for getting the tlbs (itlb and/or dtlb) which the givenjake2002-01-081-0/+1
| | | | tte may be mapped by.
* Prototype pmap_map_tsb().jake2002-01-081-0/+2
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* Remove PANIC_STACK_PAGES which is no longer used.jake2002-01-081-5/+3
| | | | Redefine the compile time assertion macro to take one parameter.
* Add declarations needed by last commit.jake2002-01-081-0/+8
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* Update comments about _start, the kernel entry point, to reflect newjake2002-01-084-101/+321
| | | | | | | | | | | | | | parameters needed for smp support. If we are not the boot processor, jump to the smp startup code instead. Implement a per-cpu panic stack, which is used for bootstrapping both primary and secondary processors and during faults on the kernel stack. Arrange the per-cpu page like the pcb, with the struct pcpu at the end of the page and the panic stack before it. Use the boot processor's panic stack for calling sparc64_init. Split the code to set preloaded global registers and to map the kernel tsb out into functions, which non-boot processors can call. Allocate the kstack for thread0 dynamically in pmap_bootstrap, and give it a guard page too.
* Fix qsort callouts used for sorting memory regions during boot. vm_offset_tjake2002-01-081-4/+22
| | | | | | is unsigned, so we can't use signed arithmetic. Tripped over by: jhb
* Add a md field to pcpu for the upa module id.jake2002-01-081-3/+6
| | | | | | Remove the alt_stack field. Use the defines for the register variables declared in C, so that they don't get out of sync with the assembler.
* Define CKLF_PC in terms of TRAPF_PC.jake2002-01-081-1/+1
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* Add a mov() macro, which is used in conjunction with the register definesjake2002-01-081-0/+4
| | | | for setting reserved global registers from c.
* Update comments and defines to reflect that normal and alternate g6 pointjake2002-01-081-22/+52
| | | | | | | to the current pcb. Remove interrupt global defines; they use PCPU_REG now. Move ATOMIC_INC_INT here from exception.s, add ATOMIC_DEC_INT. Add a KASSERT macro for use in assembler.
* Add asis for the upa config reg, which contains the hardware cpu id, andjake2002-01-081-0/+2
| | | | for the interrupt send register, which is used for dispatching ipis.
* Convert a bunch of 1 << PCPU_GET(cpuid) to PCPU_GET(cpumask).peter2002-01-051-1/+1
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* 1. Implement an optimization for pmap_remove() and pmap_protect(): if atmm2002-01-024-48/+143
| | | | | | | | | | | | | | substantial fraction of the number of entries of tte's in the tsb would need to be looked up, traverse the tsb instead. This is crucial in some places, e.g. when swapping out a process, where a certain pmap_remove() call would take very long time to complete without this. 2. Implement pmap_qenter_flags(), which will become used later 3. Reactivate the instruction cache flush done when mapping as executable. This is required e.g. when executing files via NFS, but is known to cause problems on UltraSPARC-IIe CPU's. If you have such a CPU, you will need to comment this call out for now. Submitted by: jake (3)
* Correct the defintion of struct ofw_upa_regs, and use it instead oftmm2002-01-026-61/+82
| | | | | | | struct ofw_nexus_reg. Implement UPA device memory management in the nexus driver. Adapt the psycho driver to these changes, and do some minor cleanup work while being there.
* Close a window of time during early boot in which an interrupt wouldtmm2002-01-021-18/+18
| | | | | | cause a panic. Reported and tested (in another version) by: Jamey Wood <Jamey.Wood@Sun.COM>
* Correctly identify the cpu in certain ultra 1s.jake2002-01-011-0/+1
| | | | | Noticed by: Jamey Wood <Jamey.Wood@Sun.COM> Submitted by: tmm
* Define __ASM__ so that libc will know not to define C things.jake2002-01-011-0/+2
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* Add a define for the fp restore soft trap type.jake2002-01-011-1/+2
| | | | Only declare C things if __ASM__ is not defined.
* Add constants needed by user trap code.jake2002-01-011-0/+6
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* Enable virtual caching for kernel pages. When we enabled virtual cachingjake2002-01-011-3/+3
| | | | | | | | | for certain user pages, stores to kernel pages would not update the affected cache lines, which would sometimes cause the wrong data to be returned for loads from kernel pages. This was especially fatal when the addresses affected held the kernel stack pointer, and a random value was loaded into it. Fix a harmless off by one error in a dcache_inval_phys call.
* Add some more info to traces.jake2002-01-012-38/+26
| | | | | | | Fix a potential race in setting up the per-cpu pointer if the special restore fails on return to user mode fails and we need to trap back into the kernel to fault in more stack. Remove debug code.
* Ensure that the syscall trap vector is properly aligned.jake2002-01-012-0/+2
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* Implement sysarch(SPARC_UTRAP_INSTALL).jake2002-01-011-0/+69
| | | | Forgot this file in last commit.
* Implement user trap delivery as specified by the sparc abi. This providesjake2002-01-016-4/+189
| | | | | | | | | | | | | | | an efficient way for the kernel to bounce certain mundane traps back to userland for handling there. A user trap handler returns directly to the trapping user code, rather than going through the kernel again. Only a handful of instructions are actually executed in kernel mode. Implement sysarch(SPARC_UTRAP_INSTALL). Add code to handle sharing of the user trap table across forks and unsharing at exec. This can be used to implement efficient tracking of floating point register usage in userland, fe by a thread library, and to handle alignment fault fixups and instruction emulation in userland, for which the code may need to be different for 32bit and 64bit binaries.
* Add a panic stack, which is used as a known good stack when there isjake2002-01-016-9/+244
| | | | | | something wrong with the kernel stack. Add code to check the kernel stack pointer in various important places and try hard not to go down in flames if its wrong.
* Add a soft trap for restoring the fpu registers from the pcb.jake2002-01-012-0/+24
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* Fix long lines in the trap table due to the abi specificied trap typesjake2002-01-012-258/+260
| | | | having overly long names.
* Do not include pcib.h, which only existed in my development tree, and dotmm2001-12-301-2/+1
| | | | | | | not use struct pcib_softc when struct apb_softc would be correct. Spotted by: jake Pointy hat to: tmm
* Add bus_common.h, which contains some definiton that apply to both PCItmm2001-12-301-0/+69
| | | | | | and SBus. Obtained from: NetBSD
* Make these compile.jake2001-12-293-24/+18
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* Remove local change that crept in.jake2001-12-291-1/+0
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* Add a header for user trap types required by the sparc abi.jake2001-12-291-0/+84
| | | | | For simplicity the corresponding kernel types use the same numerical values.
* Adapt for used by upcoming fp emulation code.jake2001-12-291-62/+41
| | | | | | Comment. Submitted by: tmm
* Print the correct v9 opcodes.jake2001-12-291-18/+18
| | | | Submitted by: tmm
* Update to new constants.jake2001-12-291-34/+34
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* Make cont in ddb work.jake2001-12-291-0/+1
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* Prototype dcache_inval_phys.jake2001-12-291-0/+1
| | | | Submitted by: tmm
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