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path: root/sys/sparc64/sparc64/swtch.S
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* - Use atomic operations rather than sched_lock for safely assigning pm_activemarius2011-10-061-12/+52
* Update for the fact that pm_active and pc_cpumask were changed to cpuset_t.marius2011-05-111-11/+29
* - Add TTE and context register bits for the additional page sizes supportedmarius2010-03-171-1/+1
* Implement handling of the third argument of cpu_switch(). This unbreaksmarius2010-01-301-40/+49
* For cheetah-class CPUs ensure that the dt512_0 is set to hold 8k pagesmarius2008-09-081-0/+4
* USIII and beyond CPUs have stricter requirements when it comesmarius2008-09-081-1/+2
* cosmetic changes and style fixesmarius2008-08-131-7/+7
* Convert the remainder of the low hanging fruits regarding includingmarius2007-01-191-0/+2
* Move the per-CPU vmspace pointer fixup that is required before atmm2004-05-261-15/+16
* - Fix placement of cvs ids in previous commit to match .S files in libc.jake2003-04-291-5/+5
* I was wrong, the ENTRY bits in asm.h did have a purpose -- for userland.obrien2003-04-261-2/+3
* - Move the routine for flushing all user mappings from the tlb from pmap tojake2003-04-131-71/+41
* Add support for saving and restoring kernel floating point state. The statejake2003-04-031-0/+14
* - Generally improve register usage in cpu_switch. Use the 'in' registersjake2003-04-031-71/+63
* Don't assume the fp state is at offset 0 in the pcb.jake2003-04-031-1/+1
* Commit a partial lazy thread switch mechanism for i386. it isn't as lazypeter2003-04-021-14/+12
* - Add a flags field to struct pcb. Use this to keep track of wether orjake2003-04-011-0/+3
* - Rename pcb_fpstate to pcb_ufp (user floating point), and change it tojake2003-04-011-24/+9
* Rename pcb_fp to pcb_sp, so as to not be confused with floating pointjake2003-04-011-4/+4
* - Expand struct trapframe to 256 bytes, make all fields fixed width and thejake2002-10-221-2/+2
* Add pmap support for user mappings of multiple page sizes (super pages).jake2002-08-181-5/+6
* Set the thread state of the newly chosen to run thread to TDS_RUNNING injhb2002-07-121-3/+0
* Part 1 of KSE-IIIjulian2002-06-291-0/+3
* Implement kthread context stealing. This is a bit of a misnomer becausejake2002-03-071-27/+26
* Allocate tlb contexts on the fly in cpu_switch, instead of statically 1 to 1jake2002-03-041-34/+108
* Use pcpu.pc_cpumask instead of computing 1 << cpuid.jake2002-02-271-6/+2
* Add a macro for shift of an integer (1 << shift == sizeof). Move the pointerjake2002-02-271-2/+2
* Convert pmap.pm_context to an array of contexts indexed by cpuid. Thisjake2002-02-261-17/+15
* Remove code to lock the user tsb into the tlb. We can handle faults on itjake2002-02-251-17/+1
* Set the normal global pcb register when context switching.jake2002-01-081-0/+2
* Use fprs to track floating register usage. Clear it once we've savedjake2001-12-291-172/+135
* 1. Convert the tstate saved in the pcb to a pstate and test for PSTATE_PEFjake2001-11-181-16/+7
* Use KTR_PROC instead of KTR_CT1 in traces.jake2001-10-201-10/+10
* Fix some traces. td->p_comm doesn't exist.jake2001-09-301-3/+6
* KSE Milestone 2julian2001-09-121-22/+24
* Add ktr traces to copy{in,out} and cpu_switch.jake2001-09-031-3/+67
* Save and restore %fprs and %y, which are unused by kernel code, butjake2001-08-211-12/+35
* The author isn't a [UC] Regents. Correct the copyright language.obrien2001-08-091-2/+2
* Handle switching switching mmu contexts and mapping the new primary tsb.jake2001-08-061-14/+92
* Add floating point context switching code for sparc64.tmm2001-08-041-14/+75
* Flesh out the sparc64 port considerably. This contains:jake2001-07-311-0/+69
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