Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | Fix interrupt assignment for non-builtin PCI devices on e450s. | tmm | 2003-05-30 | 1 | -19/+67 |
* | Set the cache line size for subordinate pci bridges as well as for their | jake | 2003-03-27 | 1 | -2/+2 |
* | Back out M_* changes, per decision of the TRB. | imp | 2003-02-19 | 1 | -2/+2 |
* | Remove M_TRYWAIT/M_WAITOK/M_WAIT. Callers should use 0. | alfred | 2003-01-21 | 1 | -2/+2 |
* | Initialize the cache line size register of all PCI devices in the | tmm | 2003-01-06 | 1 | -0/+15 |
* | Reverse the quirk table entry for swizzling on a missing interrupt map; | tmm | 2002-12-01 | 1 | -7/+10 |
* | Add two new workaround for firmware anomalies: | tmm | 2002-11-07 | 1 | -8/+64 |
* | Add PCI bus enumeration and latency timer setup to the sparc64 MD PCI | tmm | 2002-06-12 | 1 | -72/+134 |
* | Make the OpenFirmware interrupt mapping code more generic, to reduce | tmm | 2002-03-24 | 1 | -92/+24 |
* | Don't panic when no interrupt map can be found for a PCI bus; this seems | tmm | 2002-02-13 | 1 | -2/+5 |
* | Add support for the Sun psycho/sabre UPA-PCI bridge, some OpenFirmware | tmm | 2001-11-09 | 1 | -0/+267 |