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* MFC r257854 (discussed with alc@)ian2014-05-161-10/+8
| | | | | | | | | | | | | As of r257209, all architectures have defined VM_KMEM_SIZE_SCALE. In other words, every architecture is now auto-sizing the kmem arena. This revision changes kmeminit() so that the definition of VM_KMEM_SIZE_SCALE becomes mandatory and the definition of VM_KMEM_SIZE becomes optional. Replace or eliminate all existing definitions of VM_KMEM_SIZE. With auto-sizing enabled, VM_KMEM_SIZE effectively became an alternate spelling for VM_KMEM_SIZE_MIN on most architectures. Use VM_KMEM_SIZE_MIN for clarity.
* MFC r263998:tijl2014-04-151-1/+1
| | | | | Rename __wchar_t so it no longer conflicts with __wchar_t from clang 3.4 -fms-extensions.
* MFC r257228:kib2013-12-171-0/+2
| | | | | Add bus_dmamap_load_ma() function to load map with the array of vm_pages.
* Implement GET_STACK_USAGE.marius2013-09-291-0/+11
| | | | | | | Discussed with: mav Approved by: re (kib) MFC after: 1 week
* Fix build with gcc. Move sf_buf_alloc()/sf_buf_free() declarationsglebius2013-09-061-0/+3
| | | | to MD headers.
* Add MD (for now) atomic_store_acq_<type>() and use it in pmap_activate()marius2013-08-061-9/+25
| | | | | | | to get the semantics when setting the PMAP right. Prior to r251782, the latter already used implicit acquire semantics, which - currently - means to not employ additional explicit memory barriers under the hood (see also r225889).
* Remove unused member.attilio2013-08-041-1/+0
| | | | | | Sponsored by: EMC / Isilon storage division Reviewed by: alc Tested by: pho
* Revert r253748,253749avg2013-07-281-2/+2
| | | | | | This WIP should not have been committed yet. Pointyhat to: avg
* put contents of cpu.h under _KERNELavg2013-07-281-2/+2
| | | | | | no userland-serviceable parts inside MFC after: 20 days
* Prefix the alias macros for members of struct __mcontext with an underscoremarius2013-07-121-11/+11
| | | | in order to avoid a clash in the net80211 code.
* Fix issues with zeroing and fetching the counters, on x86 and ppc64.kib2013-07-011-0/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Issues were noted by Bruce Evans and are present on all architectures. On i386, a counter fetch should use atomic read of 64bit value, otherwise carry from the increment on other CPU could be lost for the given fetch, making error of 2^32. If 64bit read (cmpxchg8b) is not available on the machine, it cannot be SMP and it is enough to disable preemption around read to avoid the split read. On x86 the counter increment is not atomic on purpose, which makes it possible for the store of the incremented result to override just zeroed per-cpu slot. The effect would be a counter going off by arbitrary value after zeroing. Perform the counter zeroing on the same processor which does the increments, making the operations mutually exclusive. On i386, same as for the fetching, if the cmpxchg8b is not available, machine is not SMP and we disable preemption for zeroing. PowerPC64 is treated the same as amd64. For other architectures, the changes made to allow the compilation to succeed, without fixing the issues with zeroing or fetching. It should be possible to handle them by using the 64bit loads and stores atomic WRT preemption (assuming the architectures also converted from using critical sections to proper asm). If architecture does not provide the facility, using global (spin) mutex would be non-optimal but working solution. Noted by: bde Sponsored by: The FreeBSD Foundation
* Remove conflicting macros from SPARC64's atomic(9) header.ed2013-06-151-15/+3
| | | | | | | The atomic_load() and atomic_store() macros conflict with the equally named macros from <stdatomic.h>. Remove them, as they are only used to implement functions that are not present on any of the other architectures.
* Rename VM_NDOMAIN into MAXMEMDOM and move it into machine/param.h inattilio2013-05-072-7/+4
| | | | | | | | | order to match the MAXCPU concept. The change should also be useful for consolidation and consistency. Sponsored by: EMC / Isilon storage division Obtained from: jeff Reviewed by: alc
* Merge from projects/counters: counter(9).glebius2013-04-081-0/+54
| | | | | | | | | | | | | Introduce counter(9) API, that implements fast and raceless counters, provided (but not limited to) for gathering of statistical data. See http://lists.freebsd.org/pipermail/freebsd-arch/2013-April/014204.html for more details. In collaboration with: kib Reviewed by: luigi Tested by: ae, ray Sponsored by: Nginx, Inc.
* Merge from projects/counters:glebius2013-04-081-1/+2
| | | | | | | Pad struct pcpu so that its size is denominator of PAGE_SIZE. This is done to reduce memory waste in UMA_PCPU_ZONE zones. Sponsored by: Nginx, Inc.
* Reform the busdma API so that new types may be added without modifyingkib2013-02-121-16/+21
| | | | | | | | | | | | | | | | | | | | | every architecture's busdma_machdep.c. It is done by unifying the bus_dmamap_load_buffer() routines so that they may be called from MI code. The MD busdma is then given a chance to do any final processing in the complete() callback. The cam changes unify the bus_dmamap_load* handling in cam drivers. The arm and mips implementations are updated to track virtual addresses for sync(). Previously this was done in a type specific way. Now it is done in a generic way by recording the list of virtuals in the map. Submitted by: jeff (sponsored by EMC/Isilon) Reviewed by: kan (previous version), scottl, mjacob (isp(4), no objections for target mode changes) Discussed with: ian (arm changes) Tested by: marius (sparc64), mips (jmallet), isci(4) on x86 (jharris), amd64 (Fabian Keil <freebsd-listen@fabiankeil.de>)
* The 'end' word was missed in the comment.kib2013-02-081-2/+2
| | | | MFC after: 3 days
* Revert the part of r239864 which removed obtaining the SMP mutex aroundmarius2013-01-231-18/+2
| | | | | | | | | | | | | reading registers from other CPUs. As it turns out, the hardware doesn't really like concurrent IPI'ing causing adverse effects. Also the thought deadlock when using this spin lock here and the targeted CPU(s) are also holding or in case of nested locks can't actually happen. This is due to the fact that on sparc64, spinlock_enter() only raises the PIL but doesn't disable interrupts completely. Thus direct cross calls as used for the register reading (and all other MD IPI needs) still will be executed by the targeted CPU(s) in that case. MFC after: 3 days
* - Implement run-time expansion of the KTR buffer via sysctl.jeff2012-11-151-0/+1
| | | | | | | | | | - Implement a function to ensure that all preempted threads have switched back out at least once. Use this to make sure there are no stale references to the old ktr_buf or the lock profiling buffers before updating them. Reviewed by: marius (sparc64 parts), attilio (earlier patch) Sponsored by: EMC / Isilon Storage Division
* Rework the known rwlock to benefit about staying on their ownattilio2012-11-031-7/+1
| | | | | | | cache line in order to avoid manual frobbing but using struct rwlock_padalign. Reviewed by: alc, jimharris
* - Give PIL_PREEMPT the lowest priority just above low/stray interrupts.marius2012-10-201-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The reason for this is that the SPARC v9 architecture allows nested interrupts of higher priority/level than that of the current interrupt to occur (and we can't just entirely bypass this model, also, at least for tick interrupts, this also wouldn't be wise). However, when a preemption interrupt interrupts another interrupt of lower priority, f.e. PIL_ITHREAD, and that one in turn is nested by a third interrupt, f.e. PIL_TICK, with SCHED_ULE the execution of interrupts higher than PIL_PREEMPT may be migrated to another CPU. In particular, tl1_ret(), which is responsible for restoring the state of the CPU prior to entry to the interrupt based on the (also migrated) trap frame, then is run on a CPU which actually didn't receive the interrupt in question, causing an inappropriate processor interrupt level to be "restored". In turn, this causes interrupts of the first level, i.e. PIL_ITHREAD in the above scenario, to be blocked on the target of the migration until the correct PIL happens to be restored again on that CPU again. Making PIL_PREEMPT the lowest real priority, this effectively prevents this scenario from happening, as preemption interrupts no longer can interrupt any other interrupt besides stray ones (which is no issue). Thanks to attilio@ and especially mav@ for helping me to understand this problem at the 201208DevSummit. - Give PIL_STOP (which is also used for IPI_STOP_HARD, given that there's no real equivalent to NMIs on SPARC v9) the highest possible priority just below the hardwired PIL_TICK, so it has a chance to interrupt more things. MFC after: 1 week
* Add an unified macro to deny ability from the compiler to reorderattilio2012-10-091-3/+3
| | | | | | | | | | instruction loads/stores at its will. The macro __compiler_membar() is currently supported for both gcc and clang, but kernel compilation will fail otherwise. Reviewed by: bde, kib Discussed with: dim, theraven MFC after: 2 weeks
* Reverts r234074,234105,234564,234723,234989,235231-235232 and part ofattilio2012-10-091-2/+2
| | | | | | | | r234247. Use, instead, the static intializer introduced in r239923 for x86 and sparc64 intr_cpus, unwinding the code to the initial version. Reviewed by: marius
* Prevent indent(1) from reformatting this comment, as it containsgavin2012-09-071-1/+1
| | | | a formatting-sensitive table.
* Add a global MD macro for the VIS block size instead of duplicatingmarius2012-08-311-0/+2
| | | | | | it and using magic values all over the place. MFC after: 1 week
* - Unlike cache invalidation and TLB demapping IPIs, reading registers frommarius2012-08-291-9/+25
| | | | | | | | | | | | | other CPUs doesn't require locking so get rid of it. As the latter is used for the timecounter on certain machine models, using a spin lock in this case can lead to a deadlock with the upcoming callout(9) rework. - Merge r134227/r167250 from x86: Avoid cross-IPI SMP deadlock by using the smp_ipi_mtx spin lock not only for smp_rendezvous_cpus() but also for the MD cache invalidation and TLB demapping IPIs. - Mark some unused function arguments as such. MFC after: 1 week
* Merge r236494 from x86:marius2012-08-051-1/+7
| | | | | | | Isolate the global TTE list lock from data and other locks to prevent false sharing within the cache. MFC after: 3 days
* Make the wchar_t type machine dependent.andrew2012-06-242-6/+4
| | | | | | | | | | | | | | This is required for ARM EABI. Section 7.1.1 of the Procedure Call for the ARM Architecture (AAPCS) defines wchar_t as either an unsigned int or an unsigned short with the former preferred. Because of this requirement we need to move the definition of __wchar_t to a machine dependent header. It also cleans up the macros defining the limits of wchar_t by defining __WCHAR_MIN and __WCHAR_MAX in the same machine dependent header then using them to define WCHAR_MIN and WCHAR_MAX respectively. Discussed with: bde
* Implement mechanism to export some kernel timekeeping data tokib2012-06-221-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | usermode, using shared page. The structures and functions have vdso prefix, to indicate the intended location of the code in some future. The versioned per-algorithm data is exported in the format of struct vdso_timehands, which mostly repeats the content of in-kernel struct timehands. Usermode reading of the structure can be lockless. Compatibility export for 32bit processes on 64bit host is also provided. Kernel also provides usermode with indication about currently used timecounter, so that libc can fall back to syscall if configured timecounter is unknown to usermode code. The shared data updates are initiated both from the tc_windup(), where a fast task is queued to do the update, and from sysctl handlers which change timecounter. A manual override switch kern.timecounter.fast_gettime allows to turn off the mechanism. Only x86 architectures export the real algorithm data, and there, only for tsc timecounter. HPET counters page could be exported as well, but I prefer to not further glue the kernel and libc ABI there until proper vdso-based solution is developed. Minimal stubs neccessary for non-x86 architectures to still compile are provided. Discussed with: bde Reviewed by: jhb Tested by: flo MFC after: 1 month
* Reserve AT_TIMEKEEP auxv entry for providing usermode the pointer tokib2012-06-221-0/+1
| | | | | | timekeeping information. MFC after: 1 week
* The page flag PGA_WRITEABLE is set and cleared exclusively by the pmapalc2012-06-161-0/+1
| | | | | | | | | | | | | | | | layer, but it is read directly by the MI VM layer. This change introduces pmap_page_is_write_mapped() in order to completely encapsulate all direct access to PGA_WRITEABLE in the pmap layer. Aesthetics aside, I am making this change because amd64 will likely begin using an alternative method to track write mappings, and having pmap_page_is_write_mapped() in place allows me to make such a change without further modification to the MI VM layer. As an added bonus, tidy up some nearby comments concerning page flags. Reviewed by: kib MFC after: 6 weeks
* Replace all uses of the vm page queues lock by a r/w lock that is privatealc2012-05-291-0/+2
| | | | | | | | | | | | | to this pmap.c. This new r/w lock is used primarily to synchronize access to the TTE lists. However, it will be used in a somewhat unconventional way. As finer-grained TTE list locking is added to each of the pmap functions that acquire this r/w lock, its acquisition will be changed from write to read, enabling concurrent execution of the pmap functions with finer-grained locking. Reviewed by: attilio Tested by: flo MFC after: 10 days
* MFp4 bz_ipv6_fast:bz2012-05-241-0/+4
| | | | | | | | | | | | | | | | | | | | in_cksum.h required ip.h to be included for struct ip. To be able to use some general checksum functions like in_addword() in a non-IPv4 context, limit the (also exported to user space) IPv4 specific functions to the times, when the ip.h header is present and IPVERSION is defined (to 4). We should consider more general checksum (updating) functions to also allow easier incremental checksum updates in the L3/4 stack and firewalls, as well as ponder further requirements by certain NIC drivers needing slightly different pseudo values in offloading cases. Thinking in terms of a better "library". Sponsored by: The FreeBSD Foundation Sponsored by: iXsystems Reviewed by: gnn (as part of the whole) MFC After: 3 days
* Fix mismerge in r235231.marius2012-05-101-1/+1
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* Merge r234989 from x86:marius2012-05-101-0/+2
| | | | Revert part of r234723 by re-enabling the SMP protection for intr_bind().
* Add a convenience macro for the returns_twice attribute, and apply it todim2012-04-291-1/+1
| | | | | | | the prototypes of the appropriate functions (getcontext, savectx, setjmp, sigsetjmp and vfork). MFC after: 2 weeks
* Clean up the intr* MD KPI from the SMP dependency, removing a cause ofattilio2012-04-261-2/+0
| | | | | | | | | | | discrepancy between modules and kernel, but deal with SMP differences within the functions themselves. As an added bonus this also helps in terms of code readability. Requested by: gibbs Reviewed by: jhb, marius MFC after: 1 week
* Add casts to __uint16_t to the __bswap16() macros on all arches whichdim2012-03-091-2/+2
| | | | | | | | | | | didn't already have them. This is because the ternary expression will return int, due to the Usual Arithmetic Conversions. Such casts are not needed for the 32 and 64 bit variants. While here, add additional parentheses around the x86 variant, to protect against unintended consequences. MFC after: 2 weeks
* - Change contigmalloc() to use the vm_paddr_t type instead of an unsignedjhb2012-03-011-1/+1
| | | | | | | | | | | | | | | long for specifying a boundary constraint. - Change bus_dma tags to use bus_addr_t instead of bus_size_t for boundary constraints. These allow boundary constraints to be fully expressed for cases where sizeof(bus_addr_t) != sizeof(bus_size_t). Specifically, it allows a driver to properly specify a 4GB boundary in a PAE kernel. Note that this cannot be safely MFC'd without a lot of compat shims due to KBI changes, so I do not intend to merge it. Reviewed by: scottl
* Now that we have a working OF_printf() since r230631 and a OF_panic()marius2012-01-271-29/+1
| | | | | | | | | | | | | | | | helper since r230632, use these for output and panicing during the early cycles and move cninit() until after the static per-CPU data has been set up. This solves a couple of issue regarding the non- availability of the static per-CPU data: - panic() not working and only making things worse when called, - having to supply a special DELAY() implementation to the low-level console drivers, - curthread accesses of mutex(9) usage in low-level console drivers that aren't conditional due to compiler optimizations (basically, this is the problem described in r227537 but in this case for keyboards attached via uart(4)). [1] PR: 164123 [1]
* - Now that we have a working OF_printf() since r230631, use it formarius2012-01-271-2/+3
| | | | | | implementing a simple OF_panic() that may be used during the early cycles when panic() isn't available, yet. - Mark cpu_{exit,shutdown}() as __dead2 as appropriate.
* For machines where the kernel address space is unrestricted increasemarius2012-01-271-1/+1
| | | | | | | | | | VM_KMEM_SIZE_SCALE to 2, awaiting more insight from alc@. As it turns out, the VM apparently has problems with machines that have large holes in the physical address space, causing the kmem_suballoc() call in kmeminit() to fail with a VM_KMEM_SIZE_SCALE of 1. Using a value of 2 allows these, namely Blade 1500 with 2GB of RAM, to boot. PR: 164227
* Mark cpu_{halt,reset}() as __dead2 as appropriate.marius2012-01-271-2/+2
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* Add C11 macros describing subnormal numbers to float.h.das2012-01-231-0/+15
| | | | Reviewed by: bde
* Replace __signed by signed.ed2011-12-131-1/+1
| | | | | The signed keyword is an integral part of the C syntax. There's no need to use __signed.
* Revert r225889 a bit. While it's correct that in total store order there'smarius2011-12-031-1/+4
| | | | | | no need to additionally add CPU memory barriers to the acquire variants of atomic(9), these are documented to also include compiler memory barriers. So add the latter, which were previously included by using membar(), back.
* For sparc64 also adjust the geometry of da(4) driven disks to not overflowmarius2011-11-271-3/+4
| | | | | | | | | | | the 16-bit cylinders field of the VTOC8 disk label (at around 502GB). The geometry chosen for disks above that limit allows to use disks up to 2TB, which is the limit of the extended VTOC8 format. The geometry used for disks smaller than the 16-bit cylinders limit stays the same as used by cam_calc_geometry(9) for extended translation. Thanks to Hans-Joerg Sirtl for providing hardware for testing this change. MFC after: 3 days
* Define curthread as an inline function that loads the thread pointermarius2011-11-151-0/+10
| | | | | | | | directly from g7, the pcpu pointer. This guarantees correct behavior when the thread migrates to a different CPU. Commit message stolen from r205431. Additional testing by Peter Jeremy. MFC after: 3 days
* People porting FreeBSD to new architectures ought not have todas2011-10-211-0/+11
| | | | | | | | | | | | | implement a deprecated FPU control interface in addition to the standard one. To make this clearer, further deprecate ieeefp.h by not declaring the function prototypes except on architectures that implement them already. Currently i386 and amd64 implement the ieeefp.h interface for compatibility, and for fp[gs]etprec(), which doesn't exist on most other hardware. Powerpc, sparc64, and ia64 partially implement it and probably shouldn't, and other architectures don't implement it at all.
* Remove unused define.kib2011-10-071-1/+0
| | | | MFC after: 1 month
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