summaryrefslogtreecommitdiffstats
path: root/sys/sparc64/include/tte.h
Commit message (Expand)AuthorAgeFilesLines
* - Add TTE and context register bits for the additional page sizes supportedmarius2010-03-171-17/+46
* The physical address space of cheetah-class CPUs has been extendedmarius2008-09-041-4/+7
* - Reimplement {d,i}tlb_enter() and {d,i}tlb_va_to_pa() in C. There'smarius2008-08-071-1/+5
* Handle the fictitious pages created by the device pager. For fictitiousjake2003-03-271-0/+2
* Use memset instead of __builtin_memset. Apparently there's an inlinejake2002-12-291-1/+1
* - Add a pmap pointer to struct md_page, and use this to find the pmap thatjake2002-12-211-4/+5
* Add pmap support for user mappings of multiple page sizes (super pages).jake2002-08-181-25/+29
* Remove the tlb argument to tlb_page_demap (itlb or dtlb), in order to betterjake2002-07-261-2/+0
* Add pv list linkage and a pmap pointer to struct tte. Remove separatelyjake2002-05-291-1/+7
* Redefine the tte accessor macros to take a pointer to a tte, instead of thejake2002-05-211-19/+32
* Modify the tte format to not include the tlb context number and to store thejake2002-02-251-34/+8
* Add a macro for getting the tlbs (itlb and/or dtlb) which the givenjake2002-01-081-0/+1
* Make tte bit constants explicitly unsigned and long.jake2001-12-291-46/+33
* Add a macro to get the context from a tte tag, not necesarily a wholejake2001-09-301-6/+2
* style(9) the structure definitions.obrien2001-09-051-2/+2
* Implement pv_bit_count which is used by pmap_ts_referenced.jake2001-09-031-7/+5
* Fix macros for dealing with tte contexts.jake2001-08-061-4/+8
* Flesh out the sparc64 port considerably. This contains:jake2001-07-311-0/+146
OpenPOWER on IntegriCloud