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* Another conversion u_long -> rman_res_tjhibbits2016-02-161-5/+5
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* Allow callers of OF_decode_addr to get the size of the found mapping. Thisandrew2016-02-162-2/+5
| | | | | | | | | | | | | | will allow for code that uses the old fdt_get_range and fdt_regsize functions to find a range, map it, access, then unmap to replace this, up to and including the map, with a call to OF_decode_addr. As this function should only be used in the early boot code the unmap is mostly do document we no longer need the mapping as it's a no-op, at least on arm. Reviewed by: jhibbits Sponsored by: ABT Systems Ltd Differential Revision: https://reviews.freebsd.org/D5258
* Fix a panic bug that cropped up in the PTE rewrite.jhibbits2016-02-162-1/+3
| | | | | | PTE was getting overwritten by just the flags. Pointy-hat to: jhibbits
* POSIX states that #include <signal.h> shall make both mcontext_t andkib2016-02-121-5/+5
| | | | | | | | | | | | | | | | | | | | ucontext_t available. Our code even has XXX comment about this. Add a bit of compliance by moving struct __ucontext definition into sys/_ucontext.h and including it into signal.h and sys/ucontext.h. Several machine/ucontext.h headers were changed to use namespace-safe types (like uint64_t->__uint64_t) to not depend on sys/types.h. struct __stack_t from sys/signal.h is made always visible in private namespace to satisfy sys/_ucontext.h requirements. Apparently mips _types.h pollutes global namespace with f_register_t type definition. This commit does not try to fix the issue. PR: 207079 Reported and tested by: Ting-Wei Lan <lantw44@gmail.com> Sponsored by: The FreeBSD Foundation MFC after: 2 weeks
* Migrate the PTE format for book-e to standardize on the 'indirect PTE' formatjhibbits2016-02-114-65/+66
| | | | | | | | | | | | Summary: The revised Book-E spec, adding the specification for the MMUv2 and e6500, includes a hardware PTE layout for indirect page tables. In order to support this in the future, migrate the PTE format to match the MMUv2 hardware PTE format. Test Plan: Boot tested on a P5020 board. Booted to multiuser mode. Differential Revision: https://reviews.freebsd.org/D5224
* Include sys/_task.h into uma_int.h, so that taskqueue.h isn't aglebius2016-02-091-1/+0
| | | | | | requirement for uma_int.h. Suggested by: jhb
* Fix build of powerpc FPU emulator after changes in r295132 to restore thejhb2016-02-042-24/+24
| | | | | | | | ABI of struct fpreg. The FPU emulator operates on the "raw" FPU state stored in the pcb rather than the "cooked" fpreg state used for ptrace() and cores. Reported by: bz
* Fix build.glebius2016-02-041-0/+1
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* Align signal stack pointer to 16 bytes.jhibbits2016-02-032-5/+5
| | | | | | | | The stack must be aligned to 16 bytes at all times. Clang 3.8 is especially adamant about this, and causes strange behavior and segmentation faults if it is not the case. PR: kern/206810
* Make lbc(4) the same driver pass as simplebus.jhibbits2016-02-031-1/+2
| | | | | | | | Device trees mark lbc as compatible with simplebus. Since simplebus is passed first, it attaches first. When lbc's pass (default pass) comes, the bus is already attached to simplebus, so is skipped. Sponsored by: Alex Perez/Inertial Computing
* Restore the ABI of 'struct fpreg' on powerpc.jhb2016-02-015-13/+19
| | | | | | | | | | | The PT_{GET,SET}FPREGS requests use 'struct fpreg' and the NT_FPREGSET core note stores a copy of 'struct fpreg'. As with x86 and the floating point state there compared to the extended state in XSAVE, struct fpreg on powerpc now only holds the 'base' FP state, and setting it via PT_SETFPREGS leaves the extended vector state in a thread unchanged. Reviewed by: jhibbits Differential Revision: https://reviews.freebsd.org/D5004
* Use the correct type to pmap_mapdev() in nexus_activate_resource().jhibbits2016-02-011-4/+4
| | | | | | | pmap_mapdev() takes vm_paddr_t, which may be sized differently from vm_offset_t, as it is in book-e. Sponsored by: Alex Perez/Inertial Computing
* EHCI: Make core reset and port speed reading more generic.mmel2016-01-281-1/+12
| | | | | | | | | | | | | | | | | Use driver settable callbacks for handling of: - core post reset - reading actual port speed Typically, OTG enabled EHCI cores wants setting of USBMODE register, but this register is not defined in EHCI specification and different cores can have it on different offset. Also, for cores with TT extension, actual port speed must be determinable. But again, EHCI specification not covers this so this patch provides function for two most common variant of speed bits layout. Reviewed by: hselasky Differential Revision: https://reviews.freebsd.org/D5088
* Convert ss_sp in stack_t and sigstack to void *.jhb2016-01-271-1/+1
| | | | | | | | | | | | POSIX requires these members to be of type void * rather than the char * inherited from 4BSD. NetBSD and OpenBSD both changed their fields to void * back in 1998. No new build failures were reported via an exp-run. PR: 206503 (exp-run) Reviewed by: kib MFC after: 1 week Differential Revision: https://reviews.freebsd.org/D5092
* Convert rman to use rman_res_t instead of u_longjhibbits2016-01-277-18/+27
| | | | | | | | | | | | | | | | | | | | Summary: Migrate to using the semi-opaque type rman_res_t to specify rman resources. For now, this is still compatible with u_long. This is step one in migrating rman to use uintmax_t for resources instead of u_long. Going forward, this could feasibly be used to specify architecture-specific definitions of resource ranges, rather than baking a specific integer type into the API. This change has been broken out to facilitate MFC'ing drivers back to 10 without breaking ABI. Reviewed By: jhb Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5075
* Older Book-E processors (e500v1/e500v2) don't support dcbzl.jhibbits2016-01-261-1/+1
| | | | | | | The only difference between dcbzl and dcbz is dcbzl operates on native cache line lengths regardless of L1CSR0[DCBZ32]. Since we don't change the cache line size, the cacheline_size variable will reflect the used cache line length, and dcbz will work as expected.
* Fix a debug printf().jhibbits2016-01-261-2/+2
| | | | | | | Somehow this printf() was missed in the conversion of vm_paddr_t to 64-bit, and made it through until now. Sponsored by: Alex Perez/Inertial Computing
* Revert a printf change from r294307.jhibbits2016-01-191-1/+1
| | | | | | Caused build failures with MPC85XX. Pointy-hat to: jhibbits
* Hide most of the PTE initialization and management.jhibbits2016-01-191-30/+46
| | | | | | | By confining the page table management to a handful of functions it'll be easier to modify the page table scheme without affecting other functions. This will be necessary when 64-bit support is added, and page tables become much larger.
* Move RTAS PCI-specific interpretation of the "reg" property of the PCI hostnwhitehorn2016-01-183-9/+9
| | | | device to the RTAS driver, where it belongs.
* Partially revert r294055.jhibbits2016-01-161-1/+1
| | | | | | This part was a botched revert of a test change. Spotted by: alc
* Adjust VM_MAX_KERNEL_ADDRESS to the max address, not the minimum next.jhibbits2016-01-141-2/+2
| | | | | | VM_MAX_KERNEL_ADDERESS is the maximum KVA address. 0xf8000000 is the start of device mapping space. Since several conditional checks use '<=' against VM_MAX_KERNEL_ADDRESS, bad things could feasibly happen.
* Remove dead code and dead comments, most notably the implemenation of thenwhitehorn2016-01-106-188/+18
| | | | | now-obsolete setfault(). No NetBSD code exists in the AIM locore files, so update the copyrights there.
* Use setjmp() instead of the identical-except-for-having-a-wrong-prototypenwhitehorn2016-01-107-47/+60
| | | | | setfault() when testing for faults. This should also help the compiler do the right thing with this complicated-to-optimize function.
* Implement vsyscall hack. Prior to 2.13 glibc uses vsyscalldchagin2016-01-092-0/+2
| | | | | | | | | instead of vdso. An upcoming linux_base-c6 needs it. Differential Revision: https://reviews.freebsd.org/D1090 Reviewed by: kib, trasz MFC after: 1 week
* Make arguments for booke_init() u_long, to match register width.jhibbits2016-01-041-2/+2
| | | | | | | | | On powerpc64, pointers are 64 bits, so casting from uint32_t changes the integer width. The alternative was to use register_t, but I didn't see register_t used as argument type for any other functions, though didn't look too closely. u_long was an acceptable alternative. On 64-bit it's 64 bits, on 32-bit it's 32 bits.
* Set the cacheline size before calling powerpc_init()jhibbits2016-01-041-2/+2
| | | | | | | powerpc_init() initializes the mmu. Since this may clear pages via pmap_zero_page(), set the cacheline size before calling into it, so pmap_zero_page() has the right cacheline size. This isn't completely necessary now, but will be when 64-bit book-e is completed.
* Initialize the rid for input.jhibbits2016-01-031-0/+1
| | | | | Left uninitialized, random rid causes the IRQ setup to fail, and the PCI device to not be attached.
* Add error interrupt handler for Freescale PCI errorsjhibbits2016-01-031-1/+112
| | | | | | This eliminates a 'interrupt storm' warning spam with the P5020. Obtained from: Semihalf
* Fix booting of 32-bit kernels on 64-bit G5 hardware.andreast2016-01-021-4/+4
| | | | | | | For rs6000, most memory insns and addi/addis do not allow GPR0 for RA (they use literal zero there instead). So use a 'b' constraint to make sure to have a base register other than GPR0. GCC-4.7 and up handles this with allocating r9 instead of r0.
* Bump the maximum number of interrupt controllers to allow for thenwhitehorn2016-01-022-1/+7
| | | | | | | proliferation of them on large IBM systems and add some error checking if we exceed that number. MFC after: 1 week
* Bring CPU features list in line with the ABI requirements.nwhitehorn2016-01-023-45/+77
| | | | MFC after: 1 week
* Switch setting MSR[SF] to C code. This removes any CPU-specific codenwhitehorn2016-01-022-7/+11
| | | | (MSF[SF] is a Book 3-S thing) in the 64-bit locore64.S.
* Make the 'env' directive described in config(5) work on all architectures,ian2016-01-021-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | providing compiled-in static environment data that is used instead of any data passed in from a boot loader. Previously 'env' worked only on i386 and arm xscale systems, because it required the MD startup code to examine the global envmode variable and decide whether to use static_env or an environment obtained from the boot loader, and set the global kern_envp accordingly. Most startup code wasn't doing so. Making things even more complex, some mips startup code uses an alternate scheme that involves calling init_static_kenv() to pass an empty buffer and its size, then uses a series of kern_setenv() calls to populate that buffer. Now all MD startup code calls init_static_kenv(), and that routine provides a single point where envmode is checked and the decision is made whether to use the compiled-in static_kenv or the values provided by the MD code. The routine also continues to serve its original purpose for mips; if a non-zero buffer size is passed the routine installs the empty buffer ready to accept kern_setenv() values. Now if the size is zero, the provided buffer full of existing env data is installed. A NULL pointer can be passed if the boot loader provides no env data; this allows the static env to be installed if envmode is set to do so. Most of the work here is a near-mechanical change to call the init function instead of directly setting kern_envp. A notable exception is in xen/pv.c; that code was originally installing a buffer full of preformatted env data along with its non-zero size (like mips code does), which would have allowed kern_setenv() calls to wipe out the preformatted data. Now it passes a zero for the size so that the buffer of data it installs is treated as non-writeable.
* Use uint32_t for LBC block size.jhibbits2016-01-011-3/+3
| | | | | | LBC block size can only be up to 4GB. The existing code already clamps it, but mixes unsigned long and uint32_t. This works on 32-bit targets, but not 64-bit, so isn't completely correct. This fixes the type confusion.
* Extend idle support for newer Book-E cores.jhibbits2016-01-016-12/+84
| | | | | | | | Newer Book-E cores (e500mc, e5500, e6500) do not support the WE bit in the MSR, and instead delegate CPU idling to the SoC. Perhaps in the future the QORIQ_DPAA option for the mpc85xx platform will become a subclass, which will eliminate most of the #ifdef's.
* Add platform support for QorIQ SoCs.jhibbits2015-12-306-59/+432
| | | | | | | | | This includes the following changes: * SMP kickoff for QorIQ (tested on P5020) * Errata fixes for some silicon revisions * Enables L2 (and L3 if available) caches Obtained from: Semihalf Sponsored by: Alex Perez/Inertial Computing
* Optimize zero_page for book-e mmu.jhibbits2015-12-301-1/+10
| | | | | Instead of indirectly calling bzero() through mmu_booke_zero_page_area, zero the full page the same way as the AIM pmap logic does: using dcbz.
* Rewrite tid_flush() in C.jhibbits2015-12-302-73/+47
| | | | | | There's no need for it to be in asm. Also, by writing in C, and marking it static in pmap.c, it saves a branch to the function itself, as it's only used in one location. The generated asm is virtually identical to the handwritten code.
* Update capabilities of e500mc, e5500, e6500.jhibbits2015-12-291-2/+5
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* Extend Book-E to support >4GB RAMjhibbits2015-12-248-36/+39
| | | | | | | | | Summary: With some additional changes for AIM, that could also support much larger physmem sizes. Given that 32-bit AIM is more or less obsolete, though, it's not worth it at this time. Differential Revision: https://reviews.freebsd.org/D4345
* Implement OF_decode_addr() for arm. Move most of powerpc's implementationian2015-12-212-124/+17
| | | | | | | | | | | | | | | | into a new function that other platforms can share. This creates a new ofw_reg_to_paddr() function (in a new ofw_subr.c file) that contains most of the existing ppc implementation, mostly unchanged. The ppc code now calls the new MI code from the MD code, then creates a ppc-specific bus_space mapping from the results. The new arm implementation does the same in an arm-specific way. This also moves the declaration of OF_decode_addr() from ofw_machdep.h to openfirm.h, except on sparc64 which uses a different function signature. This will help all FDT platforms to set up early console access using OF_decode_addr().
* Provide link state reporting so that ifconfig_llan0="DHCP" works. Thenwhitehorn2015-12-191-0/+38
| | | | | | | reported link state is fictional (always up) since the hypervisor does not provide this information. MFC after: 1 week
* Enable PRINTF_BUFR_SIZE on powerpc64, following r194204 on x86. The kernelnwhitehorn2015-12-181-0/+1
| | | | | message garbling was becoming very noticeable on the 64-CPU systems we now support and run on.
* Move the DRIVER_MODULE() statements that declare mmc(4) to be a child ofian2015-12-141-0/+1
| | | | | | the various bridge drivers out of dev/mmc.c and into the bridge drivers. Requested by: jhb (almost two years ago; better late than never)
* No need to reset tlb1 here, it gets reset again after BSS is cleared injhibbits2015-12-111-4/+1
| | | | | | powerpc_init(). Also fix a comment typo (0x45 == E, not e)
* Follow up to r292071. Actually handle the Altivec Assist for book-e.jhibbits2015-12-111-0/+1
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* Add more interrupts handled for booke.jhibbits2015-12-113-2/+46
| | | | | | | | | | | | | | | e500mc, e5500, and e6500 all use the normal FPU, with the same behavior as AIM hardware. e6500 also supports Altivec, so, although we don't yet have e6500 hardware to test on, add these IVORs as well. Theoretically, since it boots the same as a e5500, it should work, single-threaded, single-core, with full altivec support as of this commit. With this commit, and some other patches to be committed shortly FreeBSD now boots on the P5020, single-core, all the way to user space, and should boot just fine on e500mc. Relnotes: Yes (e500mc, e5500 support) Sponsored by: Alex Perez/Inertial Computing
* Bump MAXCPU. We already run on hardware with 32 threads and the same hardwarenwhitehorn2015-12-031-1/+1
| | | | | | is available commercially with up to 96 threads per socket. MFC after: 3 weeks
* Provide support for ELFv2 userland if using a newer compiler (recent clangnwhitehorn2015-12-032-0/+10
| | | | or gcc) and binutils >= 2.24. Not enabled by default.
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